'avx512' Dialect
Operation definition ¶
avx512.mask.rndscale
(::mlir::avx512::MaskRndScaleOp) ¶
Masked roundscale op
Syntax:
operation ::= `avx512.mask.rndscale` $src `,` $k `,` $a `,` $imm `,` $rounding attr-dict `:` type($dst)
The mask.rndscale op is an AVX512 specific op that can lower to the proper
LLVMAVX512 operation: llvm.mask.rndscale.ps.512
or
llvm.mask.rndscale.pd.512
instruction depending on the type of vectors it
is applied to.
From the Intel Intrinsics Guide: ¶
Round packed floating-point elements in a
to the number of fraction bits
specified by imm
, and store the results in dst
using writemask k
(elements are copied from src when the corresponding mask bit is not set).
Operands: ¶
Operand | Description |
---|---|
src | vector of 32-bit float or 64-bit float values of length 16/8 |
k | 32-bit signless integer |
a | vector of 32-bit float or 64-bit float values of length 16/8 |
imm | 16-bit signless integer or 8-bit signless integer |
rounding | 32-bit signless integer |
Results: ¶
Result | Description |
---|---|
dst | vector of 32-bit float or 64-bit float values of length 16/8 |
avx512.mask.scalef
(::mlir::avx512::MaskScaleFOp) ¶
ScaleF op
Syntax:
operation ::= `avx512.mask.scalef` $src `,` $a `,` $b `,` $k `,` $rounding attr-dict `:` type($dst)
The mask.scalef
op is an AVX512 specific op that can lower to the proper
LLVMAVX512 operation: llvm.mask.scalef.ps.512
or
llvm.mask.scalef.pd.512
depending on the type of MLIR vectors it is
applied to.
From the Intel Intrinsics Guide: ¶
Scale the packed floating-point elements in a
using values from b
, and
store the results in dst
using writemask k
(elements are copied from src
when the corresponding mask bit is not set).
Operands: ¶
Operand | Description |
---|---|
src | vector of 32-bit float or 64-bit float values of length 16/8 |
a | vector of 32-bit float or 64-bit float values of length 16/8 |
b | vector of 32-bit float or 64-bit float values of length 16/8 |
k | 16-bit signless integer or 8-bit signless integer |
rounding | 32-bit signless integer |
Results: ¶
Result | Description |
---|---|
dst | vector of 32-bit float or 64-bit float values of length 16/8 |
avx512.vp2intersect
(::mlir::avx512::Vp2IntersectOp) ¶
Vp2Intersect op
Syntax:
operation ::= `avx512.vp2intersect` $a `,` $b attr-dict `:` type($a)
The vp2intersect
op is an AVX512 specific op that can lower to the proper
LLVMAVX512 operation: llvm.vp2intersect.d.512
or
llvm.vp2intersect.q.512
depending on the type of MLIR vectors it is
applied to.
From the Intel Intrinsics Guide: ¶
Compute intersection of packed integer vectors a
and b
, and store
indication of match in the corresponding bit of two mask registers
specified by k1
and k2
. A match in corresponding elements of a
and
b
is indicated by a set bit in the corresponding bit of the mask
registers.
Operands: ¶
Operand | Description |
---|---|
a | vector of 32-bit signless integer or 64-bit signless integer values of length 16/8 |
b | vector of 32-bit signless integer or 64-bit signless integer values of length 16/8 |
Results: ¶
Result | Description |
---|---|
k1 | 16-bit signless integer or 8-bit signless integer |
k2 | 16-bit signless integer or 8-bit signless integer |