'arm_neon' Dialect
Operations ¶
arm_neon.2d.sdot
(arm_neon::Sdot2dOp) ¶
Sdot op
Syntax:
operation ::= `arm_neon.2d.sdot` $a `,` $b `,` $c attr-dict `:` type($b) `,` type($c) `to` type($res)
The two input vectors b
and c
have a 2D shape, consisting of either 2
or 4 rows, each row having length 4. This operation computes the pair-wise
dot-products of the rows of b
and c
and accumulates them with the
corresponding entry of a
:
res[i] := a[i] + dot_product(b[i, ...], c[i, ...])
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operands: ¶
Operand | Description |
---|---|
a | vector of 32-bit signless integer values of length 4/2 |
b | vector of 8-bit signless integer values of length 16/8 |
c | vector of 8-bit signless integer values of length 16/8 |
Results: ¶
Result | Description |
---|---|
res | vector of 32-bit signless integer values of length 4/2 |
arm_neon.intr.sdot
(arm_neon::SdotOp) ¶
Sdot op
Syntax:
operation ::= `arm_neon.intr.sdot` $a `,` $b `,` $c attr-dict `:` type($b) `,` type($c) `to` type($res)
Signed integer addition of dot product (vector). This instruction performs the following operation on signed integer vectors: res = dot(b, c) + a, where vector operands are partitioned into groups of four elements.
Source: https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operands: ¶
Operand | Description |
---|---|
a | vector of 32-bit signless integer values of length 4/2 |
b | vector of 8-bit signless integer values of length 16/8 |
c | vector of 8-bit signless integer values of length 16/8 |
Results: ¶
Result | Description |
---|---|
res | vector of 32-bit signless integer values of length 4/2 |
arm_neon.intr.smull
(arm_neon::SMullOp) ¶
Smull roundscale op
Syntax:
operation ::= `arm_neon.intr.smull` $a `,` $b attr-dict `:` type($a) `to` type($res)
Signed Multiply Long (vector). This instruction multiplies corresponding signed integer values in the lower or upper half of the vectors of the two source SIMD&FP registers, places the results in a vector, and writes the vector to the destination SIMD&FP register.
Source: https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics
Traits: AlwaysSpeculatableImplTrait
Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)
Effects: MemoryEffects::Effect{}
Operands: ¶
Operand | Description |
---|---|
a | vector of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer values of length 8/4/2 |
b | vector of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer values of length 8/4/2 |
Results: ¶
Result | Description |
---|---|
res | vector of 16-bit signless integer or 32-bit signless integer or 64-bit signless integer values of length 8/4/2 |