MLIR

Multi-Level IR Compiler Framework

'arm_neon' Dialect

Operation definition 

arm_neon.intr.smull (::mlir::arm_neon::SMullOp) 

smull roundscale op

Syntax:

operation ::= `arm_neon.intr.smull` $a `,` $b attr-dict `:` type($a) `to` type($res)

Signed Multiply Long (vector). This instruction multiplies corresponding signed integer values in the lower or upper half of the vectors of the two source SIMD&FP registers, places the results in a vector, and writes the vector to the destination SIMD&FP register.

Source: https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands: 

OperandDescription
avector of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer values of length 8/4/2
bvector of 8-bit signless integer or 16-bit signless integer or 32-bit signless integer values of length 8/4/2

Results: 

ResultDescription
resvector of 16-bit signless integer or 32-bit signless integer or 64-bit signless integer values of length 8/4/2

arm_neon.2d.sdot (::mlir::arm_neon::Sdot2dOp) 

sdot op

Syntax:

operation ::= `arm_neon.2d.sdot` $a `,` $b `,` $c attr-dict `:` type($b) `,` type($c) `to` type($res)

The two input vectors b and c have a 2D shape, consisting of either 2 or 4 rows, each row having length 4. This operation computes the pair-wise dot-products of the rows of b and c and accumulates them with the corresponding entry of a:

res[i] := a[i] + dot_product(b[i, ...], c[i, ...])

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands: 

OperandDescription
avector of 32-bit signless integer values of length 4/2
bvector of 8-bit signless integer values of length 16/8
cvector of 8-bit signless integer values of length 16/8

Results: 

ResultDescription
resvector of 32-bit signless integer values of length 4/2

arm_neon.intr.sdot (::mlir::arm_neon::SdotOp) 

sdot op

Syntax:

operation ::= `arm_neon.intr.sdot` $a `,` $b `,` $c attr-dict `:` type($b) `,` type($c) `to` type($res)

Signed integer addition of dot product (vector). This instruction performs the following operation on signed integer vectors: res = dot(b, c) + a, where vector operands are partitioned into groups of four elements.

Source: https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics

Traits: AlwaysSpeculatableImplTrait

Interfaces: ConditionallySpeculatable, NoMemoryEffect (MemoryEffectOpInterface)

Effects: MemoryEffects::Effect{}

Operands: 

OperandDescription
avector of 32-bit signless integer values of length 4/2
bvector of 8-bit signless integer values of length 16/8
cvector of 8-bit signless integer values of length 16/8

Results: 

ResultDescription
resvector of 32-bit signless integer values of length 4/2