'acc' Dialect
An OpenACC dialect for MLIR. This dialect models the construct from the OpenACC 3.1 directive language.
Operation definition ¶
acc.data
(::mlir::acc::DataOp) ¶
data construct
Syntax:
operation ::= `acc.data` ( `if` `(` $ifCond^ `)` )?
( `copy` `(` $copyOperands^ `:` type($copyOperands) `)` )?
( `copyin` `(` $copyinOperands^ `:` type($copyinOperands) `)` )?
( `copyin_readonly` `(` $copyinReadonlyOperands^ `:`
type($copyinReadonlyOperands) `)` )?
( `copyout` `(` $copyoutOperands^ `:` type($copyoutOperands) `)` )?
( `copyout_zero` `(` $copyoutZeroOperands^ `:`
type($copyoutZeroOperands) `)` )?
( `create` `(` $createOperands^ `:` type($createOperands) `)` )?
( `create_zero` `(` $createZeroOperands^ `:`
type($createZeroOperands) `)` )?
( `no_create` `(` $noCreateOperands^ `:` type($noCreateOperands) `)` )?
( `present` `(` $presentOperands^ `:` type($presentOperands) `)` )?
( `deviceptr` `(` $deviceptrOperands^ `:` type($deviceptrOperands) `)` )?
( `attach` `(` $attachOperands^ `:` type($attachOperands) `)` )?
$region attr-dict-with-keyword
The “acc.data” operation represents a data construct. It defines vars to be allocated in the current device memory for the duration of the region, whether data should be copied from local memory to the current device memory upon region entry , and copied from device memory to local memory upon region exit.
Example:
acc.data present(%a: memref<10x10xf32>, %b: memref<10x10xf32>,
%c: memref<10xf32>, %d: memref<10xf32>) {
// data region
}
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
defaultAttr | ::mlir::acc::ClauseDefaultValueAttr | DefaultValue Clause |
Operands: ¶
Operand | Description |
---|---|
ifCond | 1-bit signless integer |
copyOperands | any type |
copyinOperands | any type |
copyinReadonlyOperands | any type |
copyoutOperands | any type |
copyoutZeroOperands | any type |
createOperands | any type |
createZeroOperands | any type |
noCreateOperands | any type |
presentOperands | any type |
deviceptrOperands | any type |
attachOperands | any type |
acc.enter_data
(::mlir::acc::EnterDataOp) ¶
enter data operation
Syntax:
operation ::= `acc.enter_data` ( `if` `(` $ifCond^ `)` )?
( `async` `(` $asyncOperand^ `:` type($asyncOperand) `)` )?
( `wait_devnum` `(` $waitDevnum^ `:` type($waitDevnum) `)` )?
( `wait` `(` $waitOperands^ `:` type($waitOperands) `)` )?
( `copyin` `(` $copyinOperands^ `:` type($copyinOperands) `)` )?
( `create` `(` $createOperands^ `:` type($createOperands) `)` )?
( `create_zero` `(` $createZeroOperands^ `:`
type($createZeroOperands) `)` )?
( `attach` `(` $attachOperands^ `:` type($attachOperands) `)` )?
attr-dict-with-keyword
The “acc.enter_data” operation represents the OpenACC enter data directive.
Example:
acc.enter_data create(%d1 : memref<10xf32>) attributes {async}
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
async | ::mlir::UnitAttr | unit attribute |
wait | ::mlir::UnitAttr | unit attribute |
Operands: ¶
Operand | Description |
---|---|
ifCond | 1-bit signless integer |
asyncOperand | integer or index |
waitDevnum | integer or index |
waitOperands | integer or index |
copyinOperands | any type |
createOperands | any type |
createZeroOperands | any type |
attachOperands | any type |
acc.exit_data
(::mlir::acc::ExitDataOp) ¶
exit data operation
Syntax:
operation ::= `acc.exit_data` ( `if` `(` $ifCond^ `)` )?
( `async` `(` $asyncOperand^ `:` type($asyncOperand) `)` )?
( `wait_devnum` `(` $waitDevnum^ `:` type($waitDevnum) `)` )?
( `wait` `(` $waitOperands^ `:` type($waitOperands) `)` )?
( `copyout` `(` $copyoutOperands^ `:` type($copyoutOperands) `)` )?
( `delete` `(` $deleteOperands^ `:` type($deleteOperands) `)` )?
( `detach` `(` $detachOperands^ `:` type($detachOperands) `)` )?
attr-dict-with-keyword
The “acc.exit_data” operation represents the OpenACC exit data directive.
Example:
acc.exit_data delete(%d1 : memref<10xf32>) attributes {async}
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
async | ::mlir::UnitAttr | unit attribute |
wait | ::mlir::UnitAttr | unit attribute |
finalize | ::mlir::UnitAttr | unit attribute |
Operands: ¶
Operand | Description |
---|---|
ifCond | 1-bit signless integer |
asyncOperand | integer or index |
waitDevnum | integer or index |
waitOperands | integer or index |
copyoutOperands | any type |
deleteOperands | any type |
detachOperands | any type |
acc.init
(::mlir::acc::InitOp) ¶
init operation
Syntax:
operation ::= `acc.init` ( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
The “acc.init” operation represents the OpenACC init executable directive.
Example:
acc.init
acc.init device_num(%dev1 : i32)
Traits: AttrSizedOperandSegments
Operands: ¶
Operand | Description |
---|---|
deviceTypeOperands | integer |
deviceNumOperand | integer or index |
ifCond | 1-bit signless integer |
acc.loop
(::mlir::acc::LoopOp) ¶
loop construct
The “acc.loop” operation represents the OpenACC loop construct.
Example:
acc.loop gang vector {
scf.for %arg3 = %c0 to %c10 step %c1 {
scf.for %arg4 = %c0 to %c10 step %c1 {
scf.for %arg5 = %c0 to %c10 step %c1 {
// ... body
}
}
}
acc.yield
} attributes { collapse = 3 }
Traits: AttrSizedOperandSegments, SingleBlockImplicitTerminatoracc::YieldOp
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
collapse | ::mlir::IntegerAttr | 64-bit signless integer attribute |
seq | ::mlir::UnitAttr | unit attribute |
independent | ::mlir::UnitAttr | unit attribute |
auto_ | ::mlir::UnitAttr | unit attribute |
reductionOp | ::mlir::acc::ReductionOpAttr | built-in reduction operations supported by OpenACC |
exec_mapping | ::mlir::IntegerAttr | 64-bit signless integer attribute |
Operands: ¶
Operand | Description |
---|---|
gangNum | integer or index |
gangStatic | integer or index |
workerNum | integer or index |
vectorLength | integer or index |
tileOperands | integer or index |
privateOperands | any type |
reductionOperands | any type |
Results: ¶
Result | Description |
---|---|
results | any type |
acc.parallel
(::mlir::acc::ParallelOp) ¶
parallel construct
The “acc.parallel” operation represents a parallel construct block. It has one region to be executed in parallel on the current device.
Example:
acc.parallel num_gangs(%c10) num_workers(%c10)
private(%c : memref<10xf32>) {
// parallel region
}
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
asyncAttr | ::mlir::UnitAttr | unit attribute |
waitAttr | ::mlir::UnitAttr | unit attribute |
selfAttr | ::mlir::UnitAttr | unit attribute |
reductionOp | ::mlir::acc::ReductionOpAttr | built-in reduction operations supported by OpenACC |
defaultAttr | ::mlir::acc::ClauseDefaultValueAttr | DefaultValue Clause |
Operands: ¶
Operand | Description |
---|---|
async | integer or index |
waitOperands | integer or index |
numGangs | integer or index |
numWorkers | integer or index |
vectorLength | integer or index |
ifCond | 1-bit signless integer |
selfCond | 1-bit signless integer |
reductionOperands | any type |
copyOperands | any type |
copyinOperands | any type |
copyinReadonlyOperands | any type |
copyoutOperands | any type |
copyoutZeroOperands | any type |
createOperands | any type |
createZeroOperands | any type |
noCreateOperands | any type |
presentOperands | any type |
devicePtrOperands | any type |
attachOperands | any type |
gangPrivateOperands | any type |
gangFirstPrivateOperands | any type |
acc.shutdown
(::mlir::acc::ShutdownOp) ¶
shutdown operation
Syntax:
operation ::= `acc.shutdown` ( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
The “acc.shutdown” operation represents the OpenACC shutdown executable directive.
Example:
acc.shutdown
acc.shutdown device_num(%dev1 : i32)
Traits: AttrSizedOperandSegments
Operands: ¶
Operand | Description |
---|---|
deviceTypeOperands | integer |
deviceNumOperand | integer or index |
ifCond | 1-bit signless integer |
acc.terminator
(::mlir::acc::TerminatorOp) ¶
Generic terminator for OpenACC regions
Syntax:
operation ::= `acc.terminator` attr-dict
A terminator operation for regions that appear in the body of OpenACC operation. Generic OpenACC construct regions are not expected to return any value so the terminator takes no operands. The terminator op returns control to the enclosing op.
Traits: Terminator
acc.update
(::mlir::acc::UpdateOp) ¶
update operation
Syntax:
operation ::= `acc.update` ( `if` `(` $ifCond^ `)` )?
( `async` `(` $asyncOperand^ `:` type($asyncOperand) `)` )?
( `wait_devnum` `(` $waitDevnum^ `:` type($waitDevnum) `)` )?
( `device_type` `(` $deviceTypeOperands^ `:`
type($deviceTypeOperands) `)` )?
( `wait` `(` $waitOperands^ `:` type($waitOperands) `)` )?
( `host` `(` $hostOperands^ `:` type($hostOperands) `)` )?
( `device` `(` $deviceOperands^ `:` type($deviceOperands) `)` )?
attr-dict-with-keyword
The “acc.udpate” operation represents the OpenACC update executable directive. As host and self clauses are synonyms, any operands for host and self are add to $hostOperands.
Example:
acc.update device(%d1 : memref<10xf32>) attributes {async}
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
async | ::mlir::UnitAttr | unit attribute |
wait | ::mlir::UnitAttr | unit attribute |
ifPresent | ::mlir::UnitAttr | unit attribute |
Operands: ¶
Operand | Description |
---|---|
ifCond | 1-bit signless integer |
asyncOperand | integer or index |
waitDevnum | integer or index |
waitOperands | integer or index |
deviceTypeOperands | integer or index |
hostOperands | any type |
deviceOperands | any type |
acc.wait
(::mlir::acc::WaitOp) ¶
wait operation
Syntax:
operation ::= `acc.wait` ( `(` $waitOperands^ `:` type($waitOperands) `)` )?
( `async` `(` $asyncOperand^ `:` type($asyncOperand) `)` )?
( `wait_devnum` `(` $waitDevnum^ `:` type($waitDevnum) `)` )?
( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
The “acc.wait” operation represents the OpenACC wait executable directive.
Example:
acc.wait(%value1: index)
acc.wait() async(%async1: i32)
Traits: AttrSizedOperandSegments
Attributes: ¶
Attribute | MLIR Type | Description |
---|---|---|
async | ::mlir::UnitAttr | unit attribute |
Operands: ¶
Operand | Description |
---|---|
waitOperands | integer or index |
asyncOperand | integer or index |
waitDevnum | integer or index |
ifCond | 1-bit signless integer |
acc.yield
(::mlir::acc::YieldOp) ¶
Acc yield and termination operation
Syntax:
operation ::= `acc.yield` attr-dict ($operands^ `:` type($operands))?
acc.yield
is a special terminator operation for block inside regions in
acc ops (parallel and loop). It returns values to the immediately enclosing
acc op.
Traits: HasParent<ParallelOp, LoopOp>, Terminator
Operands: ¶
Operand | Description |
---|---|
operands | any type |
Attribute definition ¶
ClauseDefaultValueAttr ¶
DefaultValue Clause
Syntax:
#acc.defaultvalue<
::mlir::acc::ClauseDefaultValue # value
>
Parameters: ¶
Parameter | C++ type | Description |
---|---|---|
value | ::mlir::acc::ClauseDefaultValue | an enum of type ClauseDefaultValue |
ReductionOpAttr ¶
built-in reduction operations supported by OpenACC
Syntax:
#acc.reduction_op<
::mlir::acc::ReductionOp # value
>
Parameters: ¶
Parameter | C++ type | Description |
---|---|---|
value | ::mlir::acc::ReductionOp | an enum of type ReductionOp |