MLIR

Multi-Level IR Compiler Framework

'spv' Dialect

This document describes the design of the SPIR-V dialect in MLIR. It lists various design choices we made for modeling different SPIR-V mechanisms, and their rationale.

This document also explains in a high-level manner how different components are organized and implemented in the code and gives steps to follow for extending them.

This document assumes familiarity with SPIR-V. [SPIR-V][Spirv] is the Khronos Group’s binary intermediate language for representing graphics shaders and compute kernels. It is adopted by multiple Khronos Group’s APIs, including Vulkan and OpenCL. It is fully defined in a [human-readable specification][SpirvSpec]; the syntax of various SPIR-V instructions are encoded in a [machine-readable grammar][SpirvGrammar].

Design Guidelines 

SPIR-V is a binary intermediate language that serves dual purpose: on one side, it is an intermediate language to represent graphics shaders and compute kernels for high-level languages to target; on the other side, it defines a stable binary format for hardware driver consumption. As a result, SPIR-V has design principles pertain to not only intermediate language, but also binary format. For example, regularity is one of the design goals of SPIR-V. All concepts are represented as SPIR-V instructions, including declaring extensions and capabilities, defining types and constants, defining functions, attaching additional properties to computation results, etc. This way favors binary encoding and decoding for driver consumption but not necessarily compiler transformations.

Dialect design principles 

The main objective of the SPIR-V dialect is to be a proper intermediate representation (IR) to facilitate compiler transformations. While we still aim to support serializing to and deserializing from the binary format for various good reasons, the binary format and its concerns play less a role in the design of the SPIR-V dialect: when there is a trade-off to be made between favoring IR and supporting binary format, we lean towards the former.

On the IR aspect, the SPIR-V dialect aims to model SPIR-V at the same semantic level. It is not intended to be a higher level or lower level abstraction than the SPIR-V specification. Those abstractions are easily outside the domain of SPIR-V and should be modeled with other proper dialects so they can be shared among various compilation paths. Because of the dual purpose of SPIR-V, SPIR-V dialect staying at the same semantic level as the SPIR-V specification also means we can still have straightforward serialization and deserialization for the majority of functionalities.

To summarize, the SPIR-V dialect follows the following design principles:

  • Stay as the same semantic level as the SPIR-V specification by having one-to-one mapping for most concepts and entities.
  • Adopt SPIR-V specification’s syntax if possible, but deviate intentionally to utilize MLIR mechanisms if it results in better representation and benefits transformation.
  • Be straightforward to serialize into and deserialize from the SPIR-V binary format.

SPIR-V is designed to be consumed by hardware drivers, so its representation is quite clear, yet verbose for some cases. Allowing representational deviation gives us the flexibility to reduce the verbosity by using MLIR mechanisms.

Dialect scopes 

SPIR-V supports multiple execution environments, specified by client APIs. Notable adopters include Vulkan and OpenCL. It follows that the SPIR-V dialect should support multiple execution environments if to be a proper proxy of SPIR-V in MLIR systems. The SPIR-V dialect is designed with these considerations: it has proper support for versions, extensions, and capabilities and is as extensible as SPIR-V specification.

Conventions 

The SPIR-V dialect adopts the following conventions for IR:

  • The prefix for all SPIR-V types and operations are spv..
  • All instructions in an extended instruction set are further qualified with the extended instruction set’s prefix. For example, all operations in the GLSL extended instruction set have the prefix of spv.GLSL..
  • Ops that directly mirror instructions in the specification have CamelCase names that are the same as the instruction opnames (without the Op prefix). For example, spv.FMul is a direct mirror of OpFMul in the specification. Such an op will be serialized into and deserialized from one SPIR-V instruction.
  • Ops with snake_case names are those that have different representation from corresponding instructions (or concepts) in the specification. These ops are mostly for defining the SPIR-V structure. For example, spv.module and spv.constant. They may correspond to one or more instructions during (de)serialization.
  • Ops with mlir.snake_case names are those that have no corresponding instructions (or concepts) in the binary format. They are introduced to satisfy MLIR structural requirements. For example, spv.mlir.endmodule and spv.mlir.merge. They map to no instructions during (de)serialization.

(TODO: consider merging the last two cases and adopting spv.mlir. prefix for them.)

Module 

A SPIR-V module is defined via the spv.module op, which has one region that contains one block. Model-level instructions, including function definitions, are all placed inside the block. Functions are defined using the builtin func op.

We choose to model a SPIR-V module with a dedicated spv.module op based on the following considerations:

  • It maps cleanly to a SPIR-V module in the specification.
  • We can enforce SPIR-V specific verification that is suitable to be performed at the module-level.
  • We can attach additional model-level attributes.
  • We can control custom assembly form.

The spv.module op’s region cannot capture SSA values from outside, neither implicitly nor explicitly. The spv.module op’s region is closed as to what ops can appear inside: apart from the builtin func op, it can only contain ops from the SPIR-V dialect. The spv.module op’s verifier enforces this rule. This meaningfully guarantees that a spv.module can be the entry point and boundary for serialization.

Module-level operations 

SPIR-V binary format defines the following [sections][SpirvLogicalLayout]:

  1. Capabilities required by the module.
  2. Extensions required by the module.
  3. Extended instructions sets required by the module.
  4. Addressing and memory model specification.
  5. Entry point specifications.
  6. Execution mode declarations.
  7. Debug instructions.
  8. Annotation/decoration instructions.
  9. Type, constant, global variables.
  10. Function declarations.
  11. Function definitions.

Basically, a SPIR-V binary module contains multiple module-level instructions followed by a list of functions. Those module-level instructions are essential and they can generate result ids referenced by functions, notably, declaring resource variables to interact with the execution environment.

Compared to the binary format, we adjust how these module-level SPIR-V instructions are represented in the SPIR-V dialect:

Use MLIR attributes for metadata 

  • Requirements for capabilities, extensions, extended instruction sets, addressing model, and memory model are conveyed using spv.module attributes. This is considered better because these information are for the execution environment. It’s easier to probe them if on the module op itself.
  • Annotations/decoration instructions are “folded” into the instructions they decorate and represented as attributes on those ops. This eliminates potential forward references of SSA values, improves IR readability, and makes querying the annotations more direct. More discussions can be found in the Decorations section.

Model types with MLIR custom types 

  • Types are represented using MLIR builtin types and SPIR-V dialect specific types. There are no type declaration ops in the SPIR-V dialect. More discussions can be found in the Types section later.

Unify and localize constants 

  • Various normal constant instructions are represented by the same spv.constant op. Those instructions are just for constants of different types; using one op to represent them reduces IR verbosity and makes transformations less tedious.
  • Normal constants are not placed in spv.module's region; they are localized into functions. This is to make functions in the SPIR-V dialect to be isolated and explicit capturing. Constants are cheap to duplicate given attributes are made unique in MLIRContext.

Adopt symbol-based global variables and specialization constant 

  • Global variables are defined with the spv.globalVariable op. They do not generate SSA values. Instead they have symbols and should be referenced via symbols. To use global variables in a function block, spv.mlir.addressof is needed to turn the symbol into an SSA value.
  • Specialization constants are defined with the spv.specConstant op. Similar to global variables, they do not generate SSA values and have symbols for reference, too. spv.mlir.referenceof is needed to turn the symbol into an SSA value for use in a function block.

The above choices enables functions in the SPIR-V dialect to be isolated and explicit capturing.

Disallow implicit capturing in functions 

  • In SPIR-V specification, functions support implicit capturing: they can reference SSA values defined in modules. In the SPIR-V dialect functions are defined with func op, which disallows implicit capturing. This is more friendly to compiler analyses and transformations. More discussions can be found in the Function section later.

Model entry points and execution models as normal ops 

  • A SPIR-V module can have multiple entry points. And these entry points refer to the function and interface variables. It’s not suitable to model them as spv.module op attributes. We can model them as normal ops of using symbol references.
  • Similarly for execution modes, which are coupled with entry points, we can model them as normal ops in spv.module's region.

Decorations 

Annotations/decorations provide additional information on result ids. In SPIR-V, all instructions can generate result ids, including value-computing and type-defining ones.

For decorations on value result ids, we can just have a corresponding attribute attached to the operation generating the SSA value. For example, for the following SPIR-V:

OpDecorate %v1 RelaxedPrecision
OpDecorate %v2 NoContraction
...
%v1 = OpFMul %float %0 %0
%v2 = OpFMul %float %1 %1

We can represent them in the SPIR-V dialect as:

%v1 = "spv.FMul"(%0, %0) {RelaxedPrecision: unit} : (f32, f32) -> (f32)
%v2 = "spv.FMul"(%1, %1) {NoContraction: unit} : (f32, f32) -> (f32)

This approach benefits transformations. Essentially those decorations are just additional properties of the result ids (and thus their defining instructions). In SPIR-V binary format, they are just represented as instructions. Literally following SPIR-V binary format means we need to through def-use chains to find the decoration instructions and query information from them.

For decorations on type result ids, notice that practically, only result ids generated from composite types (e.g., OpTypeArray, OpTypeStruct) need to be decorated for memory layouting purpose (e.g., ArrayStride, Offset, etc.); scalar/vector types are required to be uniqued in SPIR-V. Therefore, we can just encode them directly in the dialect-specific type.

Types 

Theoretically we can define all SPIR-V types using MLIR extensible type system, but other than representational purity, it does not buy us more. Instead, we need to maintain the code and invest in pretty printing them. So we prefer to use builtin types if possible.

The SPIR-V dialect reuses builtin integer, float, and vector types:

SpecificationDialect
OpTypeBooli1
OpTypeFloat <bitwidth>f<bitwidth>
OpTypeVector <scalar-type> <count>vector<<count> x <scalar-type>>

For integer types, the SPIR-V dialect supports all signedness semantics (signless, signed, unsigned) in order to ease transformations from higher level dialects. However, SPIR-V spec only defines two signedness semantics state: 0 indicates unsigned, or no signedness semantics, 1 indicates signed semantics. So both iN and uiN are serialized into the same OpTypeInt N 0. For deserialization, we always treat OpTypeInt N 0 as iN.

mlir::NoneType is used for SPIR-V OpTypeVoid; builtin function types are used for SPIR-V OpTypeFunction types.

The SPIR-V dialect and defines the following dialect-specific types:

spirv-type ::= array-type
             | image-type
             | pointer-type
             | runtime-array-type
             | struct-type

Array type 

This corresponds to SPIR-V [array type][ArrayType]. Its syntax is

element-type ::= integer-type
               | floating-point-type
               | vector-type
               | spirv-type

array-type ::= `!spv.array` `<` integer-literal `x` element-type
               (`,` `stride` `=` integer-literal)? `>`

For example,

!spv.array<4 x i32>
!spv.array<4 x i32, stride = 4>
!spv.array<16 x vector<4 x f32>>

Image type 

This corresponds to SPIR-V [image type][ImageType]. Its syntax is

dim ::= `1D` | `2D` | `3D` | `Cube` | <and other SPIR-V Dim specifiers...>

depth-info ::= `NoDepth` | `IsDepth` | `DepthUnknown`

arrayed-info ::= `NonArrayed` | `Arrayed`

sampling-info ::= `SingleSampled` | `MultiSampled`

sampler-use-info ::= `SamplerUnknown` | `NeedSampler` | `NoSampler`

format ::= `Unknown` | `Rgba32f` | <and other SPIR-V Image Formats...>

image-type ::= `!spv.image<` element-type `,` dim `,` depth-info `,`
                           arrayed-info `,` sampling-info `,`
                           sampler-use-info `,` format `>`

For example,

!spv.image<f32, 1D, NoDepth, NonArrayed, SingleSampled, SamplerUnknown, Unknown>
!spv.image<f32, Cube, IsDepth, Arrayed, MultiSampled, NeedSampler, Rgba32f>

Pointer type 

This corresponds to SPIR-V [pointer type][PointerType]. Its syntax is

storage-class ::= `UniformConstant`
                | `Uniform`
                | `Workgroup`
                | <and other storage classes...>

pointer-type ::= `!spv.ptr<` element-type `,` storage-class `>`

For example,

!spv.ptr<i32, Function>
!spv.ptr<vector<4 x f32>, Uniform>

Runtime array type 

This corresponds to SPIR-V [runtime array type][RuntimeArrayType]. Its syntax is

runtime-array-type ::= `!spv.rtarray` `<` element-type (`,` `stride` `=` integer-literal)? `>`

For example,

!spv.rtarray<i32>
!spv.rtarray<i32, stride=4>
!spv.rtarray<vector<4 x f32>>

Struct type 

This corresponds to SPIR-V [struct type][StructType]. Its syntax is

struct-member-decoration ::= integer-literal? spirv-decoration*
struct-type ::= `!spv.struct<` spirv-type (`[` struct-member-decoration `]`)?
                     (`, ` spirv-type (`[` struct-member-decoration `]`)?

For Example,

!spv.struct<f32>
!spv.struct<f32 [0]>
!spv.struct<f32, !spv.image<f32, 1D, NoDepth, NonArrayed, SingleSampled, SamplerUnknown, Unknown>>
!spv.struct<f32 [0], i32 [4]>

Function 

In SPIR-V, a function construct consists of multiple instructions involving OpFunction, OpFunctionParameter, OpLabel, OpFunctionEnd.

// int f(int v) { return v; }
%1 = OpTypeInt 32 0
%2 = OpTypeFunction %1 %1
%3 = OpFunction %1 %2
%4 = OpFunctionParameter %1
%5 = OpLabel
%6 = OpReturnValue %4
     OpFunctionEnd

This construct is very clear yet quite verbose. It is intended for driver consumption. There is little benefit to literally replicate this construct in the SPIR-V dialect. Instead, we reuse the builtin func op to express functions more concisely:

func @f(%arg: i32) -> i32 {
  "spv.ReturnValue"(%arg) : (i32) -> (i32)
}

A SPIR-V function can have at most one result. It cannot contain nested functions or non-SPIR-V operations. spv.module verifies these requirements.

A major difference between the SPIR-V dialect and the SPIR-V specification for functions is that the former are isolated and require explicit capturing, while the latter allows implicit capturing. In SPIR-V specification, functions can refer to SSA values (generated by constants, global variables, etc.) defined in modules. The SPIR-V dialect adjusted how constants and global variables are modeled to enable isolated functions. Isolated functions are more friendly to compiler analyses and transformations. This also enables the SPIR-V dialect to better utilize core infrastructure: many functionalities in the core infrastructure require ops to be isolated, e.g., the [greedy pattern rewriter][GreedyPatternRewriter] can only act on ops isolated from above.

(TODO: create a dedicated spv.fn op for SPIR-V functions.)

Operations 

In SPIR-V, instruction is a generalized concept; a SPIR-V module is just a sequence of instructions. Declaring types, expressing computations, annotating result ids, expressing control flows and others are all in the form of instructions.

We only discuss instructions expressing computations here, which can be represented via SPIR-V dialect ops. Module-level instructions for declarations and definitions are represented differently in the SPIR-V dialect as explained earlier in the Module-level operations section.

An instruction computes zero or one result from zero or more operands. The result is a new result id. An operand can be a result id generated by a previous instruction, an immediate value, or a case of an enum type. We can model result id operands and results with MLIR SSA values; for immediate value and enum cases, we can model them with MLIR attributes.

For example,

%i32 = OpTypeInt 32 0
%c42 = OpConstant %i32 42
...
%3 = OpVariable %i32 Function 42
%4 = OpIAdd %i32 %c42 %c42

can be represented in the dialect as

%0 = "spv.constant"() { value = 42 : i32 } : () -> i32
%1 = "spv.Variable"(%0) { storage_class = "Function" } : (i32) -> !spv.ptr<i32, Function>
%2 = "spv.IAdd"(%0, %0) : (i32, i32) -> i32

Operation documentation is written in each op’s Op Definition Spec using TableGen. A markdown version of the doc can be generated using mlir-tblgen -gen-doc and is attached in the Operation definitions section.

Ops from extended instruction sets 

Analogically extended instruction set is a mechanism to import SPIR-V instructions within another namespace. [GLSL.std.450][GlslStd450] is an extended instruction set that provides common mathematical routines that should be supported. Instead of modeling OpExtInstImport as a separate op and use a single op to model OpExtInst for all extended instructions, we model each SPIR-V instruction in an extended instruction set as a separate op with the proper name prefix. For example, for

%glsl = OpExtInstImport "GLSL.std.450"

%f32 = OpTypeFloat 32
%cst = OpConstant %f32 ...

%1 = OpExtInst %f32 %glsl 28 %cst
%2 = OpExtInst %f32 %glsl 31 %cst

we can have

%1 = "spv.GLSL.Log"(%cst) : (f32) -> (f32)
%2 = "spv.GLSL.Sqrt"(%cst) : (f32) -> (f32)

Control Flow 

SPIR-V binary format uses merge instructions (OpSelectionMerge and OpLoopMerge) to declare structured control flow. They explicitly declare a header block before the control flow diverges and a merge block where control flow subsequently converges. These blocks delimit constructs that must nest, and can only be entered and exited in structured ways.

In the SPIR-V dialect, we use regions to mark the boundary of a structured control flow construct. With this approach, it’s easier to discover all blocks belonging to a structured control flow construct. It is also more idiomatic to MLIR system.

We introduce a spv.selection and spv.loop op for structured selections and loops, respectively. The merge targets are the next ops following them. Inside their regions, a special terminator, spv.mlir.merge is introduced for branching to the merge target.

Selection 

spv.selection defines a selection construct. It contains one region. The region should contain at least two blocks: one selection header block and one merge block.

  • The selection header block should be the first block. It should contain the spv.BranchConditional or spv.Switch op.
  • The merge block should be the last block. The merge block should only contain a spv.mlir.merge op. Any block can branch to the merge block for early exit.
               +--------------+
               | header block |                 (may have multiple outgoing branches)
               +--------------+
                    / | \
                     ...


   +---------+   +---------+   +---------+
   | case #0 |   | case #1 |   | case #2 |  ... (may have branches between each other)
   +---------+   +---------+   +---------+


                     ...
                    \ | /
                      v
               +-------------+
               | merge block |                  (may have multiple incoming branches)
               +-------------+

For example, for the given function

void loop(bool cond) {
  int x = 0;
  if (cond) {
    x = 1;
  } else {
    x = 2;
  }
  // ...
}

It will be represented as

func @selection(%cond: i1) -> () {
  %zero = spv.constant 0: i32
  %one = spv.constant 1: i32
  %two = spv.constant 2: i32
  %x = spv.Variable init(%zero) : !spv.ptr<i32, Function>

  spv.selection {
    spv.BranchConditional %cond, ^then, ^else

  ^then:
    spv.Store "Function" %x, %one : i32
    spv.Branch ^merge

  ^else:
    spv.Store "Function" %x, %two : i32
    spv.Branch ^merge

  ^merge:
    spv.mlir.merge
  }

  // ...
}

Loop 

spv.loop defines a loop construct. It contains one region. The region should contain at least four blocks: one entry block, one loop header block, one loop continue block, one merge block.

  • The entry block should be the first block and it should jump to the loop header block, which is the second block.
  • The merge block should be the last block. The merge block should only contain a spv.mlir.merge op. Any block except the entry block can branch to the merge block for early exit.
  • The continue block should be the second to last block and it should have a branch to the loop header block.
  • The loop continue block should be the only block, except the entry block, branching to the loop header block.
    +-------------+
    | entry block |           (one outgoing branch)
    +-------------+
           |
           v
    +-------------+           (two incoming branches)
    | loop header | <-----+   (may have one or two outgoing branches)
    +-------------+       |
                          |
          ...             |
         \ | /            |
           v              |
   +---------------+      |   (may have multiple incoming branches)
   | loop continue | -----+   (may have one or two outgoing branches)
   +---------------+

          ...
         \ | /
           v
    +-------------+           (may have multiple incoming branches)
    | merge block |
    +-------------+

The reason to have another entry block instead of directly using the loop header block as the entry block is to satisfy region’s requirement: entry block of region may not have predecessors. We have a merge block so that branch ops can reference it as successors. The loop continue block here corresponds to “continue construct” using SPIR-V spec’s term; it does not mean the “continue block” as defined in the SPIR-V spec, which is “a block containing a branch to an OpLoopMerge instruction’s Continue Target.”

For example, for the given function

void loop(int count) {
  for (int i = 0; i < count; ++i) {
    // ...
  }
}

It will be represented as

func @loop(%count : i32) -> () {
  %zero = spv.constant 0: i32
  %one = spv.constant 1: i32
  %var = spv.Variable init(%zero) : !spv.ptr<i32, Function>

  spv.loop {
    spv.Branch ^header

  ^header:
    %val0 = spv.Load "Function" %var : i32
    %cmp = spv.SLessThan %val0, %count : i32
    spv.BranchConditional %cmp, ^body, ^merge

  ^body:
    // ...
    spv.Branch ^continue

  ^continue:
    %val1 = spv.Load "Function" %var : i32
    %add = spv.IAdd %val1, %one : i32
    spv.Store "Function" %var, %add : i32
    spv.Branch ^header

  ^merge:
    spv.mlir.merge
  }
  return
}

Block argument for Phi 

There are no direct Phi operations in the SPIR-V dialect; SPIR-V OpPhi instructions are modelled as block arguments in the SPIR-V dialect. (See the [Rationale][Rationale] doc for “Block Arguments vs Phi nodes”.) Each block argument corresponds to one OpPhi instruction in the SPIR-V binary format. For example, for the following SPIR-V function foo:

  %foo = OpFunction %void None ...
%entry = OpLabel
  %var = OpVariable %_ptr_Function_int Function
         OpSelectionMerge %merge None
         OpBranchConditional %true %true %false
 %true = OpLabel
         OpBranch %phi
%false = OpLabel
         OpBranch %phi
  %phi = OpLabel
  %val = OpPhi %int %int_1 %false %int_0 %true
         OpStore %var %val
         OpReturn
%merge = OpLabel
         OpReturn
         OpFunctionEnd

It will be represented as:

func @foo() -> () {
  %var = spv.Variable : !spv.ptr<i32, Function>

  spv.selection {
    %true = spv.constant true
    spv.BranchConditional %true, ^true, ^false

  ^true:
    %zero = spv.constant 0 : i32
    spv.Branch ^phi(%zero: i32)

  ^false:
    %one = spv.constant 1 : i32
    spv.Branch ^phi(%one: i32)

  ^phi(%arg: i32):
    spv.Store "Function" %var, %arg : i32
    spv.Return

  ^merge:
    spv.mlir.merge
  }
  spv.Return
}

Version, extensions, capabilities 

SPIR-V supports versions, extensions, and capabilities as ways to indicate the availability of various features (types, ops, enum cases) on target hardware. For example, non-uniform group operations were missing before v1.3, and they require special capabilities like GroupNonUniformArithmetic to be used. These availability information relates to target environment and affects the legality of patterns during dialect conversion.

SPIR-V ops’ availability requirements are modeled with [op interfaces][MlirOpInterface]:

  • QueryMinVersionInterface and QueryMaxVersionInterface for version requirements
  • QueryExtensionInterface for extension requirements
  • QueryCapabilityInterface for capability requirements

These interface declarations are auto-generated from TableGen definitions included in [SPIRVBase.td][MlirSpirvBase]. At the moment all SPIR-V ops implement the above interfaces.

SPIR-V ops’ availability implementation methods are automatically synthesized from the availability specification on each op and enum attribute in TableGen. An op needs to look into not only the opcode but also operands to derive its availability requirements. For example, spv.ControlBarrier requires no special capability if the execution scope is Subgroup, but it will require the VulkanMemoryModel capability if the scope is QueueFamily.

SPIR-V types’ availability implementation methods are manually written as overrides in the SPIR-V [type hierarchy][MlirSpirvTypes].

These availability requirements serve as the “ingredients” for the SPIRVConversionTarget and SPIRVTypeConverter to perform op and type conversions, by following the requirements in target environment .

Target environment 

SPIR-V aims to support multiple execution environments as specified by client APIs. These execution environments affect the availability of certain SPIR-V features. For example, a [Vulkan 1.1][VulkanSpirv] implementation must support the 1.0, 1.1, 1.2, and 1.3 versions of SPIR-V and the 1.0 version of the SPIR-V extended instructions for GLSL. Further Vulkan extensions may enable more SPIR-V instructions.

SPIR-V compilation should also take into consideration of the execution environment, so we generate SPIR-V modules valid for the target environment. This is conveyed by the spv.target_env (spirv::TargetEnvAttr) attribute. It should be of #spv.target_env attribute kind, which is defined as:

spirv-version    ::= `v1.0` | `v1.1` | ...
spirv-extension  ::= `SPV_KHR_16bit_storage` | `SPV_EXT_physical_storage_buffer` | ...
spirv-capability ::= `Shader` | `Kernel` | `GroupNonUniform` | ...

spirv-extension-list     ::= `[` (spirv-extension-elements)? `]`
spirv-extension-elements ::= spirv-extension (`,` spirv-extension)*

spirv-capability-list     ::= `[` (spirv-capability-elements)? `]`
spirv-capability-elements ::= spirv-capability (`,` spirv-capability)*

spirv-resource-limits ::= dictionary-attribute

spirv-vce-attribute ::= `#` `spv.vce` `<`
                            spirv-version `,`
                            spirv-capability-list `,`
                            spirv-extensions-list `>`

spirv-vendor-id ::= `AMD` | `NVIDIA` | ...
spirv-device-type ::= `DiscreteGPU` | `IntegratedGPU` | `CPU` | ...
spirv-device-id ::= integer-literal
spirv-device-info ::= spirv-vendor-id (`:` spirv-device-type (`:` spirv-device-id)?)?

spirv-target-env-attribute ::= `#` `spv.target_env` `<`
                                  spirv-vce-attribute,
                                  (spirv-device-info `,`)?
                                  spirv-resource-limits `>`

The attribute has a few fields:

  • A #spv.vce (spirv::VerCapExtAttr) attribute:
    • The target SPIR-V version.
    • A list of SPIR-V extensions for the target.
    • A list of SPIR-V capabilities for the target.
  • A dictionary of target resource limits (see the [Vulkan spec][VulkanResourceLimits] for explanation):
    • max_compute_workgroup_invocations
    • max_compute_workgroup_size

For example,

module attributes {
spv.target_env = #spv.target_env<
    #spv.vce<v1.3, [Shader, GroupNonUniform], [SPV_KHR_8bit_storage]>,
    ARM:IntegratedGPU,
    {
      max_compute_workgroup_invocations = 128 : i32,
      max_compute_workgroup_size = dense<[128, 128, 64]> : vector<3xi32>
    }>
} { ... }

Dialect conversion framework will utilize the information in spv.target_env to properly filter out patterns and ops not available in the target execution environment. When targeting SPIR-V, one needs to create a SPIRVConversionTarget by providing such an attribute.

Shader interface (ABI) 

SPIR-V itself is just expressing computation happening on GPU device. SPIR-V programs themselves are not enough for running workloads on GPU; a companion host application is needed to manage the resources referenced by SPIR-V programs and dispatch the workload. For the Vulkan execution environment, the host application will be written using Vulkan API. Unlike CUDA, the SPIR-V program and the Vulkan application are typically authored with different front-end languages, which isolates these two worlds. Yet they still need to match interfaces: the variables declared in a SPIR-V program for referencing resources need to match with the actual resources managed by the application regarding their parameters.

Still using Vulkan as an example execution environment, there are two primary resource types in Vulkan: buffers and images. They are used to back various uses that may differ regarding the classes of operations (load, store, atomic) to be performed. These uses are differentiated via descriptor types. (For example, uniform storage buffer descriptors can only support load operations while storage buffer descriptors can support load, store, and atomic operations.) Vulkan uses a binding model for resources. Resources are associated with descriptors and descriptors are further grouped into sets. Each descriptor thus has a set number and a binding number. Descriptors in the application corresponds to variables in the SPIR-V program. Their parameters must match, including but not limited to set and binding numbers.

Apart from buffers and images, there is other data that is set up by Vulkan and referenced inside the SPIR-V program, for example, push constants. They also have parameters that require matching between the two worlds.

The interface requirements are external information to the SPIR-V compilation path in MLIR. Besides, each Vulkan application may want to handle resources differently. To avoid duplication and to share common utilities, a SPIR-V shader interface specification needs to be defined to provide the external requirements to and guide the SPIR-V compilation path.

Shader interface attributes 

The SPIR-V dialect defines [a few attributes][MlirSpirvAbi] for specifying these interfaces:

  • spv.entry_point_abi is a struct attribute that should be attached to the entry function. It contains:
    • local_size for specifying the local work group size for the dispatch.
  • spv.interface_var_abi is attribute that should be attached to each operand and result of the entry function. It should be of #spv.interface_var_abi attribute kind, which is defined as:
spv-storage-class     ::= `StorageBuffer` | ...
spv-descriptor-set    ::= integer-literal
spv-binding           ::= integer-literal
spv-interface-var-abi ::= `#` `spv.interface_var_abi` `<(` spv-descriptor-set
                          `,` spv-binding `)` (`,` spv-storage-class)? `>`

For example,

#spv.interface_var_abi<(0, 0), StorageBuffer>
#spv.interface_var_abi<(0, 1)>

The attribute has a few fields:

  • Descriptor set number for the corresponding resource variable.
  • Binding number for the corresponding resource variable.
  • Storage class for the corresponding resource variable.

The SPIR-V dialect provides a [LowerABIAttributesPass][MlirSpirvPasses] for consuming these attributes and create SPIR-V module complying with the interface.

Serialization and deserialization 

Although the main objective of the SPIR-V dialect is to act as a proper IR for compiler transformations, being able to serialize to and deserialize from the binary format is still very valuable for many good reasons. Serialization enables the artifacts of SPIR-V compilation to be consumed by an execution environment; deserialization allows us to import SPIR-V binary modules and run transformations on them. So serialization and deserialization are supported from the very beginning of the development of the SPIR-V dialect.

The serialization library provides two entry points, mlir::spirv::serialize() and mlir::spirv::deserialize(), for converting a MLIR SPIR-V module to binary format and back. The Code organization explains more about this.

Given that the focus is transformations, which inevitably means changes to the binary module; so serialization is not designed to be a general tool for investigating the SPIR-V binary module and does not guarantee roundtrip equivalence (at least for now). For the latter, please use the assembler/disassembler in the [SPIRV-Tools][SpirvTools] project.

A few transformations are performed in the process of serialization because of the representational differences between SPIR-V dialect and binary format:

  • Attributes on spv.module are emitted as their corresponding SPIR-V instructions.
  • Types are serialized into OpType* instructions in the SPIR-V binary module section for types, constants, and global variables.
  • spv.constants are unified and placed in the SPIR-V binary module section for types, constants, and global variables.
  • Attributes on ops, if not part of the op’s binary encoding, are emitted as OpDecorate* instructions in the SPIR-V binary module section for decorations.
  • spv.selections and spv.loops are emitted as basic blocks with Op*Merge instructions in the header block as required by the binary format.
  • Block arguments are materialized as OpPhi instructions at the beginning of the corresponding blocks.

Similarly, a few transformations are performed during deserialization:

  • Instructions for execution environment requirements (extensions, capabilities, extended instruction sets, etc.) will be placed as attributes on spv.module.
  • OpType* instructions will be converted into proper mlir::Types.
  • OpConstant* instructions are materialized as spv.constant at each use site.
  • OpVariable instructions will be converted to spv.globalVariable ops if in module-level; otherwise they will be converted into spv.Variable ops.
  • Every use of a module-level OpVariable instruction will materialize a spv.mlir.addressof op to turn the symbol of the corresponding spv.globalVariable into an SSA value.
  • Every use of a OpSpecConstant instruction will materialize a spv.mlir.referenceof op to turn the symbol of the corresponding spv.specConstant into an SSA value.
  • OpPhi instructions are converted to block arguments.
  • Structured control flow are placed inside spv.selection and spv.loop.

Conversions 

One of the main features of MLIR is the ability to progressively lower from dialects that capture programmer abstraction into dialects that are closer to a machine representation, like SPIR-V dialect. This progressive lowering through multiple dialects is enabled through the use of the [DialectConversion][MlirDialectConversion] framework in MLIR. To simplify targeting SPIR-V dialect using the Dialect Conversion framework, two utility classes are provided.

(Note : While SPIR-V has some [validation rules][SpirvShaderValidation], additional rules are imposed by [Vulkan execution environment][VulkanSpirv]. The lowering described below implements both these requirements.)

SPIRVConversionTarget 

The mlir::spirv::SPIRVConversionTarget class derives from the mlir::ConversionTarget class and serves as a utility to define a conversion target satisfying a given spv.target_env . It registers proper hooks to check the dynamic legality of SPIR-V ops. Users can further register other legality constraints into the returned SPIRVConversionTarget.

spirv::lookupTargetEnvOrDefault() is a handy utility function to query an spv.target_env attached in the input IR or use the default to construct a SPIRVConversionTarget.

SPIRVTypeConverter 

The mlir::SPIRVTypeConverter derives from mlir::TypeConverter and provides type conversion for builtin types to SPIR-V types conforming to the target environment it is constructed with. If the required extension/capability for the resultant type is not available in the given target environment, convertType() will return a null type.

Standard scalar types are converted to their corresponding SPIR-V scalar types.

(TODO: Note that if the bitwidth is not available in the target environment, it will be unconditionally converted to 32-bit. This should be switched to properly emulating non-32-bit scalar types.)

[Standard index type][MlirIndexType] need special handling since they are not directly supported in SPIR-V. Currently the index type is converted to i32.

(TODO: Allow for configuring the integer width to use for index types in the SPIR-V dialect)

SPIR-V only supports vectors of 2/3/4 elements; so [standard vector types][MlirVectorType] of these lengths can be converted directly.

(TODO: Convert other vectors of lengths to scalars or arrays)

[Standard memref types][MlirMemrefType] with static shape and stride are converted to spv.ptr<spv.struct<spv.array<...>>>s. The resultant SPIR-V array types have the same element type as the source memref and its number of elements is obtained from the layout specification of the memref. The storage class of the pointer type are derived from the memref’s memory space with SPIRVTypeConverter::getStorageClassForMemorySpace().

SPIRVOpLowering 

mlir::SPIRVOpLowering is a base class that can be used to define the patterns used for implementing the lowering. For now this only provides derived classes access to an instance of mlir::SPIRVTypeLowering class.

Utility functions for lowering 

Setting shader interface 

The method mlir::spirv::setABIAttrs allows setting the shader interface attributes for a function that is to be an entry point function within the spv.module on lowering. A later pass mlir::spirv::LowerABIAttributesPass uses this information to lower the entry point function and its ABI consistent with the Vulkan validation rules. Specifically,

  • Creates spv.globalVariables for the arguments, and replaces all uses of the argument with this variable. The SSA value used for replacement is obtained using the spv.mlir.addressof operation.
  • Adds the spv.EntryPoint and spv.ExecutionMode operations into the spv.module for the entry function.

Setting layout for shader interface variables 

SPIR-V validation rules for shaders require composite objects to be explicitly laid out. If a spv.globalVariable is not explicitly laid out, the utility method mlir::spirv::decorateType implements a layout consistent with the [Vulkan shader requirements][VulkanShaderInterface].

Creating builtin variables 

In SPIR-V dialect, builtins are represented using spv.globalVariables, with spv.mlir.addressof used to get a handle to the builtin as an SSA value. The method mlir::spirv::getBuiltinVariableValue creates a spv.globalVariable for the builtin in the current spv.module if it does not exist already, and returns an SSA value generated from an spv.mlir.addressof operation.

Current conversions to SPIR-V 

Using the above infrastructure, conversions are implemented from

  • [Standard Dialect][MlirStandardDialect] : Only arithmetic and logical operations conversions are implemented.
  • [GPU Dialect][MlirGpuDialect] : A gpu.module is converted to a spv.module. A gpu.function within this module is lowered as an entry function.

Code organization 

We aim to provide multiple libraries with clear dependencies for SPIR-V related functionalities in MLIR so developers can just choose the needed components without pulling in the whole world.

The dialect 

The code for the SPIR-V dialect resides in a few places:

  • Public headers are placed in [include/mlir/Dialect/SPIRV][MlirSpirvHeaders].
  • Libraries are placed in [lib/Dialect/SPIRV][MlirSpirvLibs].
  • IR tests are placed in [test/Dialect/SPIRV][MlirSpirvTests].
  • Unit tests are placed in [unittests/Dialect/SPIRV][MlirSpirvUnittests].

The whole SPIR-V dialect is exposed via multiple headers for better organization:

  • [SPIRVDialect.h][MlirSpirvDialect] defines the SPIR-V dialect.
  • [SPIRVTypes.h][MlirSpirvTypes] defines all SPIR-V specific types.
  • [SPIRVOps.h][MlirSPirvOpsH] defines all SPIR-V operations.
  • [Serialization.h][MlirSpirvSerialization] defines the entry points for serialization and deserialization.

The dialect itself, including all types and ops, is in the MLIRSPIRV library. Serialization functionalities are in the MLIRSPIRVSerialization library.

Op definitions 

We use [Op Definition Spec][ODS] to define all SPIR-V ops. They are written in TableGen syntax and placed in various *Ops.td files in the header directory. Those *Ops.td files are organized according to the instruction categories used in the SPIR-V specification, for example, an op belonging to the “Atomics Instructions” section is put in the SPIRVAtomicOps.td file.

SPIRVOps.td serves as the master op definition file that includes all files for specific categories.

SPIRVBase.td defines common classes and utilities used by various op definitions. It contains the TableGen SPIR-V dialect definition, SPIR-V versions, known extensions, various SPIR-V enums, TableGen SPIR-V types, and base op classes, etc.

Many of the contents in SPIRVBase.td, e.g., the opcodes and various enums, and all *Ops.td files can be automatically updated via a Python script, which queries the SPIR-V specification and grammar. This greatly reduces the burden of supporting new ops and keeping updated with the SPIR-V spec. More details on this automated development can be found in the Automated development flow section.

Dialect conversions 

The code for conversions from other dialects to the SPIR-V dialect also resides in a few places:

  • From GPU dialect: headers are at [include/mlir/Conversion/GPUTOSPIRV][MlirGpuToSpirvHeaders]; libraries are at [lib/Conversion/GPUToSPIRV][MlirGpuToSpirvLibs].
  • From standard dialect: headers are at [include/mlir/Conversion/StandardTOSPIRV][MlirStdToSpirvHeaders]; libraries are at [lib/Conversion/StandardToSPIRV][MlirStdToSpirvLibs].

These dialect to dialect conversions have their dedicated libraries, MLIRGPUToSPIRVTransforms and MLIRStandardToSPIRVTransforms, respectively.

There are also common utilities when targeting SPIR-V from any dialect:

  • [include/mlir/Dialect/SPIRV/Passes.h][MlirSpirvPasses] contains SPIR-V specific analyses and transformations.
  • [include/mlir/Dialect/SPIRV/SPIRVLowering.h][MlirSpirvLowering] contains type converters and other utility functions.

These common utilities are implemented in the MLIRSPIRVTransforms library.

Rationale 

Lowering memrefs to !spv.array<..> and !spv.rtarray<..>

The LLVM dialect lowers memref types to a MemrefDescriptor:

struct MemrefDescriptor {
  void *allocated_ptr; // Pointer to the base allocation.
  void *aligned_ptr;   // Pointer within base allocation which is aligned to
                       // the value set in the memref.
  size_t offset;       // Offset from aligned_ptr from where to get values
                       // corresponding to the memref.
  size_t shape[rank];  // Shape of the memref.
  size_t stride[rank]; // Strides used while accessing elements of the memref.
};

In SPIR-V dialect, we chose not to use a MemrefDescriptor. Instead a memref is lowered directly to a !spv.ptr<!spv.array<nelts x elem_type>> when the memref is statically shaped, and !spv.ptr<!spv.rtarray<elem_type>> when the memref is dynamically shaped. The rationale behind this choice is described below.

  1. Inputs/output buffers to a SPIR-V kernel are specified using [OpVariable][SpirvOpVariable] inside [interface storage classes][VulkanShaderInterfaceStorageClass] (e.g., Uniform, StorageBuffer, etc.), while kernel private variables reside in non-interface storage classes (e.g., Function, Workgroup, etc.). By default, Vulkan-flavored SPIR-V requires logical addressing mode: one cannot load/store pointers from/to variables and cannot perform pointer arithmetic. Expressing a struct like MemrefDescriptor in interface storage class requires special addressing mode ([PhysicalStorageBuffer][VulkanExtensionPhysicalStorageBuffer]) and manipulating such a struct in non-interface storage classes requires special capabilities ([VariablePointers][VulkanExtensionVariablePointers]). Requiring these two extensions together will significantly limit the Vulkan-capable device we can target; basically ruling out mobile support..

  2. An alternative to having one level of indirection (as is the case with MemrefDescriptors), is to embed the !spv.array or !spv.rtarray directly in the MemrefDescriptor, Having such a descriptor at the ABI boundary implies that the first few bytes of the input/output buffers would need to be reserved for shape/stride information. This adds an unnecessary burden on the host side.

  3. A more performant approach would be to have the data be an OpVariable, with the shape and strides passed using a separate OpVariable. This has further advantages:

    • All the dynamic shape/stride information of the memref can be combined into a single descriptor. Descriptors are [limited resources on many Vulkan hardware][VulkanGPUInfoMaxPerStageDescriptorStorageBuffers]. So combining them would help make the generated code more portable across devices.
    • If the shape/stride information is small enough, they could be accessed using [PushConstants][VulkanPushConstants] that are faster to access and avoid buffer allocation overheads. These would be unnecessary if all shapes are static. In the dynamic shape cases, a few parameters are typically enough to compute the shape of all memrefs used/referenced within the kernel making the use of PushConstants possible.
    • The shape/stride information (typically) needs to be update less frequently than the data stored in the buffers. They could be part of different descriptor sets.

Contribution 

All kinds of contributions are highly appreciated! :) We have GitHub issues for tracking the [dialect][GitHubDialectTracking] and [lowering][GitHubLoweringTracking] development. You can find todo tasks there. The Code organization section gives an overview of how SPIR-V related functionalities are implemented in MLIR. This section gives more concrete steps on how to contribute.

Automated development flow 

One of the goals of SPIR-V dialect development is to leverage both the SPIR-V [human-readable specification][SpirvSpec] and [machine-readable grammar][SpirvGrammar] to auto-generate as much contents as possible. Specifically, the following tasks can be automated (partially or fully):

  • Adding support for a new operation.
  • Adding support for a new SPIR-V enum.
  • Serialization and deserialization of a new operation.

We achieve this using the Python script [gen_spirv_dialect.py][GenSpirvUtilsPy]. It fetches the human-readable specification and machine-readable grammar directly from the Internet and updates various SPIR-V *.td files in place. The script gives us an automated flow for adding support for new ops or enums.

Afterwards, we have SPIR-V specific mlir-tblgen backends for reading the Op Definition Spec and generate various components, including (de)serialization logic for ops. Together with standard mlir-tblgen backends, we auto-generate all op classes, enum classes, etc.

In the following subsections, we list the detailed steps to follow for common tasks.

Add a new op 

To add a new op, invoke the define_inst.sh script wrapper in utils/spirv. define_inst.sh requires a few parameters:

./define_inst.sh <filename> <base-class-name> <opname>

For example, to define the op for OpIAdd, invoke

./define_inst.sh SPIRVArithmeticOps.td ArithmeticBinaryOp OpIAdd

where SPIRVArithmeticOps.td is the filename for hosting the new op and ArithmeticBinaryOp is the direct base class the newly defined op will derive from.

Similarly, to define the op for OpAtomicAnd,

./define_inst.sh SPIRVAtomicOps.td AtomicUpdateWithValueOp OpAtomicAnd

Note that the generated SPIR-V op definition is just a best-effort template; it is still expected to be updated to have more accurate traits, arguments, and results.

It is also expected that a custom assembly form is defined for the new op, which will require providing the parser and printer. The EBNF form of the custom assembly should be described in the op’s description and the parser and printer should be placed in [SPIRVOps.cpp][MlirSpirvOpsCpp] with the following signatures:

static ParseResult parse<spirv-op-symbol>Op(OpAsmParser &parser,
                                            OperationState &state);
static void print(spirv::<spirv-op-symbol>Op op, OpAsmPrinter &printer);

See any existing op as an example.

Verification should be provided for the new op to cover all the rules described in the SPIR-V specification. Choosing the proper ODS types and attribute kinds, which can be found in [SPIRVBase.td][MlirSpirvBase], can help here. Still sometimes we need to manually write additional verification logic in [SPIRVOps.cpp][MlirSpirvOpsCpp] in a function with the following signature:

static LogicalResult verify(spirv::<spirv-op-symbol>Op op);

See any such function in [SPIRVOps.cpp][MlirSpirvOpsCpp] as an example.

If no additional verification is needed, one needs to add the following to the op’s Op Definition Spec:

let verifier = [{ return success(); }];

To suppress the requirement of the above C++ verification function.

Tests for the op’s custom assembly form and verification should be added to the proper file in test/Dialect/SPIRV/.

The generated op will automatically gain the logic for (de)serialization. However, tests still need to be coupled with the change to make sure no surprises. Serialization tests live in test/Dialect/SPIRV/Serialization.

Add a new enum 

To add a new enum, invoke the define_enum.sh script wrapper in utils/spirv. define_enum.sh expects the following parameters:

./define_enum.sh <enum-class-name>

For example, to add the definition for SPIR-V storage class in to SPIRVBase.td:

./define_enum.sh StorageClass

Add a new custom type 

SPIR-V specific types are defined in [SPIRVTypes.h][MlirSpirvTypes]. See examples there and the [tutorial][CustomTypeAttrTutorial] for defining new custom types.

Add a new conversion 

To add conversion for a type update the mlir::spirv::SPIRVTypeConverter to return the converted type (must be a valid SPIR-V type). See [Type Conversion][MlirDialectConversionTypeConversion] for more details.

To lower an operation into SPIR-V dialect, implement a [conversion pattern][MlirDialectConversionRewritePattern]. If the conversion requires type conversion as well, the pattern must inherit from the mlir::spirv::SPIRVOpLowering class to get access to mlir::spirv::SPIRVTypeConverter. If the operation has a region, [signature conversion][MlirDialectConversionSignatureConversion] might be needed as well.

Note: The current validation rules of spv.module require that all operations contained within its region are valid operations in the SPIR-V dialect.

Operation definitions 

spv.AccessChain (::mlir::spirv::AccessChainOp) 

Create a pointer into a composite object that can be used with OpLoad
and OpStore.

Result Type must be an OpTypePointer. Its Type operand must be the type reached by walking the Base’s type hierarchy down to the last provided index in Indexes, and its Storage Class operand must be the same as the Storage Class of Base.

Base must be a pointer, pointing to the base of a composite object.

Indexes walk the type hierarchy to the desired depth, potentially down to scalar granularity. The first index in Indexes will select the top- level member/element/component/element of the base composite. All composite constituents use zero-based numbering, as described by their OpType… instruction. The second index will apply similarly to that result, and so on. Once any non-composite type is reached, there must be no remaining (unused) indexes.

Each index in Indexes

  • must be a scalar integer type,

  • is treated as a signed count, and

  • must be an OpConstant when indexing into a structure.

access-chain-op ::= ssa-id `=` `spv.AccessChain` ssa-use
                    `[` ssa-use (',' ssa-use)* `]`
                    `:` pointer-type

Example: 

%0 = "spv.constant"() { value = 1: i32} : () -> i32
%1 = spv.Variable : !spv.ptr<!spv.struct<f32, !spv.array<4xf32>>, Function>
%2 = spv.AccessChain %1[%0] : !spv.ptr<!spv.struct<f32, !spv.array<4xf32>>, Function>
%3 = spv.Load "Function" %2 ["Volatile"] : !spv.array<4xf32>

Operands: 

OperandDescription
base_ptrany SPIR-V pointer type
indices8/16/32/64-bit integer

Results: 

ResultDescription
component_ptrany SPIR-V pointer type

spv.mlir.addressof (::mlir::spirv::AddressOfOp) 

Get the address of a global variable.

Syntax:

operation ::= `spv.mlir.addressof` $variable attr-dict `:` type($pointer)

Variables in module scope are defined using symbol names. This op generates an SSA value that can be used to refer to the symbol within function scope for use in ops that expect an SSA value. This operation has no corresponding SPIR-V instruction; it’s merely used for modelling purpose in the SPIR-V dialect. Since variables in module scope in SPIR-V dialect are of pointer type, this op returns a pointer type as well, and the type is the same as the variable referenced.

spv-address-of-op ::= ssa-id `=` `spv.mlir.addressof` symbol-ref-id
                                 `:` spirv-pointer-type

Example: 

%0 = spv.mlir.addressof @global_var : !spv.ptr<f32, Input>

Attributes: 

AttributeMLIR TypeDescription
variable::mlir::FlatSymbolRefAttrflat symbol reference attribute

Results: 

ResultDescription
pointerany SPIR-V pointer type

spv.AtomicAnd (::mlir::spirv::AtomicAndOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise AND of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | "Release"` | ...

atomic-and-op ::=
    `spv.AtomicAnd` scope memory-semantics
                    ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicAnd "Device" "None" %pointer, %value :
                   !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicCompareExchangeWeak (::mlir::spirv::AtomicCompareExchangeWeakOp) 

Deprecated (use OpAtomicCompareExchange).

Has the same semantics as OpAtomicCompareExchange.

Memory must be a valid memory Scope.

atomic-compare-exchange-weak-op ::=
    `spv.AtomicCompareExchangeWeak` scope memory-semantics memory-semantics
                                    ssa-use `,` ssa-use `,` ssa-use
                                    `:` spv-pointer-type

Example: 

%0 = spv.AtomicCompareExchangeWeak "Workgroup" "Acquire" "None"
                                   %pointer, %value, %comparator
                                   : !spv.ptr<i32, WorkGroup>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
equal_semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics
unequal_semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer
comparator8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicIAdd (::mlir::spirv::AtomicIAddOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by integer addition of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-iadd-op ::=
    `spv.AtomicIAdd` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicIAdd "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicIDecrement (::mlir::spirv::AtomicIDecrementOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value through integer subtraction of 1 from Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-idecrement-op ::=
    `spv.AtomicIDecrement` scope memory-semantics ssa-use
                           `:` spv-pointer-type

Example: 

%0 = spv.AtomicIDecrement "Device" "None" %pointer :
                          !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicIIncrement (::mlir::spirv::AtomicIIncrementOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value through integer addition of 1 to Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-iincrement-op ::=
    `spv.AtomicIIncrement` scope memory-semantics ssa-use
                           `:` spv-pointer-type

Example: 

%0 = spv.AtomicIncrement "Device" "None" %pointer :
                         !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicISub (::mlir::spirv::AtomicISubOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by integer subtraction of Value from Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-isub-op ::=
    `spv.AtomicISub` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicISub "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicOr (::mlir::spirv::AtomicOrOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise OR of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-or-op ::=
    `spv.AtomicOr` scope memory-semantics
                   ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicOr "Device" "None" %pointer, %value :
                  !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicSMax (::mlir::spirv::AtomicSMaxOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the largest signed integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-smax-op ::=
    `spv.AtomicSMax` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicSMax "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicSMin (::mlir::spirv::AtomicSMinOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the smallest signed integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-smin-op ::=
    `spv.AtomicSMin` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicSMin "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicUMax (::mlir::spirv::AtomicUMaxOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the largest unsigned integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-umax-op ::=
    `spv.AtomicUMax` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicUMax "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicUMin (::mlir::spirv::AtomicUMinOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the smallest unsigned integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-umin-op ::=
    `spv.AtomicUMin` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicUMin "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.AtomicXor (::mlir::spirv::AtomicXorOp) 

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:
  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise exclusive OR of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

atomic-xor-op ::=
    `spv.AtomicXor` scope memory-semantics
                    ssa-use `,` ssa-use `:` spv-pointer-type

Example: 

%0 = spv.AtomicXor "Device" "None" %pointer, %value :
                   !spv.ptr<i32, StorageBuffer>

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

Operands: 

OperandDescription
pointerany SPIR-V pointer type
value8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer

spv.BitCount (::mlir::spirv::BitCountOp) 

Count the number of set bits in an object.

Results are computed per component.

esult Type must be a scalar or vector of integer type. The components ust be wide enough to hold the unsigned Width of Base as an unsigned alue. That is, no sign bit is needed or counted when checking for a ide enough result width.

ase must be a scalar or vector of integer type. It must have the same umber of components as Result Type.

he result is the unsigned value that is the number of bits in Base that re 1.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itcount-op ::= ssa-id `=` `spv.BitCount` ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.BitCount %0: i32 3 = spv.BitCount %1: vector<4xi32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitFieldInsert (::mlir::spirv::BitFieldInsertOp) 

Make a copy of an object, with a modified bit field that comes from
another object.

Syntax:

operation ::= `spv.BitFieldInsert` operands attr-dict `:` type($base) `,` type($offset) `,` type($count)

Results are computed per component.

esult Type must be a scalar or vector of integer type.

The type of Base and Insert must be the same as Result Type.

ny result bits numbered outside [Offset, Offset + Count - 1] inclusive) will come from the corresponding bits in Base.

ny result bits numbered in [Offset, Offset + Count - 1] come, in rder, from the bits numbered [0, Count - 1] of Insert.

ount must be an integer type scalar. Count is the number of bits taken rom Insert. It will be consumed as an unsigned value. Count can be 0, n which case the result will be Base.

ffset must be an integer type scalar. Offset is the lowest-order bit f the bit field. It will be consumed as an unsigned value.

he resulting value is undefined if Count or Offset or their sum is reater than the number of bits in the result.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itfield-insert-op ::= ssa-id `=` `spv.BitFieldInsert` ssa-use `,` ssa-use `,` ssa-use `,` ssa-use `:` integer-scalar-vector-type `,` integer-type `,` integer-type

Example: 

mlir 0 = spv.BitFieldInsert %base, %insert, %offset, %count : vector<3xi32>, i8, i8

Operands: 

OperandDescription
base8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
insert8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
offset8/16/32/64-bit integer
count8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitFieldSExtract (::mlir::spirv::BitFieldSExtractOp) 

Extract a bit field from an object, with sign extension.

Syntax:

operation ::= `spv.BitFieldSExtract` operands attr-dict `:` type($base) `,` type($offset) `,` type($count)

Results are computed per component.

esult Type must be a scalar or vector of integer type.

The type of Base must be the same as Result Type.

f Count is greater than 0: The bits of Base numbered in [Offset, Offset Count - 1] (inclusive) become the bits numbered [0, Count - 1] of the esult. The remaining bits of the result will all be the same as bit ffset + Count - 1 of Base.

ount must be an integer type scalar. Count is the number of bits xtracted from Base. It will be consumed as an unsigned value. Count can e 0, in which case the result will be 0.

ffset must be an integer type scalar. Offset is the lowest-order bit f the bit field to extract from Base. It will be consumed as an nsigned value.

he resulting value is undefined if Count or Offset or their sum is reater than the number of bits in the result.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itfield-extract-s-op ::= ssa-id `=` `spv.BitFieldSExtract` ssa-use `,` ssa-use `,` ssa-use `:` integer-scalar-vector-type `,` integer-type `,` integer-type

Example: 

mlir 0 = spv.BitFieldSExtract %base, %offset, %count : vector<3xi32>, i8, i8

Operands: 

OperandDescription
base8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
offset8/16/32/64-bit integer
count8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitFieldUExtract (::mlir::spirv::BitFieldUExtractOp) 

Extract a bit field from an object, without sign extension.

Syntax:

operation ::= `spv.BitFieldUExtract` operands attr-dict `:` type($base) `,` type($offset) `,` type($count)

The semantics are the same as with OpBitFieldSExtract with the exception that there is no sign extension. The remaining bits of the result will all be 0.

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitfield-extract-u-op ::= ssa-id `=` `spv.BitFieldUExtract` ssa-use
                                     `,` ssa-use `,` ssa-use
                                     `:` integer-scalar-vector-type
                                     `,` integer-type `,` integer-type

Example: 

%0 = spv.BitFieldUExtract %base, %offset, %count : vector<3xi32>, i8, i8

Operands: 

OperandDescription
base8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
offset8/16/32/64-bit integer
count8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitReverse (::mlir::spirv::BitReverseOp) 

Reverse the bits in an object.

Results are computed per component.

esult Type must be a scalar or vector of integer type.

The type of Base must be the same as Result Type.

he bit-number n of the result will be taken from bit-number Width - 1 - of Base, where Width is the OpTypeInt operand of the Result Type.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itreverse-op ::= ssa-id `=` `spv.BitReverse` ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.BitReverse %0 : i32 3 = spv.BitReverse %1 : vector<4xi32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.Bitcast (::mlir::spirv::BitcastOp) 

Bit pattern-preserving type conversion.

Result Type must be an OpTypePointer, or a scalar or vector of numerical-type.

Operand must have a type of OpTypePointer, or a scalar or vector of numerical-type. It must be a different type than Result Type.

If either Result Type or Operand is a pointer, the other must be a pointer (diverges from the SPIR-V spec).

If Result Type has a different number of components than Operand, the total number of bits in Result Type must equal the total number of bits in Operand. Let L be the type, either Result Type or Operand’s type, that has the larger number of components. Let S be the other type, with the smaller number of components. The number of components in L must be an integer multiple of the number of components in S. The first component (that is, the only or lowest-numbered component) of S maps to the first components of L, and so on, up to the last component of S mapping to the last components of L. Within this mapping, any single component of S (mapping to multiple components of L) maps its lower- ordered bits to the lower-numbered components of L.

bitcast-op ::= ssa-id `=` `spv.Bitcast` ssa-use
               `:` operand-type `to` result-type

Example: 

%1 = spv.Bitcast %0 : f32 to i32
%1 = spv.Bitcast %0 : vector<2xf32> to i64
%1 = spv.Bitcast %0 : !spv.ptr<f32, Function> to !spv.ptr<i32, Function>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or 16/32/64-bit float or bool or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type

Results: 

ResultDescription
result8/16/32/64-bit integer or 16/32/64-bit float or bool or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type

spv.BitwiseAnd (::mlir::spirv::BitwiseAndOp) 

Result is 1 if both Operand 1 and Operand 2 are 1. Result is 0 if either
Operand 1 or Operand 2 are 0.

Results are computed per component, and within each component, per bit.

esult Type must be a scalar or vector of integer type. The type of perand 1 and Operand 2 must be a scalar or vector of integer type. hey must have the same number of components as Result Type. They must ave the same component width as Result Type.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itwise-and-op ::= ssa-id `=` `spv.BitwiseAnd` ssa-use, ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.BitwiseAnd %0, %1 : i32 2 = spv.BitwiseAnd %0, %1 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitwiseOr (::mlir::spirv::BitwiseOrOp) 

Result is 1 if either Operand 1 or Operand 2 is 1. Result is 0 if both
Operand 1 and Operand 2 are 0.

Results are computed per component, and within each component, per bit.

esult Type must be a scalar or vector of integer type. The type of perand 1 and Operand 2 must be a scalar or vector of integer type. hey must have the same number of components as Result Type. They must ave the same component width as Result Type.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itwise-or-op ::= ssa-id `=` `spv.BitwiseOr` ssa-use, ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.BitwiseOr %0, %1 : i32 2 = spv.BitwiseOr %0, %1 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BitwiseXor (::mlir::spirv::BitwiseXorOp) 

Result is 1 if exactly one of Operand 1 or Operand 2 is 1. Result is 0
if Operand 1 and Operand 2 have the same value.

Results are computed per component, and within each component, per bit.

esult Type must be a scalar or vector of integer type. The type of perand 1 and Operand 2 must be a scalar or vector of integer type. hey must have the same number of components as Result Type. They must ave the same component width as Result Type.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` itwise-xor-op ::= ssa-id `=` `spv.BitwiseXor` ssa-use, ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.BitwiseXor %0, %1 : i32 2 = spv.BitwiseXor %0, %1 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.BranchConditional (::mlir::spirv::BranchConditionalOp) 

If Condition is true, branch to true block, otherwise branch to false
block.

Condition must be a Boolean type scalar.

Branch weights are unsigned 32-bit integer literals. There must be either no Branch Weights or exactly two branch weights. If present, the first is the weight for branching to True Label, and the second is the weight for branching to False Label. The implied probability that a branch is taken is its weight divided by the sum of the two Branch weights. At least one weight must be non-zero. A weight of zero does not imply a branch is dead or permit its removal; branch weights are only hints. The two weights must not overflow a 32-bit unsigned integer when added together.

This instruction must be the last instruction in a block.

branch-conditional-op ::= `spv.BranchConditional` ssa-use
                          (`[` integer-literal, integer-literal `]`)?
                          `,` successor `,` successor
successor ::= bb-id branch-use-list?
branch-use-list ::= `(` ssa-use-list `:` type-list-no-parens `)`

Example: 

spv.BranchConditional %condition, ^true_branch, ^false_branch
spv.BranchConditional %condition, ^true_branch(%0: i32), ^false_branch(%1: i32)

Attributes: 

AttributeMLIR TypeDescription
branch_weights::mlir::ArrayAttr32-bit integer array attribute

Operands: 

OperandDescription
conditionbool
trueTargetOperandsvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type
falseTargetOperandsvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Successors: 

SuccessorDescription
trueTargetany successor
falseTargetany successor

spv.Branch (::mlir::spirv::BranchOp) 

Unconditional branch to target block.

Syntax:

operation ::= `spv.Branch` $target (`(` $targetOperands^ `:` type($targetOperands) `)`)? attr-dict

This instruction must be the last instruction in a block.

branch-op ::= `spv.Branch` successor
successor ::= bb-id branch-use-list?
branch-use-list ::= `(` ssa-use-list `:` type-list-no-parens `)`

Example: 

spv.Branch ^target
spv.Branch ^target(%0, %1: i32, f32)

Operands: 

OperandDescription
targetOperandsvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Successors: 

SuccessorDescription
targetany successor

spv.CompositeConstruct (::mlir::spirv::CompositeConstructOp) 

Construct a new composite object from a set of constituent objects that
will fully form it.

Result Type must be a composite type, whose top-level members/elements/components/columns have the same type as the types of the operands, with one exception. The exception is that for constructing a vector, the operands may also be vectors with the same component type as the Result Type component type. When constructing a vector, the total number of components in all the operands must equal the number of components in Result Type.

Constituents will become members of a structure, or elements of an array, or components of a vector, or columns of a matrix. There must be exactly one Constituent for each top-level member/element/component/column of the result, with one exception. The exception is that for constructing a vector, a contiguous subset of the scalars consumed can be represented by a vector operand instead. The Constituents must appear in the order needed by the definition of the type of the result. When constructing a vector, there must be at least two Constituent operands.

composite-construct-op ::= ssa-id `=` `spv.CompositeConstruct`
                           (ssa-use (`,` ssa-use)* )? `:` composite-type

Example: 

%0 = spv.CompositeConstruct %1, %2, %3 : vector<3xf32>

Operands: 

OperandDescription
constituentsvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Results: 

ResultDescription
resultvector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.CompositeExtract (::mlir::spirv::CompositeExtractOp) 

Extract a part of a composite object.

Result Type must be the type of object selected by the last provided index. The instruction result is the extracted object.

Composite is the composite to extract from.

Indexes walk the type hierarchy, potentially down to component granularity, to select the part to extract. All indexes must be in bounds. All composite constituents use zero-based numbering, as described by their OpType… instruction.

composite-extract-op ::= ssa-id `=` `spv.CompositeExtract` ssa-use
                         `[` integer-literal (',' integer-literal)* `]`
                         `:` composite-type

Example: 

%0 = spv.Variable : !spv.ptr<!spv.array<4x!spv.array<4xf32>>, Function>
%1 = spv.Load "Function" %0 ["Volatile"] : !spv.array<4x!spv.array<4xf32>>
%2 = spv.CompositeExtract %1[1 : i32] : !spv.array<4x!spv.array<4xf32>>

Attributes: 

AttributeMLIR TypeDescription
indices::mlir::ArrayAttr32-bit integer array attribute

Operands: 

OperandDescription
compositevector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Results: 

ResultDescription
componentvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.CompositeInsert (::mlir::spirv::CompositeInsertOp) 

Make a copy of a composite object, while modifying one part of it.

Result Type must be the same type as Composite.

Object is the object to use as the modified part.

Composite is the composite to copy all but the modified part from.

Indexes walk the type hierarchy of Composite to the desired depth, potentially down to component granularity, to select the part to modify. All indexes must be in bounds. All composite constituents use zero-based numbering, as described by their OpType… instruction. The type of the part selected to modify must match the type of Object.

composite-insert-op ::= ssa-id `=` `spv.CompositeInsert` ssa-use, ssa-use
                        `[` integer-literal (',' integer-literal)* `]`
                        `:` object-type `into` composite-type

Example: 

%0 = spv.CompositeInsert %object, %composite[1 : i32] : f32 into !spv.array<4xf32>

Attributes: 

AttributeMLIR TypeDescription
indices::mlir::ArrayAttr32-bit integer array attribute

Operands: 

OperandDescription
objectvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type
compositevector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Results: 

ResultDescription
resultvector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.constant (::mlir::spirv::ConstantOp) 

The op that declares a SPIR-V normal constant

This op declares a SPIR-V normal constant. SPIR-V has multiple constant instructions covering different constant types:

  • OpConstantTrue and OpConstantFalse for boolean constants
  • OpConstant for scalar constants
  • OpConstantComposite for composite constants
  • OpConstantNull for null constants

Having such a plethora of constant instructions renders IR transformations more tedious. Therefore, we use a single spv.constant op to represent them all. Note that conversion between those SPIR-V constant instructions and this op is purely mechanical; so it can be scoped to the binary (de)serialization process.

spv-constant-op ::= ssa-id `=` `spv.constant` attribute-value
                    (`:` spirv-type)?

Example: 

%0 = spv.constant true
%1 = spv.constant dense<[2, 3]> : vector<2xf32>
%2 = spv.constant [dense<3.0> : vector<2xf32>] : !spv.array<1xvector<2xf32>>

TODO: support constant structs

Attributes: 

AttributeMLIR TypeDescription
value::mlir::Attributeany attribute

Results: 

ResultDescription
constantvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.ControlBarrier (::mlir::spirv::ControlBarrierOp) 

Wait for other invocations of this module to reach the current point of
execution.

Syntax:

operation ::= `spv.ControlBarrier` $execution_scope `,` $memory_scope `,` $memory_semantics attr-dict

All invocations of this module within Execution scope must reach this point of execution before any invocation will proceed beyond it.

When Execution is Workgroup or larger, behavior is undefined if this instruction is used in control flow that is non-uniform within Execution. When Execution is Subgroup or Invocation, the behavior of this instruction in non-uniform control flow is defined by the client API.

If Semantics is not None, this instruction also serves as an OpMemoryBarrier instruction, and must also perform and adhere to the description and semantics of an OpMemoryBarrier instruction with the same Memory and Semantics operands. This allows atomically specifying both a control barrier and a memory barrier (that is, without needing two instructions). If Semantics is None, Memory is ignored.

Before version 1.3, it is only valid to use this instruction with TessellationControl, GLCompute, or Kernel execution models. There is no such restriction starting with version 1.3.

When used with the TessellationControl execution model, it also implicitly synchronizes the Output Storage Class: Writes to Output variables performed by any invocation executed prior to a OpControlBarrier will be visible to any other invocation after return from that OpControlBarrier.

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | "Release"` | ...

control-barrier-op ::= `spv.ControlBarrier` scope, scope, memory-semantics

Example: 

spv.ControlBarrier "Workgroup", "Device", "Acquire|UniformMemory"

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
memory_semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

spv.ConvertFToS (::mlir::spirv::ConvertFToSOp) 

Convert value numerically from floating point to signed integer, with
round toward 0.0.

Result Type must be a scalar or vector of integer type.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type.

Results are computed per component.

convert-f-to-s-op ::= ssa-id `=` `spv.ConvertFToSOp` ssa-use
                      `:` operand-type `to` result-type

Example: 

%1 = spv.ConvertFToS %0 : f32 to i32
%3 = spv.ConvertFToS %2 : vector<3xf32> to vector<3xi32>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.ConvertFToU (::mlir::spirv::ConvertFToUOp) 

Convert value numerically from floating point to unsigned integer, with
round toward 0.0.

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type.

Results are computed per component.

convert-f-to-u-op ::= ssa-id `=` `spv.ConvertFToUOp` ssa-use
                      `:` operand-type `to` result-type

Example: 

%1 = spv.ConvertFToU %0 : f32 to i32
%3 = spv.ConvertFToU %2 : vector<3xf32> to vector<3xi32>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.ConvertSToF (::mlir::spirv::ConvertSToFOp) 

Convert value numerically from signed integer to floating point.

Result Type must be a scalar or vector of floating-point type.

Signed Value must be a scalar or vector of integer type. It must have the same number of components as Result Type.

Results are computed per component.

convert-s-to-f-op ::= ssa-id `=` `spv.ConvertSToFOp` ssa-use
                      `:` operand-type `to` result-type

Example: 

%1 = spv.ConvertSToF %0 : i32 to f32
%3 = spv.ConvertSToF %2 : vector<3xi32> to vector<3xf32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.ConvertUToF (::mlir::spirv::ConvertUToFOp) 

Convert value numerically from unsigned integer to floating point.

Result Type must be a scalar or vector of floating-point type.

Unsigned Value must be a scalar or vector of integer type. It must have the same number of components as Result Type.

Results are computed per component.

convert-u-to-f-op ::= ssa-id `=` `spv.ConvertUToFOp` ssa-use
                      `:` operand-type `to` result-type

Example: 

%1 = spv.ConvertUToF %0 : i32 to f32
%3 = spv.ConvertUToF %2 : vector<3xi32> to vector<3xf32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.CooperativeMatrixLengthNV (::mlir::spirv::CooperativeMatrixLengthNVOp) 

See extension SPV_NV_cooperative_matrix

Syntax:

operation ::= `spv.CooperativeMatrixLengthNV` attr-dict `:` $type

Number of components of a cooperative matrix type accessible to each invocation when treated as a composite.

Result Type must be an OpTypeInt with 32-bit Width and 0 Signedness.

Type is a cooperative matrix type.

cooperative-matrix-length-op ::= ssa-id `=` `spv.CooperativeMatrixLengthNV
                                ` : ` cooperative-matrix-type

For example:

%0 = spv.CooperativeMatrixLengthNV : !spv.coopmatrix<Subgroup, i32, 8, 16>

Attributes: 

AttributeMLIR TypeDescription
type::mlir::TypeAttrany type attribute

Results: 

ResultDescription
resultInt32

spv.CooperativeMatrixLoadNV (::mlir::spirv::CooperativeMatrixLoadNVOp) 

See extension SPV_NV_cooperative_matrix

Load a cooperative matrix through a pointer.

Result Type is the type of the loaded object. It must be a cooperative matrix type.

Pointer is a pointer into an array. Its type must be an OpTypePointer whose Type operand is a scalar or vector type. The storage class of Pointer must be Workgroup, StorageBuffer, or (if SPV_EXT_physical_storage_buffer is supported) PhysicalStorageBufferEXT.

Stride is the number of elements in the array in memory between the first component of consecutive rows (or columns) in the result. It must be a scalar integer type.

ColumnMajor indicates whether the values loaded from memory are arranged in column-major or row-major order. It must be a boolean constant instruction, with false indicating row major and true indicating column major.

Memory Access must be a Memory Access literal. If not present, it is the same as specifying None.

If ColumnMajor is false, then elements (row,) of the result are taken in order from contiguous locations starting at Pointer[rowStride]. If ColumnMajor is true, then elements (,col) of the result are taken in order from contiguous locations starting from Pointer[colStride]. Any ArrayStride decoration on Pointer is ignored.

For a given dynamic instance of this instruction, all operands of this instruction must be the same for all invocations in a given scope instance (where the scope is the scope the cooperative matrix type was created with). All invocations in a given scope instance must be active or all must be inactive.

Custom assembly form 

cooperative-matrixload-op ::= ssa-id `=` `spv.CooperativeMatrixLoadNV`
                          ssa-use `,` ssa-use `,` ssa-use
                          (`[` memory-access `]`)? ` : `
                          pointer-type `as`
                          cooperative-matrix-type

For example:

%0 = spv.CooperativeMatrixLoadNV %ptr, %stride, %colMajor
     : !spv.ptr<i32, StorageBuffer> as !spv.coopmatrix<i32, Workgroup, 16, 8>

Attributes: 

AttributeMLIR TypeDescription
memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess

Operands: 

OperandDescription
pointerany SPIR-V pointer type
stride8/16/32/64-bit integer
columnmajorbool

Results: 

ResultDescription
resultany SPIR-V cooperative matrix type

spv.CooperativeMatrixMulAddNV (::mlir::spirv::CooperativeMatrixMulAddNVOp) 

See extension SPV_NV_cooperative_matrix

Syntax:

operation ::= `spv.CooperativeMatrixMulAddNV` operands attr-dict`:` type($a) `,` type($b) `->` type($c)

Linear-algebraic matrix multiply of A by B and then component-wise add C. The order of the operations is implementation-dependent. The internal precision of floating-point operations is defined by the client API. Integer operations are performed at the precision of the Result Type and are exact unless there is overflow or underflow, in which case the result is undefined.

Result Type must be a cooperative matrix type with M rows and N columns.

A is a cooperative matrix with M rows and K columns.

B is a cooperative matrix with K rows and N columns.

C is a cooperative matrix with M rows and N columns.

The values of M, N, and K must be consistent across the result and operands. This is referred to as an MxNxK matrix multiply.

A, B, C, and Result Type must have the same scope, and this defines the scope of the operation. A, B, C, and Result Type need not necessarily have the same component type, this is defined by the client API.

If the Component Type of any matrix operand is an integer type, then its components are treated as signed if its Component Type has Signedness of 1 and are treated as unsigned otherwise.

For a given dynamic instance of this instruction, all invocations in a given scope instance must be active or all must be inactive (where the scope is the scope of the operation).

cooperative-matrixmuladd-op ::= ssa-id `=` `spv.CooperativeMatrixMulAddNV`
                          ssa-use `,` ssa-use `,` ssa-use ` : `
                          a-cooperative-matrix-type,
                          b-cooperative-matrix-type ->
                          result-cooperative-matrix-type

For example:

%0 = spv.CooperativeMatrixMulAddNV %arg0, %arg1, %arg2,  :
  !spv.coopmatrix<Subgroup, i32, 8, 16>

Operands: 

OperandDescription
aany SPIR-V cooperative matrix type
bany SPIR-V cooperative matrix type
cany SPIR-V cooperative matrix type

Results: 

ResultDescription
resultany SPIR-V cooperative matrix type

spv.CooperativeMatrixStoreNV (::mlir::spirv::CooperativeMatrixStoreNVOp) 

See extension SPV_NV_cooperative_matrix

Store a cooperative matrix through a pointer.

Pointer is a pointer into an array. Its type must be an OpTypePointer whose Type operand is a scalar or vector type. The storage class of Pointer must be Workgroup, StorageBuffer, or (if SPV_EXT_physical_storage_buffer is supported) PhysicalStorageBufferEXT.

Object is the object to store. Its type must be an OpTypeCooperativeMatrixNV.

Stride is the number of elements in the array in memory between the first component of consecutive rows (or columns) in the result. It must be a scalar integer type.

ColumnMajor indicates whether the values stored to memory are arranged in column-major or row-major order. It must be a boolean constant instruction, with false indicating row major and true indicating column major.

Memory Access must be a Memory Access literal. If not present, it is the same as specifying None.

coop-matrix-store-op ::= `spv.CooperativeMatrixStoreNV `
                          ssa-use `, ` ssa-use `, `
                          ssa-use `, ` ssa-use `, `
                          (`[` memory-access `]`)? `:`
                          pointer-type `,` spirv-element-type

For example:

  spv.CooperativeMatrixStoreNV %arg0, %arg2, %arg1, %arg3 :
    !spv.ptr<i32, StorageBuffer>, !spv.coopmatrix<Workgroup, i32, 16, 8>

Attributes: 

AttributeMLIR TypeDescription
memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess

Operands: 

OperandDescription
pointerany SPIR-V pointer type
objectany SPIR-V cooperative matrix type
stride8/16/32/64-bit integer
columnmajorbool

spv.CopyMemory (::mlir::spirv::CopyMemoryOp) 

Copy from the memory pointed to by Source to the memory pointed to by
Target. Both operands must be non-void pointers and having the same <id>
Type operand in their OpTypePointer type declaration.  Matching Storage
Class is not required.  The amount of memory copied is the size of the
type pointed to. The copied type must have a fixed size; i.e., it cannot
be, nor include, any OpTypeRuntimeArray types.

If present, any Memory Operands must begin with a memory operand literal. If not present, it is the same as specifying the memory operand None. Before version 1.4, at most one memory operands mask can be provided. Starting with version 1.4 two masks can be provided, as described in Memory Operands. If no masks or only one mask is present, it applies to both Source and Target. If two masks are present, the first applies to Target and cannot include MakePointerVisible, and the second applies to Source and cannot include MakePointerAvailable.

copy-memory-op ::= `spv.CopyMemory ` storage-class ssa-use
                   storage-class ssa-use
                   (`[` memory-access `]` (`, [` memory-access `]`)?)?
                   ` : ` spirv-element-type

Example: 

%0 = spv.Variable : !spv.ptr<f32, Function>
%1 = spv.Variable : !spv.ptr<f32, Function>
spv.CopyMemory "Function" %0, "Function" %1 : f32

Attributes: 

AttributeMLIR TypeDescription
memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess
alignment::mlir::IntegerAttr32-bit signless integer attribute
source_memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess
source_alignment::mlir::IntegerAttr32-bit signless integer attribute

Operands: 

OperandDescription
targetany SPIR-V pointer type
sourceany SPIR-V pointer type

spv.EntryPoint (::mlir::spirv::EntryPointOp) 

Declare an entry point, its execution model, and its interface.

Execution Model is the execution model for the entry point and its static call tree. See Execution Model.

Entry Point must be the Result of an OpFunction instruction.

Name is a name string for the entry point. A module cannot have two OpEntryPoint instructions with the same Execution Model and the same Name string.

Interface is a list of symbol references to spv.globalVariable operations. These declare the set of global variables from a module that form the interface of this entry point. The set of Interface symbols must be equal to or a superset of the spv.globalVariables referenced by the entry point’s static call tree, within the interface’s storage classes. Before version 1.4, the interface’s storage classes are limited to the Input and Output storage classes. Starting with version 1.4, the interface’s storage classes are all storage classes used in declaring all global variables referenced by the entry point’s call tree.

execution-model ::= "Vertex" | "TesellationControl" |
                    <and other SPIR-V execution models...>

entry-point-op ::= ssa-id `=` `spv.EntryPoint` execution-model
                   symbol-reference (`, ` symbol-reference)*

Example: 

spv.EntryPoint "GLCompute" @foo
spv.EntryPoint "Kernel" @foo, @var1, @var2

Attributes: 

AttributeMLIR TypeDescription
execution_model::mlir::IntegerAttrvalid SPIR-V ExecutionModel
fn::mlir::FlatSymbolRefAttrflat symbol reference attribute
interface::mlir::ArrayAttrsymbol ref array attribute

spv.ExecutionMode (::mlir::spirv::ExecutionModeOp) 

Declare an execution mode for an entry point.

Entry Point must be the Entry Point operand of an OpEntryPoint instruction.

Mode is the execution mode. See Execution Mode.

This instruction is only valid when the Mode operand is an execution mode that takes no Extra Operands, or takes Extra Operands that are not operands.

execution-mode ::= "Invocations" | "SpacingEqual" |
                   <and other SPIR-V execution modes...>

execution-mode-op ::= `spv.ExecutionMode ` ssa-use execution-mode
                      (integer-literal (`, ` integer-literal)* )?

Example: 

spv.ExecutionMode @foo "ContractionOff"
spv.ExecutionMode @bar "LocalSizeHint", 3, 4, 5

Attributes: 

AttributeMLIR TypeDescription
fn::mlir::FlatSymbolRefAttrflat symbol reference attribute
execution_mode::mlir::IntegerAttrvalid SPIR-V ExecutionMode
values::mlir::ArrayAttr32-bit integer array attribute

spv.FAdd (::mlir::spirv::FAddOp) 

Floating-point addition of Operand 1 and Operand 2.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fadd-op ::= ssa-id `=` `spv.FAdd` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FAdd %0, %1 : f32
%5 = spv.FAdd %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FConvert (::mlir::spirv::FConvertOp) 

Convert value numerically from one floating-point width to another
width.

Result Type must be a scalar or vector of floating-point type.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type. The component width cannot equal the component width in Result Type.

Results are computed per component.

f-convert-op ::= ssa-id `=` `spv.FConvertOp` ssa-use
                 `:` operand-type `to` result-type

Example: 

%1 = spv.FConvertOp %0 : f32 to f64
%3 = spv.FConvertOp %2 : vector<3xf32> to vector<3xf64>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FDiv (::mlir::spirv::FDivOp) 

Floating-point division of Operand 1 divided by Operand 2.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fdiv-op ::= ssa-id `=` `spv.FDiv` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FDiv %0, %1 : f32
%5 = spv.FDiv %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FMod (::mlir::spirv::FModOp) 

The floating-point remainder whose sign matches the sign of Operand 2.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 2.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmod-op ::= ssa-id `=` `spv.FMod` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FMod %0, %1 : f32
%5 = spv.FMod %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FMul (::mlir::spirv::FMulOp) 

Floating-point multiplication of Operand 1 and Operand 2.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmul-op ::= `spv.FMul` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FMul %0, %1 : f32
%5 = spv.FMul %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FNegate (::mlir::spirv::FNegateOp) 

Inverts the sign bit of Operand. (Note, however, that OpFNegate is still
considered a floating-point instruction, and so is subject to the
general floating-point rules regarding, for example, subnormals and NaN
propagation).

Result Type must be a scalar or vector of floating-point type.

The type of Operand must be the same as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmul-op ::= `spv.FNegate` ssa-use `:` float-scalar-vector-type

Example: 

%1 = spv.FNegate %0 : f32
%3 = spv.FNegate %2 : vector<4xf32>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.FOrdEqual (::mlir::spirv::FOrdEqualOp) 

Floating-point comparison for being ordered and equal.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordequal-op ::= ssa-id `=` `spv.FOrdEqual` ssa-use, ssa-use

Example: 

%4 = spv.FOrdEqual %0, %1 : f32
%5 = spv.FOrdEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FOrdGreaterThanEqual (::mlir::spirv::FOrdGreaterThanEqualOp) 

Floating-point comparison if operands are ordered and Operand 1 is
greater than or equal to Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordgte-op ::= ssa-id `=` `spv.FOrdGreaterThanEqual` ssa-use, ssa-use

Example: 

%4 = spv.FOrdGreaterThanEqual %0, %1 : f32
%5 = spv.FOrdGreaterThanEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FOrdGreaterThan (::mlir::spirv::FOrdGreaterThanOp) 

Floating-point comparison if operands are ordered and Operand 1 is
greater than  Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordgt-op ::= ssa-id `=` `spv.FOrdGreaterThan` ssa-use, ssa-use

Example: 

%4 = spv.FOrdGreaterThan %0, %1 : f32
%5 = spv.FOrdGreaterThan %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FOrdLessThanEqual (::mlir::spirv::FOrdLessThanEqualOp) 

Floating-point comparison if operands are ordered and Operand 1 is less
than or equal to Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordlte-op ::= ssa-id `=` `spv.FOrdLessThanEqual` ssa-use, ssa-use

Example: 

%4 = spv.FOrdLessThanEqual %0, %1 : f32
%5 = spv.FOrdLessThanEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FOrdLessThan (::mlir::spirv::FOrdLessThanOp) 

Floating-point comparison if operands are ordered and Operand 1 is less
than Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordlt-op ::= ssa-id `=` `spv.FOrdLessThan` ssa-use, ssa-use

Example: 

%4 = spv.FOrdLessThan %0, %1 : f32
%5 = spv.FOrdLessThan %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FOrdNotEqual (::mlir::spirv::FOrdNotEqualOp) 

Floating-point comparison for being ordered and not equal.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordneq-op ::= ssa-id `=` `spv.FOrdNotEqual` ssa-use, ssa-use

Example: 

%4 = spv.FOrdNotEqual %0, %1 : f32
%5 = spv.FOrdNotEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FRem (::mlir::spirv::FRemOp) 

The floating-point remainder whose sign matches the sign of Operand 1.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 1.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
frem-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FSub (::mlir::spirv::FSubOp) 

Floating-point subtraction of Operand 2 from Operand 1.

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fsub-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
                      `:` float-scalar-vector-type

Example: 

%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16 or Cooperative Matrix of 16/32/64-bit float values

spv.FUnordEqual (::mlir::spirv::FUnordEqualOp) 

Floating-point comparison for being unordered or equal.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordequal-op ::= ssa-id `=` `spv.FUnordEqual` ssa-use, ssa-use

Example: 

%4 = spv.FUnordEqual %0, %1 : f32
%5 = spv.FUnordEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FUnordGreaterThanEqual (::mlir::spirv::FUnordGreaterThanEqualOp) 

Floating-point comparison if operands are unordered or Operand 1 is
greater than or equal to Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordgte-op ::= ssa-id `=` `spv.FUnordGreaterThanEqual` ssa-use, ssa-use

Example: 

%4 = spv.FUnordGreaterThanEqual %0, %1 : f32
%5 = spv.FUnordGreaterThanEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FUnordGreaterThan (::mlir::spirv::FUnordGreaterThanOp) 

Floating-point comparison if operands are unordered or Operand 1 is
greater than  Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordgt-op ::= ssa-id `=` `spv.FUnordGreaterThan` ssa-use, ssa-use

Example: 

%4 = spv.FUnordGreaterThan %0, %1 : f32
%5 = spv.FUnordGreaterThan %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FUnordLessThanEqual (::mlir::spirv::FUnordLessThanEqualOp) 

Floating-point comparison if operands are unordered or Operand 1 is less
than or equal to Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordlte-op ::= ssa-id `=` `spv.FUnordLessThanEqual` ssa-use, ssa-use

Example: 

%4 = spv.FUnordLessThanEqual %0, %1 : f32
%5 = spv.FUnordLessThanEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FUnordLessThan (::mlir::spirv::FUnordLessThanOp) 

Floating-point comparison if operands are unordered or Operand 1 is less
than Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordlt-op ::= ssa-id `=` `spv.FUnordLessThan` ssa-use, ssa-use

Example: 

%4 = spv.FUnordLessThan %0, %1 : f32
%5 = spv.FUnordLessThan %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.FUnordNotEqual (::mlir::spirv::FUnordNotEqualOp) 

Floating-point comparison for being unordered or not equal.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordneq-op ::= ssa-id `=` `spv.FUnordNotEqual` ssa-use, ssa-use

Example: 

%4 = spv.FUnordNotEqual %0, %1 : f32
%5 = spv.FUnordNotEqual %2, %3 : vector<4xf32>

Operands: 

OperandDescription
operand116/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
operand216/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.func (::mlir::spirv::FuncOp) 

Declare or define a function

This op declares or defines a SPIR-V function using one region, which contains one or more blocks.

Different from the SPIR-V binary format, this op is not allowed to implicitly capture global values, and all external references must use function arguments or symbol references. This op itself defines a symbol that is unique in the enclosing module op.

This op itself takes no operands and generates no results. Its region can take zero or more arguments and return zero or one values.

spv-function-control ::= "None" | "Inline" | "DontInline" | ...
spv-function-op ::= `spv.func` function-signature
                     spv-function-control region

Example: 

spv.func @foo() -> () "None" { ... }
spv.func @bar() -> () "Inline|Pure" { ... }

Attributes: 

AttributeMLIR TypeDescription
type::mlir::TypeAttrany type attribute
sym_name::mlir::StringAttrstring attribute
function_control::mlir::IntegerAttrvalid SPIR-V FunctionControl

spv.FunctionCall (::mlir::spirv::FunctionCallOp) 

Call a function.

Syntax:

operation ::= `spv.FunctionCall` $callee `(` $arguments `)` attr-dict `:`
              functional-type($arguments, results)

Result Type is the type of the return value of the function. It must be the same as the Return Type operand of the Function Type operand of the Function operand.

Function is an OpFunction instruction. This could be a forward reference.

Argument N is the object to copy to parameter N of Function.

Note: A forward call is possible because there is no missing type information: Result Type must match the Return Type of the function, and the calling argument types must match the formal parameter types.

function-call-op ::= `spv.FunctionCall` function-id `(` ssa-use-list `)`
                 `:` function-type

Example: 

spv.FunctionCall @f_void(%arg0) : (i32) ->  ()
%0 = spv.FunctionCall @f_iadd(%arg0, %arg1) : (i32, i32) -> i32

Attributes: 

AttributeMLIR TypeDescription
callee::mlir::FlatSymbolRefAttrflat symbol reference attribute

Operands: 

OperandDescription
argumentsvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

Results: 

ResultDescription
resultvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.GLSL.Acos (::mlir::spirv::GLSLAcosOp) 

Arc Cosine of operand in radians

The standard trigonometric arc cosine of x radians.

Result is an angle, in radians, whose cosine is x. The range of result values is [0, π]. Result is undefined if abs x > 1.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
acos-op ::= ssa-id `=` `spv.GLSL.Acos` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Acos %0 : f32
%3 = spv.GLSL.Acos %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Asin (::mlir::spirv::GLSLAsinOp) 

Arc Sine of operand in radians

The standard trigonometric arc sine of x radians.

Result is an angle, in radians, whose sine is x. The range of result values is [-π / 2, π / 2]. Result is undefined if abs x > 1.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
asin-op ::= ssa-id `=` `spv.GLSL.Asin` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Asin %0 : f32
%3 = spv.GLSL.Asin %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Atan (::mlir::spirv::GLSLAtanOp) 

Arc Tangent of operand in radians

The standard trigonometric arc tangent of x radians.

Result is an angle, in radians, whose tangent is y_over_x. The range of result values is [-π / 2, π / 2].

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
atan-op ::= ssa-id `=` `spv.GLSL.Atan` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Atan %0 : f32
%3 = spv.GLSL.Atan %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Ceil (::mlir::spirv::GLSLCeilOp) 

Rounds up to the next whole number

Result is the value equal to the nearest whole number that is greater than or equal to x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
ceil-op ::= ssa-id `=` `spv.GLSL.Ceil` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.Ceil %0 : f32
%3 = spv.GLSL.Ceil %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.Cos (::mlir::spirv::GLSLCosOp) 

Cosine of operand in radians

The standard trigonometric cosine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
cos-op ::= ssa-id `=` `spv.GLSL.Cos` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Cos %0 : f32
%3 = spv.GLSL.Cos %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Cosh (::mlir::spirv::GLSLCoshOp) 

Hyperbolic cosine of operand in radians

Hyperbolic cosine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
cosh-op ::= ssa-id `=` `spv.GLSL.Cosh` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Cosh %0 : f32
%3 = spv.GLSL.Cosh %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Exp (::mlir::spirv::GLSLExpOp) 

Exponentiation of Operand 1

Result is the natural exponentiation of x; e^x.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.";

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
exp-op ::= ssa-id `=` `spv.GLSL.Exp` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Exp %0 : f32
%3 = spv.GLSL.Exp %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.FAbs (::mlir::spirv::GLSLFAbsOp) 

Absolute value of operand

Result is x if x >= 0; otherwise result is -x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
abs-op ::= ssa-id `=` `spv.GLSL.FAbs` ssa-use `:`
           float-scalar-vector-type

Example: 

%2 = spv.GLSL.FAbs %0 : f32
%3 = spv.GLSL.FAbs %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.FMax (::mlir::spirv::GLSLFMaxOp) 

Return maximum of two floating-point operands

Result is y if x < y; otherwise result is x. Which operand is the result is undefined if one of the operands is a NaN.

The operands must all be a scalar or vector whose component type is floating-point.

Result Type and the type of all operands must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmax-op ::= ssa-id `=` `spv.GLSL.FMax` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.FMax %0, %1 : f32
%3 = spv.GLSL.FMax %0, %1 : vector<3xf16>

Operands: 

OperandDescription
lhs16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
rhs16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.FMin (::mlir::spirv::GLSLFMinOp) 

Return minimum of two floating-point operands

Result is y if y < x; otherwise result is x. Which operand is the result is undefined if one of the operands is a NaN.

The operands must all be a scalar or vector whose component type is floating-point.

Result Type and the type of all operands must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmin-op ::= ssa-id `=` `spv.GLSL.FMin` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.FMin %0, %1 : f32
%3 = spv.GLSL.FMin %0, %1 : vector<3xf16>

Operands: 

OperandDescription
lhs16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
rhs16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.FSign (::mlir::spirv::GLSLFSignOp) 

Returns the sign of the operand

Result is 1.0 if x > 0, 0.0 if x = 0, or -1.0 if x < 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
sign-op ::= ssa-id `=` `spv.GLSL.FSign` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.FSign %0 : f32
%3 = spv.GLSL.FSign %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.Floor (::mlir::spirv::GLSLFloorOp) 

Rounds down to the next whole number

Result is the value equal to the nearest whole number that is less than or equal to x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
floor-op ::= ssa-id `=` `spv.GLSL.Floor` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.Floor %0 : f32
%3 = spv.GLSL.Floor %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.InverseSqrt (::mlir::spirv::GLSLInverseSqrtOp) 

Reciprocal of sqrt(operand)

Result is the reciprocal of sqrt x. Result is undefined if x <= 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
rsqrt-op ::= ssa-id `=` `spv.GLSL.InverseSqrt` ssa-use `:`
             float-scalar-vector-type

Example: 

%2 = spv.GLSL.InverseSqrt %0 : f32
%3 = spv.GLSL.InverseSqrt %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.Log (::mlir::spirv::GLSLLogOp) 

Natural logarithm of the operand

Result is the natural logarithm of x, i.e., the value y which satisfies the equation x = ey. Result is undefined if x <= 0.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
log-op ::= ssa-id `=` `spv.GLSL.Log` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Log %0 : f32
%3 = spv.GLSL.Log %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Pow (::mlir::spirv::GLSLPowOp) 

Return x raised to the y power of two operands

Result is x raised to the y power; x^y.

Result is undefined if x = 0 and y ≤ 0.

The operand x and y must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of all operands must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
pow-op ::= ssa-id `=` `spv.GLSL.Pow` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Pow %0, %1 : f32
%3 = spv.GLSL.Pow %0, %1 : vector<3xf16>

Operands: 

OperandDescription
lhs16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16
rhs16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Round (::mlir::spirv::GLSLRoundOp) 

Rounds to the whole number

Result is the value equal to the nearest whole number.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
floor-op ::= ssa-id `=` `spv.GLSL.Round` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.Round %0 : f32
%3 = spv.GLSL.Round %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.SAbs (::mlir::spirv::GLSLSAbsOp) 

Absolute value of operand

Result is x if x ≥ 0; otherwise result is -x, where x is interpreted as a signed integer.

Result Type and the type of x must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
abs-op ::= ssa-id `=` `spv.GLSL.SAbs` ssa-use `:`
           integer-scalar-vector-type

Example: 

%2 = spv.GLSL.SAbs %0 : i32
%3 = spv.GLSL.SAbs %1 : vector<3xi16>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GLSL.SMax (::mlir::spirv::GLSLSMaxOp) 

Return maximum of two signed integer operands

Result is y if x < y; otherwise result is x, where x and y are interpreted as signed integers.

Result Type and the type of x and y must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
smax-op ::= ssa-id `=` `spv.GLSL.SMax` ssa-use `:`
            integer-scalar-vector-type

Example: 

%2 = spv.GLSL.SMax %0, %1 : i32
%3 = spv.GLSL.SMax %0, %1 : vector<3xi16>

Operands: 

OperandDescription
lhs8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
rhs8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GLSL.SMin (::mlir::spirv::GLSLSMinOp) 

Return minimum of two signed integer operands

Result is y if y < x; otherwise result is x, where x and y are interpreted as signed integers.

Result Type and the type of x and y must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
smin-op ::= ssa-id `=` `spv.GLSL.SMin` ssa-use `:`
            integer-scalar-vector-type

Example: 

%2 = spv.GLSL.SMin %0, %1 : i32
%3 = spv.GLSL.SMin %0, %1 : vector<3xi16>

Operands: 

OperandDescription
lhs8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
rhs8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GLSL.SSign (::mlir::spirv::GLSLSSignOp) 

Returns the sign of the operand

Result is 1 if x > 0, 0 if x = 0, or -1 if x < 0, where x is interpreted as a signed integer.

Result Type and the type of x must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
sign-op ::= ssa-id `=` `spv.GLSL.SSign` ssa-use `:`
            integer-scalar-vector-type

Example: 

%2 = spv.GLSL.SSign %0 : i32
%3 = spv.GLSL.SSign %1 : vector<3xi16>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GLSL.Sin (::mlir::spirv::GLSLSinOp) 

Sine of operand in radians

The standard trigonometric sine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
sin-op ::= ssa-id `=` `spv.GLSL.Sin` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Sin %0 : f32
%3 = spv.GLSL.Sin %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Sinh (::mlir::spirv::GLSLSinhOp) 

Hyperbolic sine of operand in radians

Hyperbolic sine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
sinh-op ::= ssa-id `=` `spv.GLSL.Sinh` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Sinh %0 : f32
%3 = spv.GLSL.Sinh %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Sqrt (::mlir::spirv::GLSLSqrtOp) 

Returns the square root of the operand

Result is the square root of x. Result is undefined if x < 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
sqrt-op ::= ssa-id `=` `spv.GLSL.Sqrt` ssa-use `:`
            float-scalar-vector-type

Example: 

%2 = spv.GLSL.Sqrt %0 : f32
%3 = spv.GLSL.Sqrt %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GLSL.Tan (::mlir::spirv::GLSLTanOp) 

Tangent of operand in radians

The standard trigonometric tangent of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
tan-op ::= ssa-id `=` `spv.GLSL.Tan` ssa-use `:`
           restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Tan %0 : f32
%3 = spv.GLSL.Tan %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.GLSL.Tanh (::mlir::spirv::GLSLTanhOp) 

Hyperbolic tangent of operand in radians

Hyperbolic tangent of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
tanh-op ::= ssa-id `=` `spv.GLSL.Tanh` ssa-use `:`
            restricted-float-scalar-vector-type

Example: 

%2 = spv.GLSL.Tanh %0 : f32
%3 = spv.GLSL.Tanh %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32-bit float or vector of 16/32-bit float values of length 2/3/4/8/16

spv.globalVariable (::mlir::spirv::GlobalVariableOp) 

Allocate an object in memory at module scope. The object is
referenced using a symbol name.

The variable type must be an OpTypePointer. Its type operand is the type of object in memory.

Storage Class is the Storage Class of the memory holding the object. It cannot be Generic. It must be the same as the Storage Class operand of the variable types. Only those storage classes that are valid at module scope (like Input, Output, StorageBuffer, etc.) are valid.

Initializer is optional. If Initializer is present, it will be the initial value of the variable’s memory content. Initializer must be an symbol defined from a constant instruction or other spv.globalVariable operation in module scope. Initializer must have the same type as the type of the defined symbol.

variable-op ::= `spv.globalVariable` spirv-type symbol-ref-id
                (`initializer(` symbol-ref-id `)`)?
                (`bind(` integer-literal, integer-literal `)`)?
                (`built_in(` string-literal `)`)?
                attribute-dict?

where initializer specifies initializer and bind specifies the descriptor set and binding number. built_in specifies SPIR-V BuiltIn decoration associated with the op.

Example: 

spv.globalVariable @var0 : !spv.ptr<f32, Input> @var0
spv.globalVariable @var1 initializer(@var0) : !spv.ptr<f32, Output>
spv.globalVariable @var2 bind(1, 2) : !spv.ptr<f32, Uniform>
spv.globalVariable @var3 built_in("GlobalInvocationId") : !spv.ptr<vector<3xi32>, Input>

Attributes: 

AttributeMLIR TypeDescription
type::mlir::TypeAttrany type attribute
sym_name::mlir::StringAttrstring attribute
initializer::mlir::FlatSymbolRefAttrflat symbol reference attribute

spv.GroupBroadcast (::mlir::spirv::GroupBroadcastOp) 

Return the Value of the invocation identified by the local id LocalId to
all invocations in the group.

Syntax:

operation ::= `spv.GroupBroadcast` $execution_scope operands attr-dict `:` type($value) `,` type($localid)

All invocations of this module within Execution must reach this point of execution.

Behavior is undefined if this instruction is used in control flow that is non-uniform within Execution.

Result Type must be a scalar or vector of floating-point type, integer type, or Boolean type.

Execution must be Workgroup or Subgroup Scope.

The type of Value must be the same as Result Type.

LocalId must be an integer datatype. It can be a scalar, or a vector with 2 components or a vector with 3 components. LocalId must be the same for all invocations in the group.

scope ::= `"Workgroup"` | `"Subgroup"`
integer-float-scalar-vector-type ::= integer-type | float-type |
                           `vector<` integer-literal `x` integer-type `>` |
                           `vector<` integer-literal `x` float-type `>`
localid-type ::= integer-type |
               `vector<` integer-literal `x` integer-type `>`
group-broadcast-op ::= ssa-id `=` `spv.GroupBroadcast` scope ssa_use,
               ssa_use `:` integer-float-scalar-vector-type `,` localid-type
```mlir

#### Example:

%scalar_value = … : f32 %vector_value = … : vector<4xf32> %scalar_localid = … : i32 %vector_localid = … : vector<3xi32> %0 = spv.GroupBroadcast “Subgroup” %scalar_value, %scalar_localid : f32, i32 %1 = spv.GroupBroadcast “Workgroup” %vector_value, %vector_localid : vector<4xf32>, vector<3xi32>


#### Attributes:

| Attribute | MLIR Type | Description |
| :-------: | :-------: | ----------- |
`execution_scope` | ::mlir::IntegerAttr | valid SPIR-V Scope

#### Operands:

| Operand | Description |
| :-----: | ----------- |
`value` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type
`localid` | 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

### `spv.GroupNonUniformBallot` (::mlir::spirv::GroupNonUniformBallotOp)


    Returns a bitfield value combining the Predicate value from all
    invocations in the group that execute the same dynamic instance of this
    instruction. The bit is set to one if the corresponding invocation is
    active and the Predicate for that invocation evaluated to true;
    otherwise, it is set to zero.
  


Syntax:

operation ::= spv.GroupNonUniformBallot $execution_scope $predicate attr-dict : type($result)


Result Type  must be a vector of four components of integer type scalar,
whose Signedness operand is 0.

Result is a set of bitfields where the first invocation is represented
in the lowest bit of the first vector component and the last (up to the
size of the group) is the higher bit number of the last bitmask needed
to represent all bits of the group invocations.

Execution must be Workgroup or Subgroup Scope.

Predicate must be a Boolean type.

<!-- End of AutoGen section -->

scope ::= "Workgroup" | "Subgroup" non-uniform-ballot-op ::= ssa-id = spv.GroupNonUniformBallot scope ssa-use : vector < 4 x integer-type >


#### Example:

```mlir
%0 = spv.GroupNonUniformBallot "SubGroup" %predicate : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope

Operands: 

OperandDescription
predicatebool

Results: 

ResultDescription
resultvector of 8/16/32/64-bit signless/unsigned integer values of length 4

spv.GroupNonUniformBroadcast (::mlir::spirv::GroupNonUniformBroadcastOp) 

Return the Value of the invocation identified by the id Id to all active
invocations in the group.

Syntax:

operation ::= `spv.GroupNonUniformBroadcast` $execution_scope operands attr-dict `:` type($value) `,` type($id)

Result Type must be a scalar or vector of floating-point type, integer type, or Boolean type.

Execution must be Workgroup or Subgroup Scope.

The type of Value must be the same as Result Type.

Id must be a scalar of integer type, whose Signedness operand is 0.

Before version 1.5, Id must come from a constant instruction. Starting with version 1.5, Id must be dynamically uniform.

The resulting value is undefined if Id is an inactive invocation, or is greater than or equal to the size of the group.

scope ::= `"Workgroup"` | `"Subgroup"`
integer-float-scalar-vector-type ::= integer-type | float-type |
                           `vector<` integer-literal `x` integer-type `>` |
                           `vector<` integer-literal `x` float-type `>`
group-non-uniform-broadcast-op ::= ssa-id `=` 
         `spv.GroupNonUniformBroadcast` scope ssa_use,
            ssa_use `:` integer-float-scalar-vector-type `,` integer-type
```mlir

#### Example:

%scalar_value = … : f32 %vector_value = … : vector<4xf32> %id = … : i32 %0 = spv.GroupNonUniformBroadcast “Subgroup” %scalar_value, %id : f32, i32 %1 = spv.GroupNonUniformBroadcast “Workgroup” %vector_value, %id : vector<4xf32>, i32


#### Attributes:

| Attribute | MLIR Type | Description |
| :-------: | :-------: | ----------- |
`execution_scope` | ::mlir::IntegerAttr | valid SPIR-V Scope

#### Operands:

| Operand | Description |
| :-----: | ----------- |
`value` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type
`id` | 8/16/32/64-bit integer

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

### `spv.GroupNonUniformElect` (::mlir::spirv::GroupNonUniformElectOp)


    Result is true only in the active invocation with the lowest id in the
    group, otherwise result is false.
  


Syntax:

operation ::= spv.GroupNonUniformElect $execution_scope attr-dict : type($result)


Result Type must be a Boolean type.

Execution must be Workgroup or Subgroup Scope.

<!-- End of AutoGen section -->

scope ::= "Workgroup" | "Subgroup" non-uniform-elect-op ::= ssa-id = spv.GroupNonUniformElect scope : i1


#### Example:

```mlir
%0 = spv.GroupNonUniformElect : i1

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope

Results: 

ResultDescription
resultbool

spv.GroupNonUniformFAdd (::mlir::spirv::GroupNonUniformFAddOp) 

A floating point add group operation of all Value operands contributed
by active invocations in the group.

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fadd-op ::= ssa-id `=` `spv.GroupNonUniformFAdd` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFAdd "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFAdd "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GroupNonUniformFMax (::mlir::spirv::GroupNonUniformFMaxOp) 

A floating point maximum group operation of all Value operands
contributed by active invocations in by group.

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is -INF. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined. From the set of Value(s) provided by active invocations within a subgroup, if for any two Values one of them is a NaN, the other is chosen. If all Value(s) that are used by the current invocation are NaN, then the result is an undefined value.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmax-op ::= ssa-id `=` `spv.GroupNonUniformFMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMax "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GroupNonUniformFMin (::mlir::spirv::GroupNonUniformFMinOp) 

A floating point minimum group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is +INF. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined. From the set of Value(s) provided by active invocations within a subgroup, if for any two Values one of them is a NaN, the other is chosen. If all Value(s) that are used by the current invocation are NaN, then the result is an undefined value.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmin-op ::= ssa-id `=` `spv.GroupNonUniformFMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMin "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GroupNonUniformFMul (::mlir::spirv::GroupNonUniformFMulOp) 

A floating point multiply group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 1. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmul-op ::= ssa-id `=` `spv.GroupNonUniformFMul` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMul "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMul "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.GroupNonUniformIAdd (::mlir::spirv::GroupNonUniformIAddOp) 

An integer add group operation of all Value operands contributed by
active invocations in the group.

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-iadd-op ::= ssa-id `=` `spv.GroupNonUniformIAdd` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformIAdd "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformIAdd "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GroupNonUniformIMul (::mlir::spirv::GroupNonUniformIMulOp) 

An integer multiply group operation of all Value operands contributed by
active invocations in the group.

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 1. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-imul-op ::= ssa-id `=` `spv.GroupNonUniformIMul` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformIMul "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformIMul "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GroupNonUniformSMax (::mlir::spirv::GroupNonUniformSMaxOp) 

A signed integer maximum group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is INT_MIN. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-smax-op ::= ssa-id `=` `spv.GroupNonUniformSMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformSMax "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformSMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GroupNonUniformSMin (::mlir::spirv::GroupNonUniformSMinOp) 

A signed integer minimum group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is INT_MAX. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-smin-op ::= ssa-id `=` `spv.GroupNonUniformSMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformSMin "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformSMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GroupNonUniformUMax (::mlir::spirv::GroupNonUniformUMaxOp) 

An unsigned integer maximum group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-umax-op ::= ssa-id `=` `spv.GroupNonUniformUMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformUMax "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformUMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.GroupNonUniformUMin (::mlir::spirv::GroupNonUniformUMinOp) 

An unsigned integer minimum group operation of all Value operands
contributed by active invocations in the group.

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is UINT_MAX. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-umin-op ::= ssa-id `=` `spv.GroupNonUniformUMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

Example: 

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformUMin "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformUMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Attributes: 

AttributeMLIR TypeDescription
execution_scope::mlir::IntegerAttrvalid SPIR-V Scope
group_operation::mlir::IntegerAttrvalid SPIR-V GroupOperation

Operands: 

OperandDescription
value8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
cluster_size8/16/32/64-bit integer

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.IAdd (::mlir::spirv::IAddOp) 

Integer addition of Operand 1 and Operand 2.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
iadd-op ::= ssa-id `=` `spv.IAdd` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

Example: 

%4 = spv.IAdd %0, %1 : i32
%5 = spv.IAdd %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.IEqual (::mlir::spirv::IEqualOp) 

Integer comparison for equality.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
iequal-op ::= ssa-id `=` `spv.IEqual` ssa-use, ssa-use
                         `:` integer-scalar-vector-type

Example: 

%4 = spv.IEqual %0, %1 : i32
%5 = spv.IEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.IMul (::mlir::spirv::IMulOp) 

Integer multiplication of Operand 1 and Operand 2.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
imul-op ::= ssa-id `=` `spv.IMul` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

Example: 

%4 = spv.IMul %0, %1 : i32
%5 = spv.IMul %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.INotEqual (::mlir::spirv::INotEqualOp) 

Integer comparison for inequality.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
inot-equal-op ::= ssa-id `=` `spv.INotEqual` ssa-use, ssa-use
                             `:` integer-scalar-vector-type

Example: 

%4 = spv.INotEqual %0, %1 : i32
%5 = spv.INotEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.ISub (::mlir::spirv::ISubOp) 

Integer subtraction of Operand 2 from Operand 1.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
isub-op ::= `spv.ISub` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

Example: 

%4 = spv.ISub %0, %1 : i32
%5 = spv.ISub %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.Load (::mlir::spirv::LoadOp) 

Load through a pointer.

Result Type is the type of the loaded object. It must be a type with fixed size; i.e., it cannot be, nor include, any OpTypeRuntimeArray types.

Pointer is the pointer to load through. Its type must be an OpTypePointer whose Type operand is the same as Result Type.

If present, any Memory Operands must begin with a memory operand literal. If not present, it is the same as specifying the memory operand None.

memory-access ::= `"None"` | `"Volatile"` | `"Aligned", ` integer-literal
                | `"NonTemporal"`

load-op ::= ssa-id ` = spv.Load ` storage-class ssa-use
            (`[` memory-access `]`)? ` : ` spirv-element-type

Example: 

%0 = spv.Variable : !spv.ptr<f32, Function>
%1 = spv.Load "Function" %0 : f32
%2 = spv.Load "Function" %0 ["Volatile"] : f32
%3 = spv.Load "Function" %0 ["Aligned", 4] : f32

Attributes: 

AttributeMLIR TypeDescription
memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess
alignment::mlir::IntegerAttr32-bit signless integer attribute

Operands: 

OperandDescription
ptrany SPIR-V pointer type

Results: 

ResultDescription
valuevoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.LogicalAnd (::mlir::spirv::LogicalAndOp) 

Result is true if both Operand 1 and Operand 2 are true. Result is false
if either Operand 1 or Operand 2 are false.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

logical-and ::= `spv.LogicalAnd` ssa-use `,` ssa-use
                `:` operand-type

Example: 

%2 = spv.LogicalAnd %0, %1 : i1
%2 = spv.LogicalAnd %0, %1 : vector<4xi1>

Operands: 

OperandDescription
operand1bool or vector of bool values of length 2/3/4/8/16
operand2bool or vector of bool values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.LogicalEqual (::mlir::spirv::LogicalEqualOp) 

Result is true if Operand 1 and Operand 2 have the same value. Result is
false if Operand 1 and Operand 2 have different values.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

logical-equal ::= `spv.LogicalEqual` ssa-use `,` ssa-use
                  `:` operand-type

Example: 

%2 = spv.LogicalEqual %0, %1 : i1
%2 = spv.LogicalEqual %0, %1 : vector<4xi1>

Operands: 

OperandDescription
operand1bool or vector of bool values of length 2/3/4/8/16
operand2bool or vector of bool values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.LogicalNotEqual (::mlir::spirv::LogicalNotEqualOp) 

Result is true if Operand 1 and Operand 2 have different values. Result
is false if Operand 1 and Operand 2 have the same value.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

logical-not-equal ::= `spv.LogicalNotEqual` ssa-use `,` ssa-use
                      `:` operand-type

Example: 

%2 = spv.LogicalNotEqual %0, %1 : i1
%2 = spv.LogicalNotEqual %0, %1 : vector<4xi1>

Operands: 

OperandDescription
operand1bool or vector of bool values of length 2/3/4/8/16
operand2bool or vector of bool values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.LogicalNot (::mlir::spirv::LogicalNotOp) 

Result is true if Operand is false.  Result is false if Operand is true.

Result Type must be a scalar or vector of Boolean type.

The type of Operand must be the same as Result Type.

Results are computed per component.

logical-not ::= `spv.LogicalNot` ssa-use `:` operand-type

Example: 

%2 = spv.LogicalNot %0 : i1
%2 = spv.LogicalNot %0 : vector<4xi1>

Operands: 

OperandDescription
operandbool or vector of bool values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.LogicalOr (::mlir::spirv::LogicalOrOp) 

Result is true if either Operand 1 or Operand 2 is true. Result is false
if both Operand 1 and Operand 2 are false.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

logical-or ::= `spv.LogicalOr` ssa-use `,` ssa-use
                `:` operand-type

Example: 

%2 = spv.LogicalOr %0, %1 : i1
%2 = spv.LogicalOr %0, %1 : vector<4xi1>

Operands: 

OperandDescription
operand1bool or vector of bool values of length 2/3/4/8/16
operand2bool or vector of bool values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.loop (::mlir::spirv::LoopOp) 

Define a structured loop.

SPIR-V can explicitly declare structured control-flow constructs using merge instructions. These explicitly declare a header block before the control flow diverges and a merge block where control flow subsequently converges. These blocks delimit constructs that must nest, and can only be entered and exited in structured ways. See “2.11. Structured Control Flow” of the SPIR-V spec for more details.

Instead of having a spv.LoopMerge op to directly model loop merge instruction for indicating the merge and continue target, we use regions to delimit the boundary of the loop: the merge target is the next op following the spv.loop op and the continue target is the block that has a back-edge pointing to the entry block inside the spv.loop's region. This way it’s easier to discover all blocks belonging to a construct and it plays nicer with the MLIR system.

The spv.loop region should contain at least four blocks: one entry block, one loop header block, one loop continue block, one loop merge block. The entry block should be the first block and it should jump to the loop header block, which is the second block. The loop merge block should be the last block. The merge block should only contain a spv.mlir.merge op. The continue block should be the second to last block and it should have a branch to the loop header block. The loop continue block should be the only block, except the entry block, branching to the header block.

Attributes: 

AttributeMLIR TypeDescription
loop_control::mlir::IntegerAttrvalid SPIR-V LoopControl

spv.MatrixTimesMatrix (::mlir::spirv::MatrixTimesMatrixOp) 

Linear-algebraic multiply of LeftMatrix X RightMatrix.

Syntax:

operation ::= `spv.MatrixTimesMatrix` operands attr-dict `:` type($leftmatrix) `,` type($rightmatrix) `->` type($result)

Result Type must be an OpTypeMatrix whose Column Type is a vector of floating-point type.

LeftMatrix must be a matrix whose Column Type is the same as the Column Type in Result Type.

RightMatrix must be a matrix with the same Component Type as the Component Type in Result Type. Its number of columns must equal the number of columns in Result Type. Its columns must have the same number of components as the number of columns in LeftMatrix.

matrix-times-matrix-op ::= ssa-id `=` `spv.MatrixTimesMatrix` ssa-use,
ssa-use `:` matrix-type `,` matrix-type `->` matrix-type
```mlir

#### Example:

%0 = spv.MatrixTimesMatrix %matrix_1, %matrix_2 : !spv.matrix<4 x vector<3xf32», !spv.matrix<3 x vector<4xf32» -> !spv.matrix<4 x vector<4xf32»


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`leftmatrix` | any SPIR-V matrix type
`rightmatrix` | any SPIR-V matrix type

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | any SPIR-V matrix type

### `spv.MatrixTimesScalar` (::mlir::spirv::MatrixTimesScalarOp)

Scale a floating-point matrix.


Syntax:

operation ::= spv.MatrixTimesScalar operands attr-dict : type($matrix) , type($scalar) -> type($result)


Result Type must be an OpTypeMatrix whose Column Type is a vector of
floating-point type.

 The type of Matrix must be the same as Result Type. Each component in
each column in Matrix is multiplied by Scalar.

Scalar must have the same type as the Component Type in Result Type.

<!-- End of AutoGen section -->

matrix-times-scalar-op ::= ssa-id = spv.MatrixTimesScalar ssa-use, ssa-use : matrix-type , float-type -> matrix-type


#### Example:

```mlir

%0 = spv.MatrixTimesScalar %matrix, %scalar :
!spv.matrix<3 x vector<3xf32>>, f32 -> !spv.matrix<3 x vector<3xf32>>

Operands: 

OperandDescription
matrixany SPIR-V matrix type
scalar16/32/64-bit float

Results: 

ResultDescription
resultany SPIR-V matrix type

spv.MemoryBarrier (::mlir::spirv::MemoryBarrierOp) 

Control the order that memory accesses are observed.

Syntax:

operation ::= `spv.MemoryBarrier` $memory_scope `,` $memory_semantics attr-dict

Ensures that memory accesses issued before this instruction will be observed before memory accesses issued after this instruction. This control is ensured only for memory accesses issued by this invocation and observed by another invocation executing within Memory scope. If the Vulkan memory model is declared, this ordering only applies to memory accesses that use the NonPrivatePointer memory operand or NonPrivateTexel image operand.

Semantics declares what kind of memory is being controlled and what kind of control to apply.

To execute both a memory barrier and a control barrier, see OpControlBarrier.

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | `"Release"` | ...

memory-barrier-op ::= `spv.MemoryBarrier` scope, memory-semantics

Example: 

spv.MemoryBarrier "Device", "Acquire|UniformMemory"

Attributes: 

AttributeMLIR TypeDescription
memory_scope::mlir::IntegerAttrvalid SPIR-V Scope
memory_semantics::mlir::IntegerAttrvalid SPIR-V MemorySemantics

spv.mlir.merge (::mlir::spirv::MergeOp) 

A special terminator for merging a structured selection/loop.

Syntax:

operation ::= `spv.mlir.merge` attr-dict

We use spv.selection/spv.loop for modelling structured selection/loop. This op is a terminator used inside their regions to mean jumping to the merge point, which is the next op following the spv.selection or spv.loop op. This op does not have a corresponding instruction in the SPIR-V binary format; it’s solely for structural purpose.

spv.mlir.endmodule (::mlir::spirv::ModuleEndOp) 

The pseudo op that ends a SPIR-V module

Syntax:

operation ::= `spv.mlir.endmodule` attr-dict

This op terminates the only block inside a spv.module's only region. This op does not have a corresponding SPIR-V instruction and thus will not be serialized into the binary format; it is used solely to satisfy the structual requirement that an block must be ended with a terminator.

spv.module (::mlir::spirv::ModuleOp) 

The top-level op that defines a SPIR-V module

This op defines a SPIR-V module using a MLIR region. The region contains one block. Module-level operations, including functions definitions, are all placed in this block.

Using an op with a region to define a SPIR-V module enables “embedding” SPIR-V modules in other dialects in a clean manner: this op guarantees the validity and serializability of a SPIR-V module and thus serves as a clear-cut boundary.

This op takes no operands and generates no results. This op should not implicitly capture values from the enclosing environment.

This op has only one region, which only contains one block. The block must be terminated via the spv.mlir.endmodule op.

addressing-model ::= `Logical` | `Physical32` | `Physical64` | ...
memory-model ::= `Simple` | `GLSL450` | `OpenCL` | `Vulkan` | ...
spv-module-op ::= `spv.module` addressing-model memory-model
                  (requires  spirv-vce-attribute)?
                  (`attributes` attribute-dict)?
                  region

Example: 

spv.module Logical GLSL450  {}

spv.module Logical Vulkan
    requires #spv.vce<v1.0, [Shader], [SPV_KHR_vulkan_memory_model]>
    attributes { some_additional_attr = ... } {
  spv.func @do_nothing() -> () {
    spv.Return
  }
}

Attributes: 

AttributeMLIR TypeDescription
addressing_model::mlir::IntegerAttrvalid SPIR-V AddressingModel
memory_model::mlir::IntegerAttrvalid SPIR-V MemoryModel
vce_triple::mlir::spirv::VerCapExtAttrversion-capability-extension attribute
sym_name::mlir::StringAttrstring attribute

spv.Not (::mlir::spirv::NotOp) 

Complement the bits of Operand.

Results are computed per component, and within each component, per bit.

esult Type must be a scalar or vector of integer type.

perand’s type must be a scalar or vector of integer type. It must ave the same number of components as Result Type. The component width ust equal the component width in Result Type.

!– End of AutoGen section –>

nteger-scalar-vector-type ::= integer-type | `vector<` integer-literal `x` integer-type `>` ot-op ::= ssa-id `=` `spv.BitNot` ssa-use `:` integer-scalar-vector-type

Example: 

mlir 2 = spv.Not %0 : i32 3 = spv.Not %1 : vector<4xi32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.OCL.exp (::mlir::spirv::OCLExpOp) 

Exponentiation of Operand 1

Compute the base-e exponential of x. (i.e. ex)

Result Type and x must be floating-point or vector(2,3,4,8,16) of floating-point values.

All of the operands, including the Result Type operand, must be of the same type.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
exp-op ::= ssa-id `=` `spv.OCL.exp` ssa-use `:`
           float-scalar-vector-type

Example: 

%2 = spv.OCL.exp %0 : f32
%3 = spv.OCL.exp %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.OCL.fabs (::mlir::spirv::OCLFAbsOp) 

Absolute value of operand

Compute the absolute value of x.

Result Type and x must be floating-point or vector(2,3,4,8,16) of floating-point values.

All of the operands, including the Result Type operand, must be of the same type.

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
abs-op ::= ssa-id `=` `spv.OCL.fabs` ssa-use `:`
           float-scalar-vector-type

Example: 

%2 = spv.OCL.fabs %0 : f32
%3 = spv.OCL.fabs %1 : vector<3xf16>

Operands: 

OperandDescription
operand16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

Results: 

ResultDescription
result16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4/8/16

spv.OCL.s_abs (::mlir::spirv::OCLSAbsOp) 

Absolute value of operand

Returns |x|, where x is treated as signed integer.

Result Type and x must be integer or vector(2,3,4,8,16) of integer values.

All of the operands, including the Result Type operand, must be of the same type.

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
abs-op ::= ssa-id `=` `spv.OCL.s_abs` ssa-use `:`
           integer-scalar-vector-type

Example: 

%2 = spv.OCL.s_abs %0 : i32
%3 = spv.OCL.s_abs %1 : vector<3xi16>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.mlir.referenceof (::mlir::spirv::ReferenceOfOp) 

Reference a specialization constant.

Syntax:

operation ::= `spv.mlir.referenceof` $spec_const attr-dict `:` type($reference)

Specialization constants in module scope are defined using symbol names. This op generates an SSA value that can be used to refer to the symbol within function scope for use in ops that expect an SSA value. This operation has no corresponding SPIR-V instruction; it’s merely used for modelling purpose in the SPIR-V dialect. This op’s return type is the same as the specialization constant.

spv-reference-of-op ::= ssa-id `=` `spv.mlir.referenceof` symbol-ref-id
                                   `:` spirv-scalar-type

Example: 

%0 = spv.mlir.referenceof @spec_const : f32

TODO Add support for composite specialization constants.

Attributes: 

AttributeMLIR TypeDescription
spec_const::mlir::FlatSymbolRefAttrflat symbol reference attribute

Results: 

ResultDescription
referencevoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.Return (::mlir::spirv::ReturnOp) 

Return with no value from a function with void return type.

Syntax:

operation ::= `spv.Return` attr-dict

This instruction must be the last instruction in a block.

return-op ::= `spv.Return`

spv.ReturnValue (::mlir::spirv::ReturnValueOp) 

Return a value from a function.

Syntax:

operation ::= `spv.ReturnValue` $value attr-dict `:` type($value)

Value is the value returned, by copy, and must match the Return Type operand of the OpTypeFunction type of the OpFunction body this return instruction is in.

This instruction must be the last instruction in a block.

return-value-op ::= `spv.ReturnValue` ssa-use `:` spirv-type

Example: 

spv.ReturnValue %0 : f32

Operands: 

OperandDescription
valuevoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.SConvert (::mlir::spirv::SConvertOp) 

Convert signed width.  This is either a truncate or a sign extend.

Result Type must be a scalar or vector of integer type.

Signed Value must be a scalar or vector of integer type. It must have the same number of components as Result Type. The component width cannot equal the component width in Result Type.

Results are computed per component.

s-convert-op ::= ssa-id `=` `spv.SConvertOp` ssa-use
                 `:` operand-type `to` result-type

Example: 

%1 = spv.SConvertOp %0 : i32 to i64
%3 = spv.SConvertOp %2 : vector<3xi32> to vector<3xi64>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.SDiv (::mlir::spirv::SDivOp) 

Signed-integer division of Operand 1 divided by Operand 2.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sdiv-op ::= ssa-id `=` `spv.SDiv` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

Example: 

%4 = spv.SDiv %0, %1 : i32
%5 = spv.SDiv %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.SGreaterThanEqual (::mlir::spirv::SGreaterThanEqualOp) 

Signed-integer comparison if Operand 1 is greater than or equal to
Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sgreater-than-equal-op ::= ssa-id `=` `spv.SGreaterThanEqual` ssa-use, ssa-use
                                      `:` integer-scalar-vector-type

Example: 

%4 = spv.SGreaterThanEqual %0, %1 : i32
%5 = spv.SGreaterThanEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.SGreaterThan (::mlir::spirv::SGreaterThanOp) 

Signed-integer comparison if Operand 1 is greater than  Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sgreater-than-op ::= ssa-id `=` `spv.SGreaterThan` ssa-use, ssa-use
                                `:` integer-scalar-vector-type

Example: 

%4 = spv.SGreaterThan %0, %1 : i32
%5 = spv.SGreaterThan %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.SLessThanEqual (::mlir::spirv::SLessThanEqualOp) 

Signed-integer comparison if Operand 1 is less than or equal to Operand
2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sless-than-equal-op ::= ssa-id `=` `spv.SLessThanEqual` ssa-use, ssa-use
                                   `:` integer-scalar-vector-type

Example: 

%4 = spv.SLessThanEqual %0, %1 : i32
%5 = spv.SLessThanEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.SLessThan (::mlir::spirv::SLessThanOp) 

Signed-integer comparison if Operand 1 is less than Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sless-than-op ::= ssa-id `=` `spv.SLessThan` ssa-use, ssa-use
                             `:` integer-scalar-vector-type

Example: 

%4 = spv.SLessThan %0, %1 : i32
%5 = spv.SLessThan %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.SMod (::mlir::spirv::SModOp) 

Signed remainder operation for the remainder whose sign matches the sign
of Operand 2.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 2.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
smod-op ::= ssa-id `=` `spv.SMod` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

Example: 

%4 = spv.SMod %0, %1 : i32
%5 = spv.SMod %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.SNegate (::mlir::spirv::SNegateOp) 

Signed-integer subtract of Operand from zero.

Result Type must be a scalar or vector of integer type.

Operand’s type must be a scalar or vector of integer type. It must have the same number of components as Result Type. The component width must equal the component width in Result Type.

Results are computed per component.

Example: 

%1 = spv.SNegate %0 : i32
%3 = spv.SNegate %2 : vector<4xi32>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.SRem (::mlir::spirv::SRemOp) 

Signed remainder operation for the remainder whose sign matches the sign
of Operand 1.

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 1.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
srem-op ::= ssa-id `=` `spv.SRem` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

Example: 

%4 = spv.SRem %0, %1 : i32
%5 = spv.SRem %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.Select (::mlir::spirv::SelectOp) 

Select between two objects. Before version 1.4, results are only
computed per component.

Syntax:

operation ::= `spv.Select` operands attr-dict `:` type($condition) `,` type($result)

Before version 1.4, Result Type must be a pointer, scalar, or vector.

The types of Object 1 and Object 2 must be the same as Result Type.

Condition must be a scalar or vector of Boolean type.

If Condition is a scalar and true, the result is Object 1. If Condition is a scalar and false, the result is Object 2.

If Condition is a vector, Result Type must be a vector with the same number of components as Condition and the result is a mix of Object 1 and Object 2: When a component of Condition is true, the corresponding component in the result is taken from Object 1, otherwise it is taken from Object 2.

scalar-type ::= integer-type | float-type | boolean-type
select-object-type ::= scalar-type
                       | `vector<` integer-literal `x` scalar-type `>`
                       | pointer-type
select-condition-type ::= boolean-type
                          | `vector<` integer-literal `x` boolean-type `>`
select-op ::= ssa-id `=` `spv.Select` ssa-use, ssa-use, ssa-use
              `:` select-condition-type `,` select-object-type

Example: 

%3 = spv.Select %0, %1, %2 : i1, f32
%3 = spv.Select %0, %1, %2 : i1, vector<3xi32>
%3 = spv.Select %0, %1, %2 : vector<3xi1>, vector<3xf32>

Operands: 

OperandDescription
conditionbool or vector of bool values of length 2/3/4/8/16
true_value8/16/32/64-bit integer or 16/32/64-bit float or bool or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type
false_value8/16/32/64-bit integer or 16/32/64-bit float or bool or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type

Results: 

ResultDescription
result8/16/32/64-bit integer or 16/32/64-bit float or bool or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type

spv.selection (::mlir::spirv::SelectionOp) 

Define a structured selection.

SPIR-V can explicitly declare structured control-flow constructs using merge instructions. These explicitly declare a header block before the control flow diverges and a merge block where control flow subsequently converges. These blocks delimit constructs that must nest, and can only be entered and exited in structured ways. See “2.11. Structured Control Flow” of the SPIR-V spec for more details.

Instead of having a spv.SelectionMerge op to directly model selection merge instruction for indicating the merge target, we use regions to delimit the boundary of the selection: the merge target is the next op following the spv.selection op. This way it’s easier to discover all blocks belonging to the selection and it plays nicer with the MLIR system.

The spv.selection region should contain at least two blocks: one selection header block, and one selection merge. The selection header block should be the first block. The selection merge block should be the last block. The merge block should only contain a spv.mlir.merge op.

Attributes: 

AttributeMLIR TypeDescription
selection_control::mlir::IntegerAttrvalid SPIR-V SelectionControl

spv.ShiftLeftLogical (::mlir::spirv::ShiftLeftLogicalOp) 

Shift the bits in Base left by the number of bits specified in Shift.
The least-significant bits will be zero filled.

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is treated as unsigned. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

The number of components and bit width of Result Type must match those Base type. All types must be integer types.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-left-logical-op ::= ssa-id `=` `spv.ShiftLeftLogical`
                                      ssa-use `,` ssa-use `:`
                                      integer-scalar-vector-type `,`
                                      integer-scalar-vector-type

Example: 

%2 = spv.ShiftLeftLogical %0, %1 : i32, i16
%5 = spv.ShiftLeftLogical %3, %4 : vector<3xi32>, vector<3xi16>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.ShiftRightArithmetic (::mlir::spirv::ShiftRightArithmeticOp) 

Shift the bits in Base right by the number of bits specified in Shift.
The most-significant bits will be filled with the sign bit from Base.

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is treated as unsigned. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-right-arithmetic-op ::= ssa-id `=` `spv.ShiftRightArithmetic`
                                          ssa-use `,` ssa-use `:`
                                          integer-scalar-vector-type `,`
                                          integer-scalar-vector-type

Example: 

%2 = spv.ShiftRightArithmetic %0, %1 : i32, i16
%5 = spv.ShiftRightArithmetic %3, %4 : vector<3xi32>, vector<3xi16>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.ShiftRightLogical (::mlir::spirv::ShiftRightLogicalOp) 

Shift the bits in Base right by the number of bits specified in Shift.
The most-significant bits will be zero filled.

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is consumed as an unsigned integer. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-right-logical-op ::= ssa-id `=` `spv.ShiftRightLogical`
                                       ssa-use `,` ssa-use `:`
                                       integer-scalar-vector-type `,`
                                       integer-scalar-vector-type

Example: 

%2 = spv.ShiftRightLogical %0, %1 : i32, i16
%5 = spv.ShiftRightLogical %3, %4 : vector<3xi32>, vector<3xi16>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

spv.specConstantComposite (::mlir::spirv::SpecConstantCompositeOp) 

Declare a new composite specialization constant.

This op declares a SPIR-V composite specialization constant. This covers the OpSpecConstantComposite SPIR-V instruction. Scalar constants are covered by spv.specConstant.

A constituent of a spec constant composite can be:

  • A symbol referring of another spec constant.
  • The SSA ID of a non-specialization constant (i.e. defined through spv.specConstant).
  • The SSA ID of a spv.undef.
spv-spec-constant-composite-op ::= `spv.specConstantComposite` symbol-ref-id ` (`
                                   symbol-ref-id (`, ` symbol-ref-id)*
                                   `) :` composite-type

where composite-type is some non-scalar type that can be represented in the spv dialect: spv.struct, spv.array, or vector.

Example: 

spv.specConstant @sc1 = 1   : i32
spv.specConstant @sc2 = 2.5 : f32
spv.specConstant @sc3 = 3.5 : f32
spv.specConstantComposite @scc (@sc1, @sc2, @sc3) : !spv.struct<i32, f32, f32>

TODO Add support for constituents that are:

  • regular constants.
  • undef.
  • spec constant composite.

Attributes: 

AttributeMLIR TypeDescription
type::mlir::TypeAttrany type attribute
sym_name::mlir::StringAttrstring attribute
constituents::mlir::ArrayAttrsymbol ref array attribute

spv.specConstant (::mlir::spirv::SpecConstantOp) 

The op that declares a SPIR-V specialization constant

This op declares a SPIR-V scalar specialization constant. SPIR-V has multiple constant instructions covering different scalar types:

  • OpSpecConstantTrue and OpSpecConstantFalse for boolean constants
  • OpSpecConstant for scalar constants

Similar as spv.constant, this op represents all of the above cases. OpSpecConstantComposite and OpSpecConstantOp are modelled with separate ops.

spv-spec-constant-op ::= `spv.specConstant` symbol-ref-id
                         `spec_id(` integer `)`
                         `=` attribute-value (`:` spirv-type)?

where spec_id specifies the SPIR-V SpecId decoration associated with the op.

Example: 

spv.specConstant @spec_const1 = true
spv.specConstant @spec_const2 spec_id(5) = 42 : i32

Attributes: 

AttributeMLIR TypeDescription
sym_name::mlir::StringAttrstring attribute
default_value::mlir::Attributeany attribute

spv.Store (::mlir::spirv::StoreOp) 

Store through a pointer.

Pointer is the pointer to store through. Its type must be an OpTypePointer whose Type operand is the same as the type of Object.

Object is the object to store.

If present, any Memory Operands must begin with a memory operand literal. If not present, it is the same as specifying the memory operand None.

store-op ::= `spv.Store ` storage-class ssa-use `, ` ssa-use `, `
              (`[` memory-access `]`)? `:` spirv-element-type

Example: 

%0 = spv.Variable : !spv.ptr<f32, Function>
%1 = spv.FMul ... : f32
spv.Store "Function" %0, %1 : f32
spv.Store "Function" %0, %1 ["Volatile"] : f32
spv.Store "Function" %0, %1 ["Aligned", 4] : f32

Attributes: 

AttributeMLIR TypeDescription
memory_access::mlir::IntegerAttrvalid SPIR-V MemoryAccess
alignment::mlir::IntegerAttr32-bit signless integer attribute

Operands: 

OperandDescription
ptrany SPIR-V pointer type
valuevoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.SubgroupBallotKHR (::mlir::spirv::SubgroupBallotKHROp) 

See extension SPV_KHR_shader_ballot

Syntax:

operation ::= `spv.SubgroupBallotKHR` $predicate attr-dict `:` type($result)

Computes a bitfield value combining the Predicate value from all invocations in the current Subgroup that execute the same dynamic instance of this instruction. The bit is set to one if the corresponding invocation is active and the predicate is evaluated to true; otherwise, it is set to zero.

Predicate must be a Boolean type.

Result Type must be a 4 component vector of 32 bit integer types.

Result is a set of bitfields where the first invocation is represented in bit 0 of the first vector component and the last (up to SubgroupSize) is the higher bit number of the last bitmask needed to represent all bits of the subgroup invocations.

subgroup-ballot-op ::= ssa-id `=` `spv.SubgroupBallotKHR`
                            ssa-use `:` `vector` `<` 4 `x` `i32` `>`

Example: 

%0 = spv.SubgroupBallotKHR %predicate : vector<4xi32>

Operands: 

OperandDescription
predicatebool

Results: 

ResultDescription
resultvector of 32-bit integer values of length 4

spv.SubgroupBlockReadINTEL (::mlir::spirv::SubgroupBlockReadINTELOp) 

See extension SPV_INTEL_subgroups

Reads one or more components of Result data for each invocation in the subgroup from the specified Ptr as a block operation.

The data is read strided, so the first value read is: Ptr[ SubgroupLocalInvocationId ]

and the second value read is: Ptr[ SubgroupLocalInvocationId + SubgroupMaxSize ] etc.

Result Type may be a scalar or vector type, and its component type must be equal to the type pointed to by Ptr.

The type of Ptr must be a pointer type, and must point to a scalar type.

subgroup-block-read-INTEL-op ::= ssa-id `=` `spv.SubgroupBlockReadINTEL`
                            storage-class ssa_use `:` spirv-element-type
```mlir

#### Example:

%0 = spv.SubgroupBlockReadINTEL “StorageBuffer” %ptr : i32


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`ptr` | any SPIR-V pointer type

#### Results:

| Result | Description |
| :----: | ----------- |
`value` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

### `spv.SubgroupBlockWriteINTEL` (::mlir::spirv::SubgroupBlockWriteINTELOp)

See extension SPV_INTEL_subgroups

Writes one or more components of Data for each invocation in the subgroup
from the specified Ptr as a block operation.

The data is written strided, so the first value is written to:
Ptr[ SubgroupLocalInvocationId ]

and the second value written is:
Ptr[ SubgroupLocalInvocationId + SubgroupMaxSize ]
etc.

The type of Ptr must be a pointer type, and must point to a scalar type.

The component type of Data must be equal to the type pointed to by Ptr.

<!-- End of AutoGen section -->

subgroup-block-write-INTEL-op ::= ssa-id = spv.SubgroupBlockWriteINTEL storage-class ssa_use , ssa-use : spirv-element-type


#### Example:

spv.SubgroupBlockWriteINTEL “StorageBuffer” %ptr, %value : i32


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`ptr` | any SPIR-V pointer type
`value` | void or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

### `spv.Transpose` (::mlir::spirv::TransposeOp)

Transpose a matrix.


Syntax:

operation ::= spv.Transpose operands attr-dict : type($matrix) -> type($result)


Result Type must be an OpTypeMatrix.

Matrix must be an object of type OpTypeMatrix. The number of columns and
the column size of Matrix must be the reverse of those in Result Type.
The types of the scalar components in Matrix and Result Type must be the
same.

Matrix must have of type of OpTypeMatrix.

<!-- End of AutoGen section -->

transpose-op ::= ssa-id = spv.Transpose ssa-use : matrix-type -> matrix-type


#### Example:

%0 = spv.Transpose %matrix: !spv.matrix<2 x vector<3xf32» -> !spv.matrix<3 x vector<2xf32»


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`matrix` | any SPIR-V matrix type

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | any SPIR-V matrix type

### `spv.UConvert` (::mlir::spirv::UConvertOp)


    Convert unsigned width. This is either a truncate or a zero extend.
  

Result Type must be a scalar or vector of integer type, whose Signedness
operand is 0.

Unsigned Value must be a scalar or vector of integer type.  It must have
the same number of components as Result Type.  The component width
cannot equal the component width in Result Type.

 Results are computed per component.

<!-- End of AutoGen section -->

u-convert-op ::= ssa-id = spv.UConvertOp ssa-use : operand-type to result-type


#### Example:

```mlir
%1 = spv.UConvertOp %0 : i32 to i64
%3 = spv.UConvertOp %2 : vector<3xi32> to vector<3xi64>

Operands: 

OperandDescription
operand8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.UDiv (::mlir::spirv::UDivOp) 

Unsigned-integer division of Operand 1 divided by Operand 2.

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
udiv-op ::= ssa-id `=` `spv.UDiv` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

Example: 

%4 = spv.UDiv %0, %1 : i32
%5 = spv.UDiv %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.UGreaterThanEqual (::mlir::spirv::UGreaterThanEqualOp) 

Unsigned-integer comparison if Operand 1 is greater than or equal to
Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
ugreater-than-equal-op ::= ssa-id `=` `spv.UGreaterThanEqual` ssa-use, ssa-use
                                      `:` integer-scalar-vector-type

Example: 

%4 = spv.UGreaterThanEqual %0, %1 : i32
%5 = spv.UGreaterThanEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.UGreaterThan (::mlir::spirv::UGreaterThanOp) 

Unsigned-integer comparison if Operand 1 is greater than  Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
ugreater-than-op ::= ssa-id `=` `spv.UGreaterThan` ssa-use, ssa-use
                                `:` integer-scalar-vector-type

Example: 

%4 = spv.UGreaterThan %0, %1 : i32
%5 = spv.UGreaterThan %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.ULessThanEqual (::mlir::spirv::ULessThanEqualOp) 

Unsigned-integer comparison if Operand 1 is less than or equal to
Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
uless-than-equal-op ::= ssa-id `=` `spv.ULessThanEqual` ssa-use, ssa-use
                                   `:` integer-scalar-vector-type

Example: 

%4 = spv.ULessThanEqual %0, %1 : i32
%5 = spv.ULessThanEqual %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.ULessThan (::mlir::spirv::ULessThanOp) 

Unsigned-integer comparison if Operand 1 is less than Operand 2.

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
uless-than-op ::= ssa-id `=` `spv.ULessThan` ssa-use, ssa-use
                             `:` integer-scalar-vector-type

Example: 

%4 = spv.ULessThan %0, %1 : i32
%5 = spv.ULessThan %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16

Results: 

ResultDescription
resultbool or vector of bool values of length 2/3/4/8/16

spv.UMod (::mlir::spirv::UModOp) 

Unsigned modulo operation of Operand 1 modulo Operand 2.

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
umod-op ::= ssa-id `=` `spv.UMod` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

Example: 

%4 = spv.UMod %0, %1 : i32
%5 = spv.UMod %2, %3 : vector<4xi32>

Operands: 

OperandDescription
operand18/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values
operand28/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

Results: 

ResultDescription
result8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4/8/16 or Cooperative Matrix of 8/16/32/64-bit integer values

spv.undef (::mlir::spirv::UndefOp) 

Make an intermediate object whose value is undefined.

Syntax:

operation ::= `spv.undef` attr-dict `:` type($result)

Result Type is the type of object to make.

Each consumption of Result yields an arbitrary, possibly different bit pattern or abstract value resulting in possibly different concrete, abstract, or opaque values.

undef-op ::= `spv.undef` `:` spirv-type

Example: 

%0 = spv.undef : f32
%1 = spv.undef : !spv.struct<!spv.array<4 x vector<4xi32>>>

Results: 

ResultDescription
resultvoid or bool or 8/16/32/64-bit integer or 16/32/64-bit float or vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type or any SPIR-V cooperative matrix type or any SPIR-V matrix type

spv.Unreachable (::mlir::spirv::UnreachableOp) 

Declares that this block is not reachable in the CFG.

Syntax:

operation ::= `spv.Unreachable` attr-dict

This instruction must be the last instruction in a block.

unreachable-op ::= `spv.Unreachable`

spv.Variable (::mlir::spirv::VariableOp) 

Allocate an object in memory, resulting in a pointer to it, which can be
used with OpLoad and OpStore.

Result Type must be an OpTypePointer. Its Type operand is the type of object in memory.

Storage Class is the Storage Class of the memory holding the object. Since the op is used to model function-level variables, the storage class must be the Function Storage Class.

Initializer is optional. If Initializer is present, it will be the initial value of the variable’s memory content. Initializer must be an from a constant instruction or a global (module scope) OpVariable instruction. Initializer must have the same type as the type pointed to by Result Type.

variable-op ::= ssa-id `=` `spv.Variable` (`init(` ssa-use `)`)?
                attribute-dict? `:` spirv-pointer-type

where init specifies initializer.

Example: 

%0 = spv.constant ...

%1 = spv.Variable : !spv.ptr<f32, Function>
%2 = spv.Variable init(%0): !spv.ptr<f32, Function>

Attributes: 

AttributeMLIR TypeDescription
storage_class::mlir::IntegerAttrvalid SPIR-V StorageClass

Operands: 

OperandDescription
initializerany type

Results: 

ResultDescription
pointerany SPIR-V pointer type

spv.VectorExtractDynamic (::mlir::spirv::VectorExtractDynamicOp) 

Extract a single, dynamically selected, component of a vector.

Syntax:

operation ::= `spv.VectorExtractDynamic` $vector `[` $index `]` attr-dict `:` type($vector) `,` type($index)

Result Type must be a scalar type.

Vector must have a type OpTypeVector whose Component Type is Result Type.

Index must be a scalar integer. It is interpreted as a 0-based index of which component of Vector to extract.

Behavior is undefined if Index’s value is less than zero or greater than or equal to the number of components in Vector.

lar-type ::= integer-type | float-type | boolean-type 
vector-extract-dynamic-op ::= `spv.VectorExtractDynamic ` ssa-use `[` ssa-use `]`
                                `:` `vector<` integer-literal `x` scalar-type `>` `,`
                                integer-type
```mlir

#### Example:

%2 = spv.VectorExtractDynamic %0[%1] : vector<8xf32>, i32


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`vector` | vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16
`index` | 8/16/32/64-bit integer

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | 8/16/32/64-bit integer or 16/32/64-bit float or bool

### `spv.VectorInsertDynamic` (::mlir::spirv::VectorInsertDynamicOp)


    Make a copy of a vector, with a single, variably selected, component
    modified.
  


Syntax:

operation ::= spv.VectorInsertDynamic $component , $vector [ $index ] attr-dict : type($vector) , type($index)


Result Type must be an OpTypeVector.

Vector must have the same type as Result Type and is the vector that the
non-written components are copied from.

Component is the value supplied for the component selected by Index. It
must have the same type as the type of components in Result Type.

Index must be a scalar integer. It is interpreted as a 0-based index of
which component to modify.

Behavior is undefined if Index's value is less than zero or greater than
or equal to the number of components in Vector.

<!-- End of AutoGen section -->

scalar-type ::= integer-type | float-type | boolean-type vector-insert-dynamic-op ::= spv.VectorInsertDynamic ssa-use , ssa-use [ ssa-use ] : vector< integer-literal x scalar-type > , integer-type


#### Example:

%scalar = … : f32 %2 = spv.VectorInsertDynamic %scalar %0[%1] : f32, vector<8xf32>, i32


#### Operands:

| Operand | Description |
| :-----: | ----------- |
`vector` | vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16
`component` | 8/16/32/64-bit integer or 16/32/64-bit float or bool
`index` | 8/16/32/64-bit integer

#### Results:

| Result | Description |
| :----: | ----------- |
`result` | vector of bool or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4/8/16


[Spirv]: https://www.khronos.org/registry/spir-v/
[SpirvSpec]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html
[SpirvLogicalLayout]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_logicallayout_a_logical_layout_of_a_module
[SpirvGrammar]: https://raw.githubusercontent.com/KhronosGroup/SPIRV-Headers/master/include/spirv/unified1/spirv.core.grammar.json
[SpirvShaderValidation]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_shadervalidation_a_validation_rules_for_shader_a_href_capability_capabilities_a
[SpirvOpVariable]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#OpVariable
[GlslStd450]: https://www.khronos.org/registry/spir-v/specs/1.0/GLSL.std.450.html
[ArrayType]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#OpTypeArray
[ImageType]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#OpTypeImage
[PointerType]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#OpTypePointer
[RuntimeArrayType]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#OpTypeRuntimeArray
[MlirDialectConversion]: ../DialectConversion.md
[StructType]: https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#Structure
[SpirvTools]: https://github.com/KhronosGroup/SPIRV-Tools
[Rationale]: ../Rationale/#block-arguments-vs-phi-nodes
[ODS]: ../OpDefinitions.md
[GreedyPatternRewriter]: https://github.com/llvm/llvm-project/blob/master/mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp
[MlirDialectConversionTypeConversion]: ../DialectConversion.md#type-converter
[MlirDialectConversionRewritePattern]: ../DialectConversion.md#conversion-patterns
[MlirDialectConversionSignatureConversion]: ../DialectConversion.md#region-signature-conversion
[MlirOpInterface]: ../Interfaces/#operation-interfaces
[MlirIntegerType]: ../LangRef.md#integer-type
[MlirFloatType]: ../LangRef.md#floating-point-types
[MlirVectorType]: ../LangRef.md#vector-type
[MlirMemrefType]: ../LangRef.md#memref-type
[MlirIndexType]: ../LangRef.md#index-type
[MlirGpuDialect]: ../Dialects/GPU.md
[MlirStandardDialect]: ../Dialects/Standard.md
[MlirSpirvHeaders]: https://github.com/llvm/llvm-project/tree/master/mlir/include/mlir/Dialect/SPIRV
[MlirSpirvLibs]: https://github.com/llvm/llvm-project/tree/master/mlir/lib/Dialect/SPIRV
[MlirSpirvTests]: https://github.com/llvm/llvm-project/tree/master/mlir/test/Dialect/SPIRV
[MlirSpirvUnittests]: https://github.com/llvm/llvm-project/tree/master/mlir/unittests/Dialect/SPIRV
[MlirGpuToSpirvHeaders]: https://github.com/llvm/llvm-project/tree/master/mlir/include/mlir/Conversion/GPUToSPIRV
[MlirGpuToSpirvLibs]: https://github.com/llvm/llvm-project/tree/master/mlir/lib/Conversion/GPUToSPIRV
[MlirStdToSpirvHeaders]: https://github.com/llvm/llvm-project/tree/master/mlir/include/mlir/Conversion/StandardToSPIRV
[MlirStdToSpirvLibs]: https://github.com/llvm/llvm-project/tree/master/mlir/lib/Conversion/StandardToSPIRV
[MlirSpirvDialect]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/SPIRVDialect.h
[MlirSpirvTypes]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h
[MlirSpirvOpsH]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/SPIRVOps.h
[MlirSpirvSerialization]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/Serialization.h
[MlirSpirvBase]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
[MlirSpirvPasses]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/Passes.h
[MlirSpirvLowering]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h
[MlirSpirvAbi]: https://github.com/llvm/llvm-project/blob/master/mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h
[MlirSpirvOpsCpp]: https://github.com/llvm/llvm-project/blob/master/mlir/lib/Dialect/SPIRV/SPIRVOps.cpp
[GitHubDialectTracking]: https://github.com/tensorflow/mlir/issues/302
[GitHubLoweringTracking]: https://github.com/tensorflow/mlir/issues/303
[GenSpirvUtilsPy]: https://github.com/llvm/llvm-project/blob/master/mlir/utils/spirv/gen_spirv_dialect.py
[CustomTypeAttrTutorial]: ../Tutorials/DefiningAttributesAndTypes.md
[VulkanExtensionPhysicalStorageBuffer]: https://github.com/KhronosGroup/SPIRV-Registry/blob/master/extensions/KHR/SPV_KHR_physical_storage_buffer.html
[VulkanExtensionVariablePointers]: https://github.com/KhronosGroup/SPIRV-Registry/blob/master/extensions/KHR/SPV_KHR_variable_pointers.html
[VulkanSpirv]: https://renderdoc.org/vkspec_chunked/chap40.html#spirvenv
[VulkanShaderInterface]: https://renderdoc.org/vkspec_chunked/chap14.html#interfaces-resources
[VulkanShaderInterfaceStorageClass]: https://renderdoc.org/vkspec_chunked/chap15.html#interfaces
[VulkanResourceLimits]: https://renderdoc.org/vkspec_chunked/chap36.html#limits
[VulkanGPUInfoMaxPerStageDescriptorStorageBuffers]: https://vulkan.gpuinfo.org/displaydevicelimit.php?name=maxPerStageDescriptorStorageBuffers&platform=android
[VulkanPushConstants]: https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/vkCmdPushConstants.html