MLIR

Multi-Level IR Compiler Framework

Dialect 'spv' definition

The SPIR-V dialect in MLIR.

SPIR-V is a binary intermediate language for representing graphical-shader stages and compute kernels for multiple Khronos APIs, including OpenCL, OpenGL, and Vulkan. See https://www.khronos.org/registry/spir-v for more details regarding SPIR-V itself.

The SPIR-V dialect aims to be a proper compiler intermediate representation to facilitate transformations. Ops in this dialect stay at the same semantic level as the SPIR-V specification and try to have one-to-one mapping to the corresponding SPIR-V instructions; but they may deviate representationally to utilize MLIR mechanisms if it results in better representation and thus benefits transformations. The dialect also aims to maintain straightforward serialization into and deserialization from the SPIR-V binary format. See https://mlir.llvm.org/docs/Dialects/SPIR-V/ for more details regarding high-level designs and implementation structures of the SPIR-V dialect.

Operation definition

spv.AccessChain (spirv::AccessChainOp)

Create a pointer into a composite object that can be used with OpLoad
and OpStore.

Description:

Result Type must be an OpTypePointer. Its Type operand must be the type reached by walking the Base’s type hierarchy down to the last provided index in Indexes, and its Storage Class operand must be the same as the Storage Class of Base.

Base must be a pointer, pointing to the base of a composite object.

Indexes walk the type hierarchy to the desired depth, potentially down to scalar granularity. The first index in Indexes will select the top- level member/element/component/element of the base composite. All composite constituents use zero-based numbering, as described by their OpType… instruction. The second index will apply similarly to that result, and so on. Once any non-composite type is reached, there must be no remaining (unused) indexes.

Each index in Indexes

  • must be a scalar integer type,

  • is treated as a signed count, and

  • must be an OpConstant when indexing into a structure.

Custom assembly form

access-chain-op ::= ssa-id `=` `spv.AccessChain` ssa-use
                    `[` ssa-use (',' ssa-use)* `]`
                    `:` pointer-type

For example:

%0 = "spv.constant"() { value = 1: i32} : () -> i32
%1 = spv.Variable : !spv.ptr<!spv.struct<f32, !spv.array<4xf32>>, Function>
%2 = spv.AccessChain %1[%0] : !spv.ptr<!spv.struct<f32, !spv.array<4xf32>>, Function>
%3 = spv.Load "Function" %2 ["Volatile"] : !spv.array<4xf32>

Operands:

  1. base_ptr: any SPIR-V pointer type
  2. indices: 8/16/32/64-bit integer

Attributes:

Results:

  1. component_ptr: any SPIR-V pointer type

spv._address_of (spirv::AddressOfOp)

Get the address of a global variable.

Description:

Variables in module scope are defined using symbol names. This op generates an SSA value that can be used to refer to the symbol within function scope for use in ops that expect an SSA value. This operation has no corresponding SPIR-V instruction; it’s merely used for modelling purpose in the SPIR-V dialect. Since variables in module scope in SPIR-V dialect are of pointer type, this op returns a pointer type as well, and the type is the same as the variable referenced.

Custom assembly form

spv-address-of-op ::= ssa-id `=` `spv._address_of` symbol-ref-id
                                 `:` spirv-pointer-type

For example:

%0 = spv._address_of @global_var : !spv.ptr<f32, Input>

Operands:

Attributes:

AttributeMLIR TypeDescription
variableFlatSymbolRefAttrflat symbol reference attribute attribute

Results:

  1. pointer: any SPIR-V pointer type

spv.AtomicAnd (spirv::AtomicAndOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise AND of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | "Release"` | ...

atomic-and-op ::=
    `spv.AtomicAnd` scope memory-semantics
                    ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicAnd "Device" "None" %pointer, %value :
                   !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicCompareExchangeWeak (spirv::AtomicCompareExchangeWeakOp)

Deprecated (use OpAtomicCompareExchange).

Description:

Has the same semantics as OpAtomicCompareExchange.

Memory must be a valid memory Scope.

Custom assembly form

atomic-compare-exchange-weak-op ::=
    `spv.AtomicCompareExchangeWeak` scope memory-semantics memory-semantics
                                    ssa-use `,` ssa-use `,` ssa-use
                                    `:` spv-pointer-type

For example:

%0 = spv.AtomicCompareExchangeWeak "Workgroup" "Acquire" "None"
                                   %pointer, %value, %comparator
                                   : !spv.ptr<i32, WorkGroup>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer
  3. comparator: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
equal_semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute
unequal_semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicIAdd (spirv::AtomicIAddOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by integer addition of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-iadd-op ::=
    `spv.AtomicIAdd` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicIAdd "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicIDecrement (spirv::AtomicIDecrementOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value through integer subtraction of 1 from Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-idecrement-op ::=
    `spv.AtomicIDecrement` scope memory-semantics ssa-use
                           `:` spv-pointer-type

For example:

%0 = spv.AtomicIDecrement "Device" "None" %pointer :
                          !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicIIncrement (spirv::AtomicIIncrementOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value through integer addition of 1 to Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-iincrement-op ::=
    `spv.AtomicIIncrement` scope memory-semantics ssa-use
                           `:` spv-pointer-type

For example:

%0 = spv.AtomicIncrement "Device" "None" %pointer :
                         !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicISub (spirv::AtomicISubOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by integer subtraction of Value from Original Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-isub-op ::=
    `spv.AtomicISub` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicISub "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicOr (spirv::AtomicOrOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise OR of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-or-op ::=
    `spv.AtomicOr` scope memory-semantics
                   ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicOr "Device" "None" %pointer, %value :
                  !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicSMax (spirv::AtomicSMaxOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the largest signed integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-smax-op ::=
    `spv.AtomicSMax` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicSMax "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicSMin (spirv::AtomicSMinOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the smallest signed integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-smin-op ::=
    `spv.AtomicSMin` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicSMin "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicUMax (spirv::AtomicUMaxOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the largest unsigned integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-umax-op ::=
    `spv.AtomicUMax` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicUMax "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicUMin (spirv::AtomicUMinOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by finding the smallest unsigned integer of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-umin-op ::=
    `spv.AtomicUMin` scope memory-semantics
                     ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicUMin "Device" "None" %pointer, %value :
                    !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.AtomicXor (spirv::AtomicXorOp)

Perform the following steps atomically with respect to any other atomic
accesses within Scope to the same location:

Description:

  1. load through Pointer to get an Original Value,

  2. get a New Value by the bitwise exclusive OR of Original Value and Value, and

  3. store the New Value back through Pointer.

The instruction’s result is the Original Value.

Result Type must be an integer type scalar.

The type of Value must be the same as Result Type. The type of the value pointed to by Pointer must be the same as Result Type.

Memory must be a valid memory Scope.

Custom assembly form

atomic-xor-op ::=
    `spv.AtomicXor` scope memory-semantics
                    ssa-use `,` ssa-use `:` spv-pointer-type

For example:

%0 = spv.AtomicXor "Device" "None" %pointer, %value :
                   !spv.ptr<i32, StorageBuffer>

Operands:

  1. pointer: any SPIR-V pointer type
  2. value: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

  1. result: 8/16/32/64-bit integer

spv.BitCount (spirv::BitCountOp)

Count the number of set bits in an object.

Description:

Results are computed per component.

Result Type must be a scalar or vector of integer type. The components must be wide enough to hold the unsigned Width of Base as an unsigned value. That is, no sign bit is needed or counted when checking for a wide enough result width.

Base must be a scalar or vector of integer type. It must have the same number of components as Result Type.

The result is the unsigned value that is the number of bits in Base that are 1.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitcount-op ::= ssa-id `=` `spv.BitCount` ssa-use
                           `:` integer-scalar-vector-type

For example:

%2 = spv.BitCount %0: i32
%3 = spv.BitCount %1: vector<4xi32>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitFieldInsert (spirv::BitFieldInsertOp)

Make a copy of an object, with a modified bit field that comes from
another object.

Description:

Results are computed per component.

Result Type must be a scalar or vector of integer type.

The type of Base and Insert must be the same as Result Type.

Any result bits numbered outside [Offset, Offset + Count - 1] (inclusive) will come from the corresponding bits in Base.

Any result bits numbered in [Offset, Offset + Count - 1] come, in order, from the bits numbered [0, Count - 1] of Insert.

Count must be an integer type scalar. Count is the number of bits taken from Insert. It will be consumed as an unsigned value. Count can be 0, in which case the result will be Base.

Offset must be an integer type scalar. Offset is the lowest-order bit of the bit field. It will be consumed as an unsigned value.

The resulting value is undefined if Count or Offset or their sum is greater than the number of bits in the result.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitfield-insert-op ::= ssa-id `=` `spv.BitFieldInsert` ssa-use `,` ssa-use
                                  `,` ssa-use `,` ssa-use
                                  `:` integer-scalar-vector-type
                                  `,` integer-type `,` integer-type

For example:

%0 = spv.BitFieldInsert %base, %insert, %offset, %count : vector<3xi32>, i8, i8

Operands:

  1. base: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. insert: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  3. offset: 8/16/32/64-bit integer
  4. count: 8/16/32/64-bit integer

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitFieldSExtract (spirv::BitFieldSExtractOp)

Extract a bit field from an object, with sign extension.

Description:

Results are computed per component.

Result Type must be a scalar or vector of integer type.

The type of Base must be the same as Result Type.

If Count is greater than 0: The bits of Base numbered in [Offset, Offset

  • Count - 1] (inclusive) become the bits numbered [0, Count - 1] of the result. The remaining bits of the result will all be the same as bit Offset + Count - 1 of Base.

Count must be an integer type scalar. Count is the number of bits extracted from Base. It will be consumed as an unsigned value. Count can be 0, in which case the result will be 0.

Offset must be an integer type scalar. Offset is the lowest-order bit of the bit field to extract from Base. It will be consumed as an unsigned value.

The resulting value is undefined if Count or Offset or their sum is greater than the number of bits in the result.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitfield-extract-s-op ::= ssa-id `=` `spv.BitFieldSExtract` ssa-use
                                     `,` ssa-use `,` ssa-use
                                     `:` integer-scalar-vector-type
                                     `,` integer-type `,` integer-type

For example:

%0 = spv.BitFieldSExtract %base, %offset, %count : vector<3xi32>, i8, i8

Operands:

  1. base: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. offset: 8/16/32/64-bit integer
  3. count: 8/16/32/64-bit integer

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitFieldUExtract (spirv::BitFieldUExtractOp)

Extract a bit field from an object, without sign extension.

Description:

The semantics are the same as with OpBitFieldSExtract with the exception that there is no sign extension. The remaining bits of the result will all be 0.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitfield-extract-u-op ::= ssa-id `=` `spv.BitFieldUExtract` ssa-use
                                     `,` ssa-use `,` ssa-use
                                     `:` integer-scalar-vector-type
                                     `,` integer-type `,` integer-type

For example:

%0 = spv.BitFieldUExtract %base, %offset, %count : vector<3xi32>, i8, i8

Operands:

  1. base: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. offset: 8/16/32/64-bit integer
  3. count: 8/16/32/64-bit integer

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitReverse (spirv::BitReverseOp)

Reverse the bits in an object.

Description:

Results are computed per component.

Result Type must be a scalar or vector of integer type.

The type of Base must be the same as Result Type.

The bit-number n of the result will be taken from bit-number Width - 1 - n of Base, where Width is the OpTypeInt operand of the Result Type.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
bitreverse-op ::= ssa-id `=` `spv.BitReverse` ssa-use
                             `:` integer-scalar-vector-type

For example:

%2 = spv.BitReverse %0 : i32
%3 = spv.BitReverse %1 : vector<4xi32>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.Bitcast (spirv::BitcastOp)

Bit pattern-preserving type conversion.

Description:

Result Type must be an OpTypePointer, or a scalar or vector of numerical-type.

Operand must have a type of OpTypePointer, or a scalar or vector of numerical-type. It must be a different type than Result Type.

If either Result Type or Operand is a pointer, the other must be a pointer (diverges from the SPIR-V spec).

If Result Type has a different number of components than Operand, the total number of bits in Result Type must equal the total number of bits in Operand. Let L be the type, either Result Type or Operand’s type, that has the larger number of components. Let S be the other type, with the smaller number of components. The number of components in L must be an integer multiple of the number of components in S. The first component (that is, the only or lowest-numbered component) of S maps to the first components of L, and so on, up to the last component of S mapping to the last components of L. Within this mapping, any single component of S (mapping to multiple components of L) maps its lower- ordered bits to the lower-numbered components of L.

Custom assembly form

bitcast-op ::= ssa-id `=` `spv.Bitcast` ssa-use
               `:` operand-type `to` result-type

For example:

%1 = spv.Bitcast %0 : f32 to i32
%1 = spv.Bitcast %0 : vector<2xf32> to i64
%1 = spv.Bitcast %0 : !spv.ptr<f32, Function> to !spv.ptr<i32, Function>

Operands:

  1. operand: 8/16/32/64-bit integer or 16/32/64-bit float or 1-bit integer or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or 16/32/64-bit float or 1-bit integer or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type

spv.BitwiseAnd (spirv::BitwiseAndOp)

Result is 1 if both Operand 1 and Operand 2 are 1. Result is 0 if either
Operand 1 or Operand 2 are 0.

Description:

Results are computed per component, and within each component, per bit.

Result Type must be a scalar or vector of integer type. The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitwise-and-op ::= ssa-id `=` `spv.BitwiseAnd` ssa-use, ssa-use
                              `:` integer-scalar-vector-type

For example:

%2 = spv.BitwiseAnd %0, %1 : i32
%2 = spv.BitwiseAnd %0, %1 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitwiseOr (spirv::BitwiseOrOp)

Result is 1 if either Operand 1 or Operand 2 is 1. Result is 0 if both
Operand 1 and Operand 2 are 0.

Description:

Results are computed per component, and within each component, per bit.

Result Type must be a scalar or vector of integer type. The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitwise-or-op ::= ssa-id `=` `spv.BitwiseOr` ssa-use, ssa-use
                              `:` integer-scalar-vector-type

For example:

%2 = spv.BitwiseOr %0, %1 : i32
%2 = spv.BitwiseOr %0, %1 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BitwiseXor (spirv::BitwiseXorOp)

Result is 1 if exactly one of Operand 1 or Operand 2 is 1. Result is 0
if Operand 1 and Operand 2 have the same value.

Description:

Results are computed per component, and within each component, per bit.

Result Type must be a scalar or vector of integer type. The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
bitwise-xor-op ::= ssa-id `=` `spv.BitwiseXor` ssa-use, ssa-use
                              `:` integer-scalar-vector-type

For example:

%2 = spv.BitwiseXor %0, %1 : i32
%2 = spv.BitwiseXor %0, %1 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.BranchConditional (spirv::BranchConditionalOp)

If Condition is true, branch to true block, otherwise branch to false
block.

Description:

Condition must be a Boolean type scalar.

Branch weights are unsigned 32-bit integer literals. There must be either no Branch Weights or exactly two branch weights. If present, the first is the weight for branching to True Label, and the second is the weight for branching to False Label. The implied probability that a branch is taken is its weight divided by the sum of the two Branch weights. At least one weight must be non-zero. A weight of zero does not imply a branch is dead or permit its removal; branch weights are only hints. The two weights must not overflow a 32-bit unsigned integer when added together.

This instruction must be the last instruction in a block.

Custom assembly form

branch-conditional-op ::= `spv.BranchConditional` ssa-use
                          (`[` integer-literal, integer-literal `]`)?
                          `,` successor `,` successor
successor ::= bb-id branch-use-list?
branch-use-list ::= `(` ssa-use-list `:` type-list-no-parens `)`

For example:

spv.BranchConditional %condition, ^true_branch, ^false_branch
spv.BranchConditional %condition, ^true_branch(%0: i32), ^false_branch(%1: i32)

Operands:

  1. condition: 1-bit integer

Attributes:

AttributeMLIR TypeDescription
branch_weightsArrayAttr32-bit integer array attribute attribute

Results:

spv.Branch (spirv::BranchOp)

Unconditional branch to target block.

Description:

This instruction must be the last instruction in a block.

Custom assembly form

branch-op ::= `spv.Branch` successor
successor ::= bb-id branch-use-list?
branch-use-list ::= `(` ssa-use-list `:` type-list-no-parens `)`

For example:

spv.Branch ^target
spv.Branch ^target(%0, %1: i32, f32)

Operands:

Attributes:

Results:

spv.CompositeConstruct (spirv::CompositeConstructOp)

Construct a new composite object from a set of constituent objects that
will fully form it.

Description:

Result Type must be a composite type, whose top-level members/elements/components/columns have the same type as the types of the operands, with one exception. The exception is that for constructing a vector, the operands may also be vectors with the same component type as the Result Type component type. When constructing a vector, the total number of components in all the operands must equal the number of components in Result Type.

Constituents will become members of a structure, or elements of an array, or components of a vector, or columns of a matrix. There must be exactly one Constituent for each top-level member/element/component/column of the result, with one exception. The exception is that for constructing a vector, a contiguous subset of the scalars consumed can be represented by a vector operand instead. The Constituents must appear in the order needed by the definition of the type of the result. When constructing a vector, there must be at least two Constituent operands.

Custom assembly form

composite-construct-op ::= ssa-id `=` `spv.CompositeConstruct`
                           (ssa-use (`,` ssa-use)* )? `:` composite-type

For example:

%0 = spv.CompositeConstruct %1, %2, %3 : vector<3xf32>

Operands:

  1. constituents: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

Attributes:

Results:

  1. result: vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.CompositeExtract (spirv::CompositeExtractOp)

Extract a part of a composite object.

Description:

Result Type must be the type of object selected by the last provided index. The instruction result is the extracted object.

Composite is the composite to extract from.

Indexes walk the type hierarchy, potentially down to component granularity, to select the part to extract. All indexes must be in bounds. All composite constituents use zero-based numbering, as described by their OpType… instruction.

Custom assembly form

composite-extract-op ::= ssa-id `=` `spv.CompositeExtract` ssa-use
                         `[` integer-literal (',' integer-literal)* `]`
                         `:` composite-type

For example:

%0 = spv.Variable : !spv.ptr<!spv.array<4x!spv.array<4xf32>>, Function>
%1 = spv.Load "Function" %0 ["Volatile"] : !spv.array<4x!spv.array<4xf32>>
%2 = spv.CompositeExtract %1[1 : i32] : !spv.array<4x!spv.array<4xf32>>

Operands:

  1. composite: vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

Attributes:

AttributeMLIR TypeDescription
indicesArrayAttr32-bit integer array attribute attribute

Results:

  1. component: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.CompositeInsert (spirv::CompositeInsertOp)

Make a copy of a composite object, while modifying one part of it.

Description:

Result Type must be the same type as Composite.

Object is the object to use as the modified part.

Composite is the composite to copy all but the modified part from.

Indexes walk the type hierarchy of Composite to the desired depth, potentially down to component granularity, to select the part to modify. All indexes must be in bounds. All composite constituents use zero-based numbering, as described by their OpType… instruction. The type of the part selected to modify must match the type of Object.

Custom assembly form

composite-insert-op ::= ssa-id `=` `spv.CompositeInsert` ssa-use, ssa-use
                        `[` integer-literal (',' integer-literal)* `]`
                        `:` object-type `into` composite-type

For example:

%0 = spv.CompositeInsert %object, %composite[1 : i32] : f32 into !spv.array<4xf32>

Operands:

  1. object: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type
  2. composite: vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

Attributes:

AttributeMLIR TypeDescription
indicesArrayAttr32-bit integer array attribute attribute

Results:

  1. result: vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.constant (spirv::ConstantOp)

The op that declares a SPIR-V normal constant

Description:

This op declares a SPIR-V normal constant. SPIR-V has multiple constant instructions covering different constant types:

  • OpConstantTrue and OpConstantFalse for boolean constants
  • OpConstant for scalar constants
  • OpConstantComposite for composite constants
  • OpConstantNull for null constants

Having such a plethora of constant instructions renders IR transformations more tedious. Therefore, we use a single spv.constant op to represent them all. Note that conversion between those SPIR-V constant instructions and this op is purely mechanical; so it can be scoped to the binary (de)serialization process.

Custom assembly form

spv-constant-op ::= ssa-id `=` `spv.constant` attribute-value
                    (`:` spirv-type)?

For example:

%0 = spv.constant true
%1 = spv.constant dense<[2, 3]> : vector<2xf32>
%2 = spv.constant [dense<3.0> : vector<2xf32>] : !spv.array<1xvector<2xf32>>

TODO(antiagainst): support constant structs

Operands:

Attributes:

AttributeMLIR TypeDescription
valueAttributeany attribute attribute

Results:

  1. constant: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.ControlBarrier (spirv::ControlBarrierOp)

Wait for other invocations of this module to reach the current point of
execution.

Description:

All invocations of this module within Execution scope must reach this point of execution before any invocation will proceed beyond it.

When Execution is Workgroup or larger, behavior is undefined if this instruction is used in control flow that is non-uniform within Execution. When Execution is Subgroup or Invocation, the behavior of this instruction in non-uniform control flow is defined by the client API.

If Semantics is not None, this instruction also serves as an OpMemoryBarrier instruction, and must also perform and adhere to the description and semantics of an OpMemoryBarrier instruction with the same Memory and Semantics operands. This allows atomically specifying both a control barrier and a memory barrier (that is, without needing two instructions). If Semantics is None, Memory is ignored.

Before version 1.3, it is only valid to use this instruction with TessellationControl, GLCompute, or Kernel execution models. There is no such restriction starting with version 1.3.

When used with the TessellationControl execution model, it also implicitly synchronizes the Output Storage Class: Writes to Output variables performed by any invocation executed prior to a OpControlBarrier will be visible to any other invocation after return from that OpControlBarrier.

Custom assembly form

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | "Release"` | ...

control-barrier-op ::= `spv.ControlBarrier` scope, scope, memory-semantics

For example:

spv.ControlBarrier "Workgroup", "Device", "Acquire|UniformMemory"

Operands:

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
memory_semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

spv.ConvertFToS (spirv::ConvertFToSOp)

Convert value numerically from floating point to signed integer, with
round toward 0.0.

Description:

Result Type must be a scalar or vector of integer type.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

convert-f-to-s-op ::= ssa-id `=` `spv.ConvertFToSOp` ssa-use
                      `:` operand-type `to` result-type

For example:

%1 = spv.ConvertFToS %0 : f32 to i32
%3 = spv.ConvertFToS %2 : vector<3xf32> to vector<3xi32>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.ConvertFToU (spirv::ConvertFToUOp)

Convert value numerically from floating point to unsigned integer, with
round toward 0.0.

Description:

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

convert-f-to-u-op ::= ssa-id `=` `spv.ConvertFToUOp` ssa-use
                      `:` operand-type `to` result-type

For example:

%1 = spv.ConvertFToU %0 : f32 to i32
%3 = spv.ConvertFToU %2 : vector<3xf32> to vector<3xi32>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.ConvertSToF (spirv::ConvertSToFOp)

Convert value numerically from signed integer to floating point.

Description:

Result Type must be a scalar or vector of floating-point type.

Signed Value must be a scalar or vector of integer type. It must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

convert-s-to-f-op ::= ssa-id `=` `spv.ConvertSToFOp` ssa-use
                      `:` operand-type `to` result-type

For example:

%1 = spv.ConvertSToF %0 : i32 to f32
%3 = spv.ConvertSToF %2 : vector<3xi32> to vector<3xf32>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.ConvertUToF (spirv::ConvertUToFOp)

Convert value numerically from unsigned integer to floating point.

Description:

Result Type must be a scalar or vector of floating-point type.

Unsigned Value must be a scalar or vector of integer type. It must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

convert-u-to-f-op ::= ssa-id `=` `spv.ConvertUToFOp` ssa-use
                      `:` operand-type `to` result-type

For example:

%1 = spv.ConvertUToF %0 : i32 to f32
%3 = spv.ConvertUToF %2 : vector<3xi32> to vector<3xf32>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.EntryPoint (spirv::EntryPointOp)

Declare an entry point, its execution model, and its interface.

Description:

Execution Model is the execution model for the entry point and its static call tree. See Execution Model.

Entry Point must be the Result of an OpFunction instruction.

Name is a name string for the entry point. A module cannot have two OpEntryPoint instructions with the same Execution Model and the same Name string.

Interface is a list of symbol references to spv.globalVariable operations. These declare the set of global variables from a module that form the interface of this entry point. The set of Interface symbols must be equal to or a superset of the spv.globalVariables referenced by the entry point’s static call tree, within the interface’s storage classes. Before version 1.4, the interface’s storage classes are limited to the Input and Output storage classes. Starting with version 1.4, the interface’s storage classes are all storage classes used in declaring all global variables referenced by the entry point’s call tree.

Custom assembly form

execution-model ::= "Vertex" | "TesellationControl" |
                    <and other SPIR-V execution models...>

entry-point-op ::= ssa-id `=` `spv.EntryPoint` execution-model
                   symbol-reference (`, ` symbol-reference)*

For example:

spv.EntryPoint "GLCompute" @foo
spv.EntryPoint "Kernel" @foo, @var1, @var2

Operands:

Attributes:

AttributeMLIR TypeDescription
execution_modelIntegerAttrvalid SPIR-V ExecutionModel attribute
fnFlatSymbolRefAttrflat symbol reference attribute attribute
interfaceArrayAttrsymbol ref array attribute attribute

Results:

spv.ExecutionMode (spirv::ExecutionModeOp)

Declare an execution mode for an entry point.

Description:

Entry Point must be the Entry Point operand of an OpEntryPoint instruction.

Mode is the execution mode. See Execution Mode.

This instruction is only valid when the Mode operand is an execution mode that takes no Extra Operands, or takes Extra Operands that are not operands.

Custom assembly form

execution-mode ::= "Invocations" | "SpacingEqual" |
                   <and other SPIR-V execution modes...>

execution-mode-op ::= `spv.ExecutionMode ` ssa-use execution-mode
                      (integer-literal (`, ` integer-literal)* )?

For example:

spv.ExecutionMode @foo "ContractionOff"
spv.ExecutionMode @bar "LocalSizeHint", 3, 4, 5

Operands:

Attributes:

AttributeMLIR TypeDescription
fnFlatSymbolRefAttrflat symbol reference attribute attribute
execution_modeIntegerAttrvalid SPIR-V ExecutionMode attribute
valuesArrayAttr32-bit integer array attribute attribute

Results:

spv.FAdd (spirv::FAddOp)

Floating-point addition of Operand 1 and Operand 2.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fadd-op ::= ssa-id `=` `spv.FAdd` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FAdd %0, %1 : f32
%5 = spv.FAdd %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FConvert (spirv::FConvertOp)

Convert value numerically from one floating-point width to another
width.

Description:

Result Type must be a scalar or vector of floating-point type.

Float Value must be a scalar or vector of floating-point type. It must have the same number of components as Result Type. The component width cannot equal the component width in Result Type.

Results are computed per component.

Custom assembly form

f-convert-op ::= ssa-id `=` `spv.FConvertOp` ssa-use
                 `:` operand-type `to` result-type

For example:

%1 = spv.FConvertOp %0 : f32 to f64
%3 = spv.FConvertOp %2 : vector<3xf32> to vector<3xf64>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FDiv (spirv::FDivOp)

Floating-point division of Operand 1 divided by Operand 2.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fdiv-op ::= ssa-id `=` `spv.FDiv` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FDiv %0, %1 : f32
%5 = spv.FDiv %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FMod (spirv::FModOp)

The floating-point remainder whose sign matches the sign of Operand 2.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 2.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmod-op ::= ssa-id `=` `spv.FMod` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FMod %0, %1 : f32
%5 = spv.FMod %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FMul (spirv::FMulOp)

Floating-point multiplication of Operand 1 and Operand 2.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmul-op ::= `spv.FMul` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FMul %0, %1 : f32
%5 = spv.FMul %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FNegate (spirv::FNegateOp)

Floating-point subtract of Operand from zero.

Description:

Result Type must be a scalar or vector of floating-point type.

The type of Operand must be the same as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmul-op ::= `spv.FNegate` ssa-use `:` float-scalar-vector-type

For example:

%1 = spv.FNegate %0 : f32
%3 = spv.FNegate %2 : vector<4xf32>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FOrdEqual (spirv::FOrdEqualOp)

Floating-point comparison for being ordered and equal.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordequal-op ::= ssa-id `=` `spv.FOrdEqual` ssa-use, ssa-use

For example:

%4 = spv.FOrdEqual %0, %1 : f32
%5 = spv.FOrdEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FOrdGreaterThanEqual (spirv::FOrdGreaterThanEqualOp)

Floating-point comparison if operands are ordered and Operand 1 is
greater than or equal to Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordgte-op ::= ssa-id `=` `spv.FOrdGreaterThanEqual` ssa-use, ssa-use

For example:

%4 = spv.FOrdGreaterThanEqual %0, %1 : f32
%5 = spv.FOrdGreaterThanEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FOrdGreaterThan (spirv::FOrdGreaterThanOp)

Floating-point comparison if operands are ordered and Operand 1 is
greater than  Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordgt-op ::= ssa-id `=` `spv.FOrdGreaterThan` ssa-use, ssa-use

For example:

%4 = spv.FOrdGreaterThan %0, %1 : f32
%5 = spv.FOrdGreaterThan %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FOrdLessThanEqual (spirv::FOrdLessThanEqualOp)

Floating-point comparison if operands are ordered and Operand 1 is less
than or equal to Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordlte-op ::= ssa-id `=` `spv.FOrdLessThanEqual` ssa-use, ssa-use

For example:

%4 = spv.FOrdLessThanEqual %0, %1 : f32
%5 = spv.FOrdLessThanEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FOrdLessThan (spirv::FOrdLessThanOp)

Floating-point comparison if operands are ordered and Operand 1 is less
than Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordlt-op ::= ssa-id `=` `spv.FOrdLessThan` ssa-use, ssa-use

For example:

%4 = spv.FOrdLessThan %0, %1 : f32
%5 = spv.FOrdLessThan %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FOrdNotEqual (spirv::FOrdNotEqualOp)

Floating-point comparison for being ordered and not equal.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fordneq-op ::= ssa-id `=` `spv.FOrdNotEqual` ssa-use, ssa-use

For example:

%4 = spv.FOrdNotEqual %0, %1 : f32
%5 = spv.FOrdNotEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FRem (spirv::FRemOp)

The floating-point remainder whose sign matches the sign of Operand 1.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 1.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
frem-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FSub (spirv::FSubOp)

Floating-point subtraction of Operand 2 from Operand 1.

Description:

Result Type must be a scalar or vector of floating-point type.

The types of Operand 1 and Operand 2 both must be the same as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fsub-op ::= ssa-id `=` `spv.FRemOp` ssa-use, ssa-use
                      `:` float-scalar-vector-type

For example:

%4 = spv.FRemOp %0, %1 : f32
%5 = spv.FRemOp %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.FUnordEqual (spirv::FUnordEqualOp)

Floating-point comparison for being unordered or equal.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordequal-op ::= ssa-id `=` `spv.FUnordEqual` ssa-use, ssa-use

For example:

%4 = spv.FUnordEqual %0, %1 : f32
%5 = spv.FUnordEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FUnordGreaterThanEqual (spirv::FUnordGreaterThanEqualOp)

Floating-point comparison if operands are unordered or Operand 1 is
greater than or equal to Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordgte-op ::= ssa-id `=` `spv.FUnordGreaterThanEqual` ssa-use, ssa-use

For example:

%4 = spv.FUnordGreaterThanEqual %0, %1 : f32
%5 = spv.FUnordGreaterThanEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FUnordGreaterThan (spirv::FUnordGreaterThanOp)

Floating-point comparison if operands are unordered or Operand 1 is
greater than  Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordgt-op ::= ssa-id `=` `spv.FUnordGreaterThan` ssa-use, ssa-use

For example:

%4 = spv.FUnordGreaterThan %0, %1 : f32
%5 = spv.FUnordGreaterThan %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FUnordLessThanEqual (spirv::FUnordLessThanEqualOp)

Floating-point comparison if operands are unordered or Operand 1 is less
than or equal to Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordlte-op ::= ssa-id `=` `spv.FUnordLessThanEqual` ssa-use, ssa-use

For example:

%4 = spv.FUnordLessThanEqual %0, %1 : f32
%5 = spv.FUnordLessThanEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FUnordLessThan (spirv::FUnordLessThanOp)

Floating-point comparison if operands are unordered or Operand 1 is less
than Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordlt-op ::= ssa-id `=` `spv.FUnordLessThan` ssa-use, ssa-use

For example:

%4 = spv.FUnordLessThan %0, %1 : f32
%5 = spv.FUnordLessThan %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.FUnordNotEqual (spirv::FUnordNotEqualOp)

Floating-point comparison for being unordered or not equal.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. They must have the same type, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
funordneq-op ::= ssa-id `=` `spv.FUnordNotEqual` ssa-use, ssa-use

For example:

%4 = spv.FUnordNotEqual %0, %1 : f32
%5 = spv.FUnordNotEqual %2, %3 : vector<4xf32>

Operands:

  1. operand1: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. operand2: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.func (spirv::FuncOp)

Declare or define a function

Description:

This op declares or defines a SPIR-V function using one region, which contains one or more blocks.

Different from the SPIR-V binary format, this op is not allowed to implicitly capture global values, and all external references must use function arguments or symbol references. This op itself defines a symbol that is unique in the enclosing module op.

This op itself takes no operands and generates no results. Its region can take zero or more arguments and return zero or one values.

Custom assembly form

spv-function-control ::= "None" | "Inline" | "DontInline" | ...
spv-function-op ::= `spv.func` function-signature
                     spv-function-control region

For example:

spv.func @foo() -> () "None" { ... }
spv.func @bar() -> () "Inline|Pure" { ... }

Operands:

Attributes:

AttributeMLIR TypeDescription
typeTypeAttrany type attribute attribute
sym_nameStringAttrstring attribute attribute
function_controlIntegerAttrvalid SPIR-V FunctionControl attribute

Results:

spv.FunctionCall (spirv::FunctionCallOp)

Call a function.

Description:

Result Type is the type of the return value of the function. It must be the same as the Return Type operand of the Function Type operand of the Function operand.

Function is an OpFunction instruction. This could be a forward reference.

Argument N is the object to copy to parameter N of Function.

Note: A forward call is possible because there is no missing type information: Result Type must match the Return Type of the function, and the calling argument types must match the formal parameter types.

Custom assembly form

function-call-op ::= `spv.FunctionCall` function-id `(` ssa-use-list `)`
                 `:` function-type

For example:

spv.FunctionCall @f_void(%arg0) : (i32) ->  ()
%0 = spv.FunctionCall @f_iadd(%arg0, %arg1) : (i32, i32) -> i32

Operands:

  1. arguments: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

Attributes:

AttributeMLIR TypeDescription
calleeFlatSymbolRefAttrflat symbol reference attribute attribute

Results:

  1. result: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.GLSL.Ceil (spirv::GLSLCeilOp)

Rounds up to the next whole number

Description:

Result is the value equal to the nearest whole number that is greater than or equal to x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
ceil-op ::= ssa-id `=` `spv.GLSL.Ceil` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.Ceil %0 : f32
%3 = spv.GLSL.Ceil %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.Cos (spirv::GLSLCosOp)

Cosine of operand in radians

Description:

The standard trigonometric cosine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
cos-op ::= ssa-id `=` `spv.GLSL.Cos` ssa-use `:`
           restricted-float-scalar-vector-type

For example:

%2 = spv.GLSL.Cos %0 : f32
%3 = spv.GLSL.Cos %1 : vector<3xf16>

Operands:

  1. operand: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

spv.GLSL.Exp (spirv::GLSLExpOp)

Exponentiation of Operand 1

Description:

Result is the natural exponentiation of x; e^x.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.";

Custom assembly format

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
exp-op ::= ssa-id `=` `spv.GLSL.Exp` ssa-use `:`
           restricted-float-scalar-vector-type

For example:

%2 = spv.GLSL.Exp %0 : f32
%3 = spv.GLSL.Exp %1 : vector<3xf16>

Operands:

  1. operand: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

spv.GLSL.FAbs (spirv::GLSLFAbsOp)

Absolute value of operand

Description:

Result is x if x >= 0; otherwise result is -x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
abs-op ::= ssa-id `=` `spv.GLSL.FAbs` ssa-use `:`
           float-scalar-vector-type

For example:

%2 = spv.GLSL.FAbs %0 : f32
%3 = spv.GLSL.FAbs %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.FMax (spirv::GLSLFMaxOp)

Return maximum of two floating-point operands

Description:

Result is y if x < y; otherwise result is x. Which operand is the result is undefined if one of the operands is a NaN.

The operands must all be a scalar or vector whose component type is floating-point.

Result Type and the type of all operands must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmax-op ::= ssa-id `=` `spv.GLSL.FMax` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.FMax %0, %1 : f32
%3 = spv.GLSL.FMax %0, %1 : vector<3xf16>

Operands:

  1. lhs: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. rhs: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.FMin (spirv::GLSLFMinOp)

Return minimum of two floating-point operands

Description:

Result is y if y < x; otherwise result is x. Which operand is the result is undefined if one of the operands is a NaN.

The operands must all be a scalar or vector whose component type is floating-point.

Result Type and the type of all operands must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
fmin-op ::= ssa-id `=` `spv.GLSL.FMin` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.FMin %0, %1 : f32
%3 = spv.GLSL.FMin %0, %1 : vector<3xf16>

Operands:

  1. lhs: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. rhs: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.FSign (spirv::GLSLFSignOp)

Returns the sign of the operand

Description:

Result is 1.0 if x > 0, 0.0 if x = 0, or -1.0 if x < 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
sign-op ::= ssa-id `=` `spv.GLSL.FSign` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.FSign %0 : f32
%3 = spv.GLSL.FSign %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.Floor (spirv::GLSLFloorOp)

Rounds down to the next whole number

Description:

Result is the value equal to the nearest whole number that is less than or equal to x.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
floor-op ::= ssa-id `=` `spv.GLSL.Floor` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.Floor %0 : f32
%3 = spv.GLSL.Floor %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.InverseSqrt (spirv::GLSLInverseSqrtOp)

Reciprocal of sqrt(operand)

Description:

Result is the reciprocal of sqrt x. Result is undefined if x <= 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
rsqrt-op ::= ssa-id `=` `spv.GLSL.InverseSqrt` ssa-use `:`
             float-scalar-vector-type

For example:

%2 = spv.GLSL.InverseSqrt %0 : f32
%3 = spv.GLSL.InverseSqrt %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.Log (spirv::GLSLLogOp)

Natural logarithm of the operand

Description:

Result is the natural logarithm of x, i.e., the value y which satisfies the equation x = ey. Result is undefined if x <= 0.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
log-op ::= ssa-id `=` `spv.GLSL.Log` ssa-use `:`
           restricted-float-scalar-vector-type

For example:

%2 = spv.GLSL.Log %0 : f32
%3 = spv.GLSL.Log %1 : vector<3xf16>

Operands:

  1. operand: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

spv.GLSL.SAbs (spirv::GLSLSAbsOp)

Absolute value of operand

Description:

Result is x if x ≥ 0; otherwise result is -x, where x is interpreted as a signed integer.

Result Type and the type of x must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

Custom assembly format

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
abs-op ::= ssa-id `=` `spv.GLSL.SAbs` ssa-use `:`
           integer-scalar-vector-type

For example:

%2 = spv.GLSL.SAbs %0 : i32
%3 = spv.GLSL.SAbs %1 : vector<3xi16>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GLSL.SMax (spirv::GLSLSMaxOp)

Return maximum of two signed integer operands

Description:

Result is y if x < y; otherwise result is x, where x and y are interpreted as signed integers.

Result Type and the type of x and y must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

Custom assembly format

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
smax-op ::= ssa-id `=` `spv.GLSL.SMax` ssa-use `:`
            integer-scalar-vector-type

For example:

%2 = spv.GLSL.SMax %0, %1 : i32
%3 = spv.GLSL.SMax %0, %1 : vector<3xi16>

Operands:

  1. lhs: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. rhs: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GLSL.SMin (spirv::GLSLSMinOp)

Return minimum of two signed integer operands

Description:

Result is y if y < x; otherwise result is x, where x and y are interpreted as signed integers.

Result Type and the type of x and y must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

Custom assembly format

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
smin-op ::= ssa-id `=` `spv.GLSL.SMin` ssa-use `:`
            integer-scalar-vector-type

For example:

%2 = spv.GLSL.SMin %0, %1 : i32
%3 = spv.GLSL.SMin %0, %1 : vector<3xi16>

Operands:

  1. lhs: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. rhs: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GLSL.SSign (spirv::GLSLSSignOp)

Returns the sign of the operand

Description:

Result is 1 if x > 0, 0 if x = 0, or -1 if x < 0, where x is interpreted as a signed integer.

Result Type and the type of x must both be integer scalar or integer vector types. Result Type and operand types must have the same number of components with the same component width. Results are computed per component.

Custom assembly format

integer-scalar-vector-type ::= integer-type |
                               `vector<` integer-literal `x` integer-type `>`
sign-op ::= ssa-id `=` `spv.GLSL.SSign` ssa-use `:`
            integer-scalar-vector-type

For example:

%2 = spv.GLSL.SSign %0 : i32
%3 = spv.GLSL.SSign %1 : vector<3xi16>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GLSL.Sin (spirv::GLSLSinOp)

Sine of operand in radians

Description:

The standard trigonometric sine of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
sin-op ::= ssa-id `=` `spv.GLSL.Sin` ssa-use `:`
           restricted-float-scalar-vector-type

For example:

%2 = spv.GLSL.Sin %0 : f32
%3 = spv.GLSL.Sin %1 : vector<3xf16>

Operands:

  1. operand: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

spv.GLSL.Sqrt (spirv::GLSLSqrtOp)

Returns the square root of the operand

Description:

Result is the square root of x. Result is undefined if x < 0.

The operand x must be a scalar or vector whose component type is floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
sqrt-op ::= ssa-id `=` `spv.GLSL.Sqrt` ssa-use `:`
            float-scalar-vector-type

For example:

%2 = spv.GLSL.Sqrt %0 : f32
%3 = spv.GLSL.Sqrt %1 : vector<3xf16>

Operands:

  1. operand: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GLSL.Tanh (spirv::GLSLTanhOp)

Hyperbolic tangent of operand in radians

Description:

Hyperbolic tangent of x radians.

The operand x must be a scalar or vector whose component type is 16-bit or 32-bit floating-point.

Result Type and the type of x must be the same type. Results are computed per component.

Custom assembly format

restricted-float-scalar-type ::=  `f16` | `f32`
restricted-float-scalar-vector-type ::=
  restricted-float-scalar-type |
  `vector<` integer-literal `x` restricted-float-scalar-type `>`
tanh-op ::= ssa-id `=` `spv.GLSL.Tanh` ssa-use `:`
            restricted-float-scalar-vector-type

For example:

%2 = spv.GLSL.Tanh %0 : f32
%3 = spv.GLSL.Tanh %1 : vector<3xf16>

Operands:

  1. operand: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

Attributes:

Results:

  1. result: 16/32-bit float or vector of 16/32-bit float values of length 2/3/4

spv.globalVariable (spirv::GlobalVariableOp)

Allocate an object in memory at module scope. The object is
referenced using a symbol name.

Description:

The variable type must be an OpTypePointer. Its type operand is the type of object in memory.

Storage Class is the Storage Class of the memory holding the object. It cannot be Generic. It must be the same as the Storage Class operand of the variable types. Only those storage classes that are valid at module scope (like Input, Output, StorageBuffer, etc.) are valid.

Initializer is optional. If Initializer is present, it will be the initial value of the variable’s memory content. Initializer must be an symbol defined from a constant instruction or other spv.globalVariable operation in module scope. Initializer must have the same type as the type of the defined symbol.

Custom assembly form

variable-op ::= `spv.globalVariable` spirv-type symbol-ref-id
                (`initializer(` symbol-ref-id `)`)?
                (`bind(` integer-literal, integer-literal `)`)?
                (`built_in(` string-literal `)`)?
                attribute-dict?

where initializer specifies initializer and bind specifies the descriptor set and binding number. built_in specifies SPIR-V BuiltIn decoration associated with the op.

For example:

spv.globalVariable @var0 : !spv.ptr<f32, Input> @var0
spv.globalVariable @var1 initializer(@var0) : !spv.ptr<f32, Output>
spv.globalVariable @var2 bind(1, 2) : !spv.ptr<f32, Uniform>
spv.globalVariable @var3 built_in("GlobalInvocationId") : !spv.ptr<vector<3xi32>, Input>

Operands:

Attributes:

AttributeMLIR TypeDescription
typeTypeAttrany type attribute attribute
sym_nameStringAttrstring attribute attribute
initializerFlatSymbolRefAttrflat symbol reference attribute attribute

Results:

spv.GroupNonUniformBallot (spirv::GroupNonUniformBallotOp)

Returns a bitfield value combining the Predicate value from all
invocations in the group that execute the same dynamic instance of this
instruction. The bit is set to one if the corresponding invocation is
active and the Predicate for that invocation evaluated to true;
otherwise, it is set to zero.

Description:

Result Type must be a vector of four components of integer type scalar, whose Signedness operand is 0.

Result is a set of bitfields where the first invocation is represented in the lowest bit of the first vector component and the last (up to the size of the group) is the higher bit number of the last bitmask needed to represent all bits of the group invocations.

Execution must be Workgroup or Subgroup Scope.

Predicate must be a Boolean type.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
non-uniform-ballot-op ::= ssa-id `=` `spv.GroupNonUniformBallot` scope
                          ssa-use `:` `vector` `<` 4 `x` `integer-type` `>`

For example:

%0 = spv.GroupNonUniformBallot "SubGroup" %predicate : vector<4xi32>

Operands:

  1. predicate: 1-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute

Results:

  1. result: vector of 8/16/32/64-bit integer values of length 4

spv.GroupNonUniformElect (spirv::GroupNonUniformElectOp)

Result is true only in the active invocation with the lowest id in the
group, otherwise result is false.

Description:

Result Type must be a Boolean type.

Execution must be Workgroup or Subgroup Scope.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
non-uniform-elect-op ::= ssa-id `=` `spv.GroupNonUniformElect` scope
                         `:` `i1`

For example:

%0 = spv.GroupNonUniformElect : i1

Operands:

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute

Results:

  1. result: 1-bit integer

spv.GroupNonUniformFAdd (spirv::GroupNonUniformFAddOp)

A floating point add group operation of all Value operands contributed
by active invocations in the group.

Description:

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fadd-op ::= ssa-id `=` `spv.GroupNonUniformFAdd` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFAdd "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFAdd "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Operands:

  1. value: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GroupNonUniformFMax (spirv::GroupNonUniformFMaxOp)

A floating point maximum group operation of all Value operands
contributed by active invocations in by group.

Description:

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is -INF. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined. From the set of Value(s) provided by active invocations within a subgroup, if for any two Values one of them is a NaN, the other is chosen. If all Value(s) that are used by the current invocation are NaN, then the result is an undefined value.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmax-op ::= ssa-id `=` `spv.GroupNonUniformFMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMax "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Operands:

  1. value: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GroupNonUniformFMin (spirv::GroupNonUniformFMinOp)

A floating point minimum group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is +INF. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined. From the set of Value(s) provided by active invocations within a subgroup, if for any two Values one of them is a NaN, the other is chosen. If all Value(s) that are used by the current invocation are NaN, then the result is an undefined value.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmin-op ::= ssa-id `=` `spv.GroupNonUniformFMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMin "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Operands:

  1. value: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GroupNonUniformFMul (spirv::GroupNonUniformFMulOp)

A floating point multiply group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of floating-point type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 1. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type. The method used to perform the group operation on the contributed Value(s) from active invocations is implementation defined.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
float-scalar-vector-type ::= float-type |
                             `vector<` integer-literal `x` float-type `>`
non-uniform-fmul-op ::= ssa-id `=` `spv.GroupNonUniformFMul` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` float-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : f32
%vector = ... : vector<4xf32>
%0 = spv.GroupNonUniformFMul "Workgroup" "Reduce" %scalar : f32
%1 = spv.GroupNonUniformFMul "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xf32>

Operands:

  1. value: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 16/32/64-bit float or vector of 16/32/64-bit float values of length 2/3/4

spv.GroupNonUniformIAdd (spirv::GroupNonUniformIAddOp)

An integer add group operation of all Value operands contributed active
by invocations in the group.

Description:

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-iadd-op ::= ssa-id `=` `spv.GroupNonUniformIAdd` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformIAdd "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformIAdd "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GroupNonUniformIMul (spirv::GroupNonUniformIMulOp)

An integer multiply group operation of all Value operands contributed by
active invocations in the group.

Description:

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 1. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-imul-op ::= ssa-id `=` `spv.GroupNonUniformIMul` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformIMul "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformIMul "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GroupNonUniformSMax (spirv::GroupNonUniformSMaxOp)

A signed integer maximum group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is INT_MIN. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-smax-op ::= ssa-id `=` `spv.GroupNonUniformSMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformSMax "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformSMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GroupNonUniformSMin (spirv::GroupNonUniformSMinOp)

A signed integer minimum group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of integer type.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is INT_MAX. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-smin-op ::= ssa-id `=` `spv.GroupNonUniformSMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformSMin "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformSMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GroupNonUniformUMax (spirv::GroupNonUniformUMaxOp)

An unsigned integer maximum group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is 0. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-umax-op ::= ssa-id `=` `spv.GroupNonUniformUMax` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformUMax "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformUMax "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.GroupNonUniformUMin (spirv::GroupNonUniformUMinOp)

An unsigned integer minimum group operation of all Value operands
contributed by active invocations in the group.

Description:

Result Type must be a scalar or vector of integer type, whose Signedness operand is 0.

Execution must be Workgroup or Subgroup Scope.

The identity I for Operation is UINT_MAX. If Operation is ClusteredReduce, ClusterSize must be specified.

The type of Value must be the same as Result Type.

ClusterSize is the size of cluster to use. ClusterSize must be a scalar of integer type, whose Signedness operand is 0. ClusterSize must come from a constant instruction. ClusterSize must be at least 1, and must be a power of 2. If ClusterSize is greater than the declared SubGroupSize, executing this instruction results in undefined behavior.

Custom assembly form

scope ::= `"Workgroup"` | `"Subgroup"`
operation ::= `"Reduce"` | `"InclusiveScan"` | `"ExclusiveScan"` | ...
integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
non-uniform-umin-op ::= ssa-id `=` `spv.GroupNonUniformUMin` scope operation
                        ssa-use ( `cluster_size` `(` ssa_use `)` )?
                        `:` integer-scalar-vector-type

For example:

%four = spv.constant 4 : i32
%scalar = ... : i32
%vector = ... : vector<4xi32>
%0 = spv.GroupNonUniformUMin "Workgroup" "Reduce" %scalar : i32
%1 = spv.GroupNonUniformUMin "Subgroup" "ClusteredReduce" %vector cluster_size(%four) : vector<4xi32>

Operands:

  1. value: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. cluster_size: 8/16/32/64-bit integer

Attributes:

AttributeMLIR TypeDescription
execution_scopeIntegerAttrvalid SPIR-V Scope attribute
group_operationIntegerAttrvalid SPIR-V GroupOperation attribute

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.IAdd (spirv::IAddOp)

Integer addition of Operand 1 and Operand 2.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
iadd-op ::= ssa-id `=` `spv.IAdd` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

For example:

%4 = spv.IAdd %0, %1 : i32
%5 = spv.IAdd %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.IEqual (spirv::IEqualOp)

Integer comparison for equality.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
iequal-op ::= ssa-id `=` `spv.IEqual` ssa-use, ssa-use
                         `:` integer-scalar-vector-type

For example:

%4 = spv.IEqual %0, %1 : i32
%5 = spv.IEqual %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.IMul (spirv::IMulOp)

Integer multiplication of Operand 1 and Operand 2.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
imul-op ::= ssa-id `=` `spv.IMul` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

For example:

%4 = spv.IMul %0, %1 : i32
%5 = spv.IMul %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.INotEqual (spirv::INotEqualOp)

Integer comparison for inequality.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
inot-equal-op ::= ssa-id `=` `spv.INotEqual` ssa-use, ssa-use
                             `:` integer-scalar-vector-type

For example:

%4 = spv.INotEqual %0, %1 : i32
%5 = spv.INotEqual %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.ISub (spirv::ISubOp)

Integer subtraction of Operand 2 from Operand 1.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

The resulting value will equal the low-order N bits of the correct result R, where N is the component width and R is computed with enough precision to avoid overflow and underflow.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
isub-op ::= `spv.ISub` ssa-use, ssa-use
                      `:` integer-scalar-vector-type

For example:

%4 = spv.ISub %0, %1 : i32
%5 = spv.ISub %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.Load (spirv::LoadOp)

Load through a pointer.

Description:

Result Type is the type of the loaded object. It must be a type with fixed size; i.e., it cannot be, nor include, any OpTypeRuntimeArray types.

Pointer is the pointer to load through. Its type must be an OpTypePointer whose Type operand is the same as Result Type.

If present, any Memory Operands must begin with a memory operand literal. If not present, it is the same as specifying the memory operand None.

Custom assembly form

memory-access ::= `"None"` | `"Volatile"` | `"Aligned", ` integer-literal
                | `"NonTemporal"`

load-op ::= ssa-id ` = spv.Load ` storage-class ssa-use
            (`[` memory-access `]`)? ` : ` spirv-element-type

For example:

%0 = spv.Variable : !spv.ptr<f32, Function>
%1 = spv.Load "Function" %0 : f32
%2 = spv.Load "Function" %0 ["Volatile"] : f32
%3 = spv.Load "Function" %0 ["Aligned", 4] : f32

Operands:

  1. ptr: any SPIR-V pointer type

Attributes:

AttributeMLIR TypeDescription
memory_accessIntegerAttrvalid SPIR-V MemoryAccess attribute
alignmentIntegerAttr32-bit integer attribute attribute

Results:

  1. value: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.LogicalAnd (spirv::LogicalAndOp)

Result is true if both Operand 1 and Operand 2 are true. Result is false
if either Operand 1 or Operand 2 are false.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

Custom assembly form

logical-and ::= `spv.LogicalAnd` ssa-use `,` ssa-use
                `:` operand-type

For example:

%2 = spv.LogicalAnd %0, %1 : i1
%2 = spv.LogicalAnd %0, %1 : vector<4xi1>

Operands:

  1. operand1: 1-bit integer or vector of 1-bit integer values of length 2/3/4
  2. operand2: 1-bit integer or vector of 1-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.LogicalEqual (spirv::LogicalEqualOp)

Result is true if Operand 1 and Operand 2 have the same value. Result is
false if Operand 1 and Operand 2 have different values.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

Custom assembly form

logical-equal ::= `spv.LogicalEqual` ssa-use `,` ssa-use
                  `:` operand-type

For example:

%2 = spv.LogicalEqual %0, %1 : i1
%2 = spv.LogicalEqual %0, %1 : vector<4xi1>

Operands:

  1. operand1: 1-bit integer or vector of 1-bit integer values of length 2/3/4
  2. operand2: 1-bit integer or vector of 1-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.LogicalNotEqual (spirv::LogicalNotEqualOp)

Result is true if Operand 1 and Operand 2 have different values. Result
is false if Operand 1 and Operand 2 have the same value.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

Custom assembly form

logical-not-equal ::= `spv.LogicalNotEqual` ssa-use `,` ssa-use
                      `:` operand-type

For example:

%2 = spv.LogicalNotEqual %0, %1 : i1
%2 = spv.LogicalNotEqual %0, %1 : vector<4xi1>

Operands:

  1. operand1: 1-bit integer or vector of 1-bit integer values of length 2/3/4
  2. operand2: 1-bit integer or vector of 1-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.LogicalNot (spirv::LogicalNotOp)

Result is true if Operand is false.  Result is false if Operand is true.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand must be the same as Result Type.

Results are computed per component.

Custom assembly form

logical-not ::= `spv.LogicalNot` ssa-use `:` operand-type

For example:

%2 = spv.LogicalNot %0 : i1
%2 = spv.LogicalNot %0 : vector<4xi1>

Operands:

  1. operand: 1-bit integer or vector of 1-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.LogicalOr (spirv::LogicalOrOp)

Result is true if either Operand 1 or Operand 2 is true. Result is false
if both Operand 1 and Operand 2 are false.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 must be the same as Result Type.

The type of Operand 2 must be the same as Result Type.

Results are computed per component.

Custom assembly form

logical-or ::= `spv.LogicalOr` ssa-use `,` ssa-use
                `:` operand-type

For example:

%2 = spv.LogicalOr %0, %1 : i1
%2 = spv.LogicalOr %0, %1 : vector<4xi1>

Operands:

  1. operand1: 1-bit integer or vector of 1-bit integer values of length 2/3/4
  2. operand2: 1-bit integer or vector of 1-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.loop (spirv::LoopOp)

Define a structured loop.

Description:

SPIR-V can explicitly declare structured control-flow constructs using merge instructions. These explicitly declare a header block before the control flow diverges and a merge block where control flow subsequently converges. These blocks delimit constructs that must nest, and can only be entered and exited in structured ways. See “2.11. Structured Control Flow” of the SPIR-V spec for more details.

Instead of having a spv.LoopMerge op to directly model loop merge instruction for indicating the merge and continue target, we use regions to delimit the boundary of the loop: the merge target is the next op following the spv.loop op and the continue target is the block that has a back-edge pointing to the entry block inside the spv.loop's region. This way it’s easier to discover all blocks belonging to a construct and it plays nicer with the MLIR system.

The spv.loop region should contain at least four blocks: one entry block, one loop header block, one loop continue block, one loop merge block. The entry block should be the first block and it should jump to the loop header block, which is the second block. The loop merge block should be the last block. The merge block should only contain a spv._merge op. The continue block should be the second to last block and it should have a branch to the loop header block. The loop continue block should be the only block, except the entry block, branching to the header block.

Operands:

Attributes:

AttributeMLIR TypeDescription
loop_controlIntegerAttrvalid SPIR-V LoopControl attribute

Results:

spv.MemoryBarrier (spirv::MemoryBarrierOp)

Control the order that memory accesses are observed.

Description:

Ensures that memory accesses issued before this instruction will be observed before memory accesses issued after this instruction. This control is ensured only for memory accesses issued by this invocation and observed by another invocation executing within Memory scope. If the Vulkan memory model is declared, this ordering only applies to memory accesses that use the NonPrivatePointer memory operand or NonPrivateTexel image operand.

Semantics declares what kind of memory is being controlled and what kind of control to apply.

To execute both a memory barrier and a control barrier, see OpControlBarrier.

Custom assembly form

scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...

memory-semantics ::= `"None"` | `"Acquire"` | `"Release"` | ...

memory-barrier-op ::= `spv.MemoryBarrier` scope, memory-semantics

For example:

spv.MemoryBarrier "Device", "Acquire|UniformMemory"

Operands:

Attributes:

AttributeMLIR TypeDescription
memory_scopeIntegerAttrvalid SPIR-V Scope attribute
memory_semanticsIntegerAttrvalid SPIR-V MemorySemantics attribute

Results:

spv._merge (spirv::MergeOp)

A special terminator for merging a structured selection/loop.

Description:

We use spv.selection/spv.loop for modelling structured selection/loop. This op is a terminator used inside their regions to mean jumping to the merge point, which is the next op following the spv.selection or spv.loop op. This op does not have a corresponding instruction in the SPIR-V binary format; it’s solely for structural purpose.

Operands:

Attributes:

Results:

spv._module_end (spirv::ModuleEndOp)

The pseudo op that ends a SPIR-V module

Description:

This op terminates the only block inside a spv.module's only region. This op does not have a corresponding SPIR-V instruction and thus will not be serialized into the binary format; it is used solely to satisfy the structual requirement that an block must be ended with a terminator.

Operands:

Attributes:

Results:

spv.module (spirv::ModuleOp)

The top-level op that defines a SPIR-V module

Description:

This op defines a SPIR-V module using a MLIR region. The region contains one block. Module-level operations, including functions definitions, are all placed in this block.

Using an op with a region to define a SPIR-V module enables “embedding” SPIR-V modules in other dialects in a clean manner: this op guarantees the validity and serializability of a SPIR-V module and thus serves as a clear-cut boundary.

This op takes no operands and generates no results. This op should not implicitly capture values from the enclosing environment.

This op has only one region, which only contains one block. The block must be terminated via the spv._module_end op.

Custom assembly form

addressing-model ::= `"Logical"` | `"Physical32"` | `"Physical64"`
memory-model ::= `"Simple"` | `"GLSL450"` | `"OpenCL"` | `"VulkanKHR"`
spv-module-op ::= `spv.module` addressing-model memory-model
                  region
                  (`attributes` attribute-dict)?

For example:

spv.module "Logical" "VulkanKHR" { }

spv.module "Logical" "VulkanKHR" {
  func @do_nothing() -> () {
    spv.Return
  }
} attributes {
  capability = ["Shader"],
  extension = ["SPV_KHR_16bit_storage"]
}

Operands:

Attributes:

AttributeMLIR TypeDescription
addressing_modelIntegerAttrvalid SPIR-V AddressingModel attribute
memory_modelIntegerAttrvalid SPIR-V MemoryModel attribute
capabilitiesArrayAttrstring array attribute attribute
extensionsArrayAttrstring array attribute attribute
extended_instruction_setsArrayAttrstring array attribute attribute

Results:

spv.Not (spirv::NotOp)

Complement the bits of Operand.

Description:

Results are computed per component, and within each component, per bit.

Result Type must be a scalar or vector of integer type.

Operand’s type must be a scalar or vector of integer type. It must have the same number of components as Result Type. The component width must equal the component width in Result Type.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
not-op ::= ssa-id `=` `spv.BitNot` ssa-use `:` integer-scalar-vector-type

For example:

%2 = spv.Not %0 : i32
%3 = spv.Not %1 : vector<4xi32>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv._reference_of (spirv::ReferenceOfOp)

Reference a specialization constant.

Description:

Specialization constant in module scope are defined using symbol names. This op generates an SSA value that can be used to refer to the symbol within function scope for use in ops that expect an SSA value. This operation has no corresponding SPIR-V instruction; it’s merely used for modelling purpose in the SPIR-V dialect. This op’s return type is the same as the specialization constant.

Custom assembly form

spv-reference-of-op ::= ssa-id `=` `spv._reference_of` symbol-ref-id
                                   `:` spirv-scalar-type

For example:

%0 = spv._reference_of @spec_const : f32

Operands:

Attributes:

AttributeMLIR TypeDescription
spec_constFlatSymbolRefAttrflat symbol reference attribute attribute

Results:

  1. reference: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

spv.Return (spirv::ReturnOp)

Return with no value from a function with void return type.

Description:

This instruction must be the last instruction in a block.

Custom assembly form

return-op ::= `spv.Return`

Operands:

Attributes:

Results:

spv.ReturnValue (spirv::ReturnValueOp)

Return a value from a function.

Description:

Value is the value returned, by copy, and must match the Return Type operand of the OpTypeFunction type of the OpFunction body this return instruction is in.

This instruction must be the last instruction in a block.

Custom assembly form

return-value-op ::= `spv.ReturnValue` ssa-use `:` spirv-type

For example:

spv.ReturnValue %0 : f32

Operands:

  1. value: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

Attributes:

Results:

spv.SConvert (spirv::SConvertOp)

Convert signed width.  This is either a truncate or a sign extend.

Description:

Result Type must be a scalar or vector of integer type.

Signed Value must be a scalar or vector of integer type. It must have the same number of components as Result Type. The component width cannot equal the component width in Result Type.

Results are computed per component.

Custom assembly form

s-convert-op ::= ssa-id `=` `spv.SConvertOp` ssa-use
                 `:` operand-type `to` result-type

For example:

%1 = spv.SConvertOp %0 : i32 to i64
%3 = spv.SConvertOp %2 : vector<3xi32> to vector<3xi64>

Operands:

  1. operand: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.SDiv (spirv::SDivOp)

Signed-integer division of Operand 1 divided by Operand 2.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sdiv-op ::= ssa-id `=` `spv.SDiv` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

For example:

%4 = spv.SDiv %0, %1 : i32
%5 = spv.SDiv %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.SGreaterThanEqual (spirv::SGreaterThanEqualOp)

Signed-integer comparison if Operand 1 is greater than or equal to
Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sgreater-than-equal-op ::= ssa-id `=` `spv.SGreaterThanEqual` ssa-use, ssa-use
                                      `:` integer-scalar-vector-type

For example:

%4 = spv.SGreaterThanEqual %0, %1 : i32
%5 = spv.SGreaterThanEqual %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.SGreaterThan (spirv::SGreaterThanOp)

Signed-integer comparison if Operand 1 is greater than  Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sgreater-than-op ::= ssa-id `=` `spv.SGreaterThan` ssa-use, ssa-use
                                `:` integer-scalar-vector-type

For example:

%4 = spv.SGreaterThan %0, %1 : i32
%5 = spv.SGreaterThan %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.SLessThanEqual (spirv::SLessThanEqualOp)

Signed-integer comparison if Operand 1 is less than or equal to Operand
2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sless-than-equal-op ::= ssa-id `=` `spv.SLessThanEqual` ssa-use, ssa-use
                                   `:` integer-scalar-vector-type

For example:

%4 = spv.SLessThanEqual %0, %1 : i32
%5 = spv.SLessThanEqual %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.SLessThan (spirv::SLessThanOp)

Signed-integer comparison if Operand 1 is less than Operand 2.

Description:

Result Type must be a scalar or vector of Boolean type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same component width, and they must have the same number of components as Result Type.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
sless-than-op ::= ssa-id `=` `spv.SLessThan` ssa-use, ssa-use
                             `:` integer-scalar-vector-type

For example:

%4 = spv.SLessThan %0, %1 : i32
%5 = spv.SLessThan %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 1-bit integer or vector of 1-bit integer values of length 2/3/4

spv.SMod (spirv::SModOp)

Signed remainder operation for the remainder whose sign matches the sign
of Operand 2.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 2.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
smod-op ::= ssa-id `=` `spv.SMod` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

For example:

%4 = spv.SMod %0, %1 : i32
%5 = spv.SMod %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.SRem (spirv::SRemOp)

Signed remainder operation for the remainder whose sign matches the sign
of Operand 1.

Description:

Result Type must be a scalar or vector of integer type.

The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. They must have the same number of components as Result Type. They must have the same component width as Result Type.

Results are computed per component. The resulting value is undefined if Operand 2 is 0. Otherwise, the result is the remainder r of Operand 1 divided by Operand 2 where if r ≠ 0, the sign of r is the same as the sign of Operand 1.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                             `vector<` integer-literal `x` integer-type `>`
srem-op ::= ssa-id `=` `spv.SRem` ssa-use, ssa-use
                       `:` integer-scalar-vector-type

For example:

%4 = spv.SRem %0, %1 : i32
%5 = spv.SRem %2, %3 : vector<4xi32>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.Select (spirv::SelectOp)

Select between two objects. Before version 1.4, results are only
computed per component.

Description:

Before version 1.4, Result Type must be a pointer, scalar, or vector.

The types of Object 1 and Object 2 must be the same as Result Type.

Condition must be a scalar or vector of Boolean type.

If Condition is a scalar and true, the result is Object 1. If Condition is a scalar and false, the result is Object 2.

If Condition is a vector, Result Type must be a vector with the same number of components as Condition and the result is a mix of Object 1 and Object 2: When a component of Condition is true, the corresponding component in the result is taken from Object 1, otherwise it is taken from Object 2.

Custom assembly form

scalar-type ::= integer-type | float-type | boolean-type
select-object-type ::= scalar-type
                       | `vector<` integer-literal `x` scalar-type `>`
                       | pointer-type
select-condition-type ::= boolean-type
                          | `vector<` integer-literal `x` boolean-type `>`
select-op ::= ssa-id `=` `spv.Select` ssa-use, ssa-use, ssa-use
              `:` select-condition-type `,` select-object-type

For example:

%3 = spv.Select %0, %1, %2 : i1, f32
%3 = spv.Select %0, %1, %2 : i1, vector<3xi32>
%3 = spv.Select %0, %1, %2 : vector<3xi1>, vector<3xf32>

Operands:

  1. condition: 1-bit integer or vector of 1-bit integer values of length 2/3/4
  2. true_value: 8/16/32/64-bit integer or 16/32/64-bit float or 1-bit integer or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type
  3. false_value: 8/16/32/64-bit integer or 16/32/64-bit float or 1-bit integer or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or 16/32/64-bit float or 1-bit integer or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type

spv.selection (spirv::SelectionOp)

Define a structured selection.

Description:

SPIR-V can explicitly declare structured control-flow constructs using merge instructions. These explicitly declare a header block before the control flow diverges and a merge block where control flow subsequently converges. These blocks delimit constructs that must nest, and can only be entered and exited in structured ways. See “2.11. Structured Control Flow” of the SPIR-V spec for more details.

Instead of having a spv.SelectionMerge op to directly model selection merge instruction for indicating the merge target, we use regions to delimit the boundary of the selection: the merge target is the next op following the spv.selection op. This way it’s easier to discover all blocks belonging to the selection and it plays nicer with the MLIR system.

The spv.selection region should contain at least two blocks: one selection header block, and one selection merge. The selection header block should be the first block. The selection merge block should be the last block. The merge block should only contain a spv._merge op.

Operands:

Attributes:

AttributeMLIR TypeDescription
selection_controlIntegerAttrvalid SPIR-V SelectionControl attribute

Results:

spv.ShiftLeftLogical (spirv::ShiftLeftLogicalOp)

Shift the bits in Base left by the number of bits specified in Shift.
The least-significant bits will be zero filled.

Description:

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is treated as unsigned. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

The number of components and bit width of Result Type must match those Base type. All types must be integer types.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-left-logical-op ::= ssa-id `=` `spv.ShiftLeftLogical`
                                      ssa-use `,` ssa-use `:`
                                      integer-scalar-vector-type `,`
                                      integer-scalar-vector-type

For example:

%2 = spv.ShiftLeftLogical %0, %1 : i32, i16
%5 = spv.ShiftLeftLogical %3, %4 : vector<3xi32>, vector<3xi16>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.ShiftRightArithmetic (spirv::ShiftRightArithmeticOp)

Shift the bits in Base right by the number of bits specified in Shift.
The most-significant bits will be filled with the sign bit from Base.

Description:

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is treated as unsigned. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-right-arithmetic-op ::= ssa-id `=` `spv.ShiftRightArithmetic`
                                          ssa-use `,` ssa-use `:`
                                          integer-scalar-vector-type `,`
                                          integer-scalar-vector-type

For example:

%2 = spv.ShiftRightArithmetic %0, %1 : i32, i16
%5 = spv.ShiftRightArithmetic %3, %4 : vector<3xi32>, vector<3xi16>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.ShiftRightLogical (spirv::ShiftRightLogicalOp)

Shift the bits in Base right by the number of bits specified in Shift.
The most-significant bits will be zero filled.

Description:

Result Type must be a scalar or vector of integer type.

The type of each Base and Shift must be a scalar or vector of integer type. Base and Shift must have the same number of components. The number of components and bit width of the type of Base must be the same as in Result Type.

Shift is consumed as an unsigned integer. The result is undefined if Shift is greater than or equal to the bit width of the components of Base.

Results are computed per component.

Custom assembly form

integer-scalar-vector-type ::= integer-type |
                              `vector<` integer-literal `x` integer-type `>`
shift-right-logical-op ::= ssa-id `=` `spv.ShiftRightLogical`
                                       ssa-use `,` ssa-use `:`
                                       integer-scalar-vector-type `,`
                                       integer-scalar-vector-type

For example:

%2 = spv.ShiftRightLogical %0, %1 : i32, i16
%5 = spv.ShiftRightLogical %3, %4 : vector<3xi32>, vector<3xi16>

Operands:

  1. operand1: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
  2. operand2: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

Attributes:

Results:

  1. result: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

spv.specConstant (spirv::SpecConstantOp)

The op that declares a SPIR-V specialization constant

Description:

This op declares a SPIR-V scalar specialization constant. SPIR-V has multiple constant instructions covering different scalar types:

  • OpSpecConstantTrue and OpSpecConstantFalse for boolean constants
  • OpSpecConstant for scalar constants

Similar as spv.constant, this op represents all of the above cases. OpSpecConstantComposite and OpSpecConstantOp are modelled with separate ops.

Custom assembly form

spv-spec-constant-op ::= `spv.specConstant` symbol-ref-id
                         `spec_id(` integer `)`
                         `=` attribute-value (`:` spirv-type)?

where spec_id specifies the SPIR-V SpecId decoration associated with the op.

For example:

spv.specConstant @spec_const1 = true
spv.specConstant @spec_const2 spec_id(5) = 42 : i32

TODO(antiagainst): support composite spec constants with another op

Operands:

Attributes:

AttributeMLIR TypeDescription
sym_nameStringAttrstring attribute attribute
default_valueAttributeany attribute attribute

Results:

spv.Store (spirv::StoreOp)

Store through a pointer.

Description:

Pointer is the pointer to store through. Its type must be an OpTypePointer whose Type operand is the same as the type of Object.

Object is the object to store.

If present, any Memory Operands must begin with a memory operand literal. If not present, it is the same as specifying the memory operand None.

Custom assembly form

store-op ::= `spv.Store ` storage-class ssa-use `, ` ssa-use `, `
              (`[` memory-access `]`)? `:` spirv-element-type

For example:

%0 = spv.Variable : !spv.ptr<f32, Function>
%1 = spv.FMul ... : f32
spv.Store "Function" %0, %1 : f32
spv.Store "Function" %0, %1 ["Volatile"] : f32
spv.Store "Function" %0, %1 ["Aligned", 4] : f32

#### Operands:

1. `ptr`: any SPIR-V pointer type
1. `value`: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

#### Attributes:

| Attribute | MLIR Type | Description |
| :-------: | :-------: | ----------- |
| `memory_access` | `IntegerAttr` | valid SPIR-V MemoryAccess attribute |
| `alignment` | `IntegerAttr` | 32-bit integer attribute attribute |

#### Results:


### spv.SubgroupBallotKHR (spirv::SubgroupBallotKHROp)
See extension SPV_KHR_shader_ballot

#### Description:


Computes a bitfield value combining the Predicate value from all invocations
in the current Subgroup that execute the same dynamic instance of this
instruction. The bit is set to one if the corresponding invocation is active
and the predicate is evaluated to true; otherwise, it is set to zero.

Predicate must be a Boolean type.

Result Type must be a 4 component vector of 32 bit integer types.

Result is a set of bitfields where the first invocation is represented in bit
0 of the first vector component and the last (up to SubgroupSize) is the
higher bit number of the last bitmask needed to represent all bits of the
subgroup invocations.

### Custom assembly form

subgroup-ballot-op ::= ssa-id = spv.SubgroupBallotKHR ssa-use : vector < 4 x i32 >


For example:

%0 = spv.SubgroupBallotKHR %predicate : vector<4xi32>


#### Operands:

1. `predicate`: 1-bit integer

#### Attributes:


#### Results:

1. `result`: vector of 32-bit integer values of length 4

### spv.UConvert (spirv::UConvertOp)

    Convert unsigned width. This is either a truncate or a zero extend.
  

#### Description:


Result Type must be a scalar or vector of integer type, whose Signedness
operand is 0.

Unsigned Value must be a scalar or vector of integer type.  It must have
the same number of components as Result Type.  The component width
cannot equal the component width in Result Type.

 Results are computed per component.

### Custom assembly form

u-convert-op ::= ssa-id = spv.UConvertOp ssa-use : operand-type to result-type


For example:

%1 = spv.UConvertOp %0 : i32 to i64 %3 = spv.UConvertOp %2 : vector<3xi32> to vector<3xi64>


#### Operands:

1. `operand`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

### spv.UDiv (spirv::UDivOp)
Unsigned-integer division of Operand 1 divided by Operand 2.

#### Description:


Result Type must be a scalar or vector of integer type, whose Signedness
operand is 0.

 The types of Operand 1 and Operand 2 both must be the same as Result
Type.

 Results are computed per component.  The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > udiv-op ::= ssa-id = spv.UDiv ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.UDiv %0, %1 : i32 %5 = spv.UDiv %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

### spv.UGreaterThanEqual (spirv::UGreaterThanEqualOp)

    Unsigned-integer comparison if Operand 1 is greater than or equal to
    Operand 2.
  

#### Description:


Result Type must be a scalar or vector of Boolean type.

 The type of Operand 1 and Operand 2  must be a scalar or vector of
integer type.  They must have the same component width, and they must
have the same number of components as Result Type.

 Results are computed per component.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > ugreater-than-equal-op ::= ssa-id = spv.UGreaterThanEqual ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.UGreaterThanEqual %0, %1 : i32 %5 = spv.UGreaterThanEqual %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 1-bit integer or vector of 1-bit integer values of length 2/3/4

### spv.UGreaterThan (spirv::UGreaterThanOp)

    Unsigned-integer comparison if Operand 1 is greater than  Operand 2.
  

#### Description:


Result Type must be a scalar or vector of Boolean type.

 The type of Operand 1 and Operand 2  must be a scalar or vector of
integer type.  They must have the same component width, and they must
have the same number of components as Result Type.

 Results are computed per component.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > ugreater-than-op ::= ssa-id = spv.UGreaterThan ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.UGreaterThan %0, %1 : i32 %5 = spv.UGreaterThan %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 1-bit integer or vector of 1-bit integer values of length 2/3/4

### spv.ULessThanEqual (spirv::ULessThanEqualOp)

    Unsigned-integer comparison if Operand 1 is less than or equal to
    Operand 2.
  

#### Description:


Result Type must be a scalar or vector of Boolean type.

 The type of Operand 1 and Operand 2  must be a scalar or vector of
integer type.  They must have the same component width, and they must
have the same number of components as Result Type.

 Results are computed per component.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > uless-than-equal-op ::= ssa-id = spv.ULessThanEqual ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.ULessThanEqual %0, %1 : i32 %5 = spv.ULessThanEqual %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 1-bit integer or vector of 1-bit integer values of length 2/3/4

### spv.ULessThan (spirv::ULessThanOp)

    Unsigned-integer comparison if Operand 1 is less than Operand 2.
  

#### Description:


Result Type must be a scalar or vector of Boolean type.

 The type of Operand 1 and Operand 2  must be a scalar or vector of
integer type.  They must have the same component width, and they must
have the same number of components as Result Type.

 Results are computed per component.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > uless-than-op ::= ssa-id = spv.ULessThan ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.ULessThan %0, %1 : i32 %5 = spv.ULessThan %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 1-bit integer or vector of 1-bit integer values of length 2/3/4

### spv.UMod (spirv::UModOp)
Unsigned modulo operation of Operand 1 modulo Operand 2.

#### Description:


Result Type must be a scalar or vector of integer type, whose Signedness
operand is 0.

 The types of Operand 1 and Operand 2 both must be the same as Result
Type.

 Results are computed per component.  The resulting value is undefined
if Operand 2 is 0.

### Custom assembly form

integer-scalar-vector-type ::= integer-type | vector< integer-literal x integer-type > umod-op ::= ssa-id = spv.UMod ssa-use, ssa-use : integer-scalar-vector-type

For example:

%4 = spv.UMod %0, %1 : i32 %5 = spv.UMod %2, %3 : vector<4xi32>


#### Operands:

1. `operand1`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4
1. `operand2`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

#### Attributes:


#### Results:

1. `result`: 8/16/32/64-bit integer or vector of 8/16/32/64-bit integer values of length 2/3/4

### spv.undef (spirv::UndefOp)
Make an intermediate object whose value is undefined.

#### Description:


Result Type is the type of object to make.

Each consumption of Result <id> yields an arbitrary, possibly different
bit pattern or abstract value resulting in possibly different concrete,
abstract, or opaque values.

### Custom assembly form

undef-op ::= spv.undef : spirv-type


For example:

%0 = spv.undef : f32 %1 = spv.undef : !spv.struct<!spv.array<4 x vector<4xi32»>


#### Operands:


#### Attributes:


#### Results:

1. `result`: void type or 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float or vector of 1-bit integer or 8/16/32/64-bit integer or 16/32/64-bit float values of length 2/3/4 or any SPIR-V pointer type or any SPIR-V array type or any SPIR-V runtime array type or any SPIR-V struct type

### spv.Unreachable (spirv::UnreachableOp)
Declares that this block is not reachable in the CFG.

#### Description:


This instruction must be the last instruction in a block.

### Custom assembly form

unreachable-op ::= spv.Unreachable


#### Operands:


#### Attributes:


#### Results:


### spv.Variable (spirv::VariableOp)

    Allocate an object in memory, resulting in a pointer to it, which can be
    used with OpLoad and OpStore.
  

#### Description:


Result Type must be an OpTypePointer. Its Type operand is the type of
object in memory.

Storage Class is the Storage Class of the memory holding the object. It
cannot be Generic. It must be the same as the Storage Class operand of
the Result Type.

Initializer is optional.  If Initializer is present, it will be the
initial value of the variable’s memory content. Initializer must be an
<id> from a constant instruction or a global (module scope) OpVariable
instruction. Initializer must have the same type as the type pointed to
by Result Type.

### Custom assembly form

variable-op ::= ssa-id = spv.Variable (init( ssa-use ))? (bind( integer-literal, integer-literal ))? (built_in( string-literal ))? attribute-dict? : spirv-pointer-type


where `init` specifies initializer and `bind` specifies the
descriptor set and binding number. `built_in` specifies SPIR-V
BuiltIn decoration associated with the op.

For example:

%0 = spv.constant …

%1 = spv.Variable : !spv.ptr<f32, Function> %2 = spv.Variable init(%0): !spv.ptr<f32, Private> %3 = spv.Variable init(%0) bind(1, 2): !spv.ptr<f32, Uniform> %3 = spv.Variable built_in(“GlobalInvocationID”) : !spv.ptr<vector<3xi32>, Uniform>


#### Operands:

1. `initializer`: any type

#### Attributes:

| Attribute | MLIR Type | Description |
| :-------: | :-------: | ----------- |
| `storage_class` | `IntegerAttr` | valid SPIR-V StorageClass attribute |

#### Results:

1. `pointer`: any SPIR-V pointer type