MLIR  21.0.0git
XeGPUTargetInfo.h
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1 //===- XeGPUTargetInfo.h - Target constants ---------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef MLIR_DIALECT_XEGPU_IR_XEGPUTARGETINFO_H_
10 #define MLIR_DIALECT_XEGPU_IR_XEGPUTARGETINFO_H_
11 
12 namespace mlir {
13 namespace xegpu {
14 /// HW dependent constants.
15 /// TODO: These constants should be queried from the target information.
16 namespace targetinfo {
17 constexpr unsigned subgroupSize = 16; // How many lanes in a subgroup.
18 /// If DPAS A or B operands have low precision element types they must be packed
19 /// according to the following sizes.
20 constexpr unsigned packedSizeInBitsForDefault =
21  16; // Minimum packing size per register for DPAS A.
22 constexpr unsigned packedSizeInBitsForDpasB =
23  32; // Minimum packing size per register for DPAS B.
25  32; // Minimum packing size per register for Gather and Scatter ops.
26 } // namespace targetinfo
27 } // namespace xegpu
28 } // namespace mlir
29 
30 #endif // MLIR_DIALECT_XEGPU_IR_XEGPUTARGETINFO_H_
constexpr unsigned packedSizeInBitsForDpasB
constexpr unsigned subgroupSize
constexpr unsigned packedSizeInBitsForGatherScatter
constexpr unsigned packedSizeInBitsForDefault
If DPAS A or B operands have low precision element types they must be packed according to the followi...
Include the generated interface declarations.