MLIR 23.0.0git
mlir::gpu::GPUToROCDLPipelineOptions Struct Reference

Options for the gpu to rocdl pipeline. More...

#include "mlir/Dialect/GPU/Pipelines/Passes.h"

Inheritance diagram for mlir::gpu::GPUToROCDLPipelineOptions:

Public Attributes

PassOptions::Option< int64_tindexBitWidth
PassOptions::Option< std::string > triple
PassOptions::Option< std::string > chip
PassOptions::Option< std::string > features
PassOptions::Option< std::string > binaryFormat
PassOptions::Option< std::string > abiVersion
PassOptions::Option< boolwave64
PassOptions::Option< int > optLevel
PassOptions::Option< std::string > cmdOptions
PassOptions::Option< boolkernelUseBarePtrCallConv
PassOptions::Option< boolhostUseBarePtrCallConv

Detailed Description

Options for the gpu to rocdl pipeline.

Definition at line 68 of file Passes.h.

Member Data Documentation

◆ abiVersion

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::abiVersion
Initial value:
{
*this, "abi",
llvm::cl::desc("AMDHSA ABI version (e.g. \"500\", \"600\")."),
llvm::cl::init("600")}

Definition at line 92 of file Passes.h.

◆ binaryFormat

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::binaryFormat
Initial value:
{
*this, "binary-format",
llvm::cl::desc("Final GPU binary emission format (e.g. fatbin, binary, "
"isa, llvm, offloading)."),
llvm::cl::init("fatbin")}

Definition at line 87 of file Passes.h.

◆ chip

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::chip
Initial value:
{
*this, "chip",
llvm::cl::desc(
"AMDGPU target chip (e.g. gfx90a, gfx942, gfx1100). Required: "
"AMDGCN binaries are not forward-compatible across chip families.")}

Definition at line 79 of file Passes.h.

◆ cmdOptions

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::cmdOptions
Initial value:
{
*this, "rocdl-cmd-options",
llvm::cl::desc(
"Command line options to pass to the downstream AMDGPU compiler."),
llvm::cl::init("")}

Definition at line 105 of file Passes.h.

◆ features

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::features
Initial value:
{
*this, "features", llvm::cl::desc("AMDGPU target features."),
llvm::cl::init("")}

Definition at line 84 of file Passes.h.

◆ hostUseBarePtrCallConv

PassOptions::Option<bool> mlir::gpu::GPUToROCDLPipelineOptions::hostUseBarePtrCallConv
Initial value:
{
*this, "host-bare-ptr-calling-convention",
llvm::cl::desc("Use bareptr calling convention for the host."),
llvm::cl::init(false)}

Definition at line 114 of file Passes.h.

◆ indexBitWidth

PassOptions::Option<int64_t> mlir::gpu::GPUToROCDLPipelineOptions::indexBitWidth
Initial value:
{
*this, "index-bitwidth",
llvm::cl::desc("Bitwidth of the index type for the host (warning this "
"should be 64 until the GPU layering is fixed)"),
llvm::cl::init(64)}

Definition at line 70 of file Passes.h.

◆ kernelUseBarePtrCallConv

PassOptions::Option<bool> mlir::gpu::GPUToROCDLPipelineOptions::kernelUseBarePtrCallConv
Initial value:
{
*this, "kernel-bare-ptr-calling-convention",
llvm::cl::desc("Use bareptr calling convention for device kernels."),
llvm::cl::init(false)}

Definition at line 110 of file Passes.h.

◆ optLevel

PassOptions::Option<int> mlir::gpu::GPUToROCDLPipelineOptions::optLevel
Initial value:
{
*this, "opt-level",
llvm::cl::desc("Optimization level for ROCDL/AMDGPU compilation."),
llvm::cl::init(2)}

Definition at line 101 of file Passes.h.

◆ triple

PassOptions::Option<std::string> mlir::gpu::GPUToROCDLPipelineOptions::triple
Initial value:
{
*this, "triple",
llvm::cl::desc("AMDGPU target triple (e.g. amdgcn-amd-amdhsa)."),
llvm::cl::init("amdgcn-amd-amdhsa")}

Definition at line 75 of file Passes.h.

◆ wave64

PassOptions::Option<bool> mlir::gpu::GPUToROCDLPipelineOptions::wave64
Initial value:
{
*this, "wave64",
llvm::cl::desc("Use Wave64 mode (default true; wave32 if false, "
"appropriate for RDNA / gfx10+ where supported)."),
llvm::cl::init(true)}

Definition at line 96 of file Passes.h.


The documentation for this struct was generated from the following file: