MLIR 24.0.0git
ShardingInterfaceImpl.cpp
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1//===- ShardingInterfaceImpl.cpp - Tosa sharding models -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
14#include "mlir/IR/AffineMap.h"
16
17#define DEBUG_TYPE "tosa-sharding-impl"
18#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE << "]: ")
19
20using namespace mlir;
21using namespace mlir::tosa;
22using namespace mlir::shard;
23
24namespace {
25// loop types: [parallel, parallel, parallel, reduction_sum]
26// indexing maps:
27// (d0, d1, d2, d3) -> (d0, d1, d3)
28// (d0, d1, d2, d3) -> (d0, d3, d2)
29// (d0, d1, d2, d3) -> (d0, d1, d2)
30struct MatMulOpSharding
31 : public ShardingInterface::ExternalModel<MatMulOpSharding, MatMulOp> {
32 SmallVector<utils::IteratorType> getLoopIteratorTypes(Operation *op) const {
33 auto tensorType = dyn_cast<RankedTensorType>(op->getResult(0).getType());
34 if (!tensorType)
35 return {};
36
37 SmallVector<utils::IteratorType> types(tensorType.getRank() + 1,
38 utils::IteratorType::parallel);
39 types[tensorType.getRank()] = utils::IteratorType::reduction;
40 return types;
41 }
42
44 getReductionLoopIteratorKinds(Operation *op) const {
45 return SmallVector<ReductionKind>(1, ReductionKind::Sum);
46 }
47
48 SmallVector<AffineMap> getIndexingMaps(Operation *op) const {
49 auto tensorType = dyn_cast<RankedTensorType>(op->getResult(0).getType());
50 if (!tensorType)
51 return {};
52 MLIRContext *ctx = op->getContext();
54 maps.push_back(AffineMap::getMultiDimMapWithTargets(4, {0, 1, 3}, ctx));
55 maps.push_back(AffineMap::getMultiDimMapWithTargets(4, {0, 3, 2}, ctx));
56 maps.push_back(AffineMap::get(0, 0, {}, ctx));
57 maps.push_back(AffineMap::get(0, 0, {}, ctx));
58 maps.push_back(AffineMap::getMultiDimMapWithTargets(4, {0, 1, 2}, ctx));
59 return maps;
60 }
61};
62
63struct NegateOpSharding
64 : public ShardingInterface::ExternalModel<NegateOpSharding, NegateOp> {
65 SmallVector<utils::IteratorType> getLoopIteratorTypes(Operation *op) const {
66 Value val = op->getOperand(0);
67 auto type = dyn_cast<RankedTensorType>(val.getType());
68 if (!type)
69 return {};
70 SmallVector<utils::IteratorType> types(type.getRank(),
71 utils::IteratorType::parallel);
72 return types;
73 }
74
75 SmallVector<AffineMap> getIndexingMaps(Operation *op) const {
76 MLIRContext *ctx = op->getContext();
77 Value val = op->getOperand(0);
78 auto type = dyn_cast<RankedTensorType>(val.getType());
79 if (!type)
80 return {};
81 int64_t rank = type.getRank();
84 AffineMap::get(0, 0, {}, ctx), AffineMap::get(0, 0, {}, ctx),
86 return maps;
87 }
88
89 LogicalResult partition(Operation *op, ArrayRef<Value> partitiondOperands,
90 ArrayRef<Sharding> operandShardings,
91 ArrayRef<Sharding> resultShardings,
92 IRMapping &partitionMap,
93 SymbolTableCollection &symbolTable,
94 OpBuilder &builder) const {
95 partitionTriviallyShardableOperation(*op, partitiondOperands,
96 operandShardings, resultShardings,
97 partitionMap, symbolTable, builder);
98 return success();
99 }
100};
101
102template <typename OpType>
103static void registerElemwiseOne(MLIRContext *ctx) {
104 OpType::template attachInterface<ElementwiseShardingInterface<OpType>>(*ctx);
105}
106
107/// Variadic helper function.
108template <typename... OpTypes>
109static void registerElemwiseAll(MLIRContext *ctx) {
110 (registerElemwiseOne<OpTypes>(ctx), ...);
111}
112} // namespace
113
115 DialectRegistry &registry) {
116
117 registry.addExtension(+[](MLIRContext *ctx, TosaDialect *dialect) {
118 registerElemwiseAll<
119 ClampOp, SigmoidOp, TanhOp, AddOp, ArithmeticRightShiftOp, BitwiseAndOp,
120 BitwiseOrOp, BitwiseXorOp, IntDivOp, LogicalAndOp, LogicalLeftShiftOp,
121 LogicalRightShiftOp, LogicalOrOp, LogicalXorOp, MaximumOp, MinimumOp,
122 MulOp, PowOp, SubOp, AbsOp, BitwiseNotOp, CeilOp, ClzOp, ExpOp, FloorOp,
123 LogOp, LogicalNotOp, ReciprocalOp, RsqrtOp, SelectOp, EqualOp,
124 GreaterOp, GreaterEqualOp>(ctx);
125
126 MatMulOp::attachInterface<MatMulOpSharding>(*ctx);
127 NegateOp::attachInterface<NegateOpSharding>(*ctx);
128 });
129}
return success()
static AffineMap getMultiDimIdentityMap(unsigned numDims, MLIRContext *context)
Returns an AffineMap with 'numDims' identity result dim exprs.
static AffineMap get(MLIRContext *context)
Returns a zero result affine map with no dimensions or symbols: () -> ().
static AffineMap getMultiDimMapWithTargets(unsigned numDims, ArrayRef< unsigned > targets, MLIRContext *context)
Returns an affine map with numDims input dimensions and results specified by targets.
The DialectRegistry maps a dialect namespace to a constructor for the matching dialect.
bool addExtension(TypeID extensionID, std::unique_ptr< DialectExtensionBase > extension)
Add the given extension to the registry.
This is a utility class for mapping one set of IR entities to another.
Definition IRMapping.h:26
MLIRContext is the top-level object for a collection of MLIR operations.
Definition MLIRContext.h:71
This class helps build Operations.
Definition Builders.h:210
Operation is the basic unit of execution within MLIR.
Definition Operation.h:87
Value getOperand(unsigned idx)
Definition Operation.h:377
OpResult getResult(unsigned idx)
Get the 'idx'th result of this operation.
Definition Operation.h:434
MLIRContext * getContext()
Return the context this operation is associated with.
Definition Operation.h:233
This class represents a collection of SymbolTables.
This class represents an instance of an SSA value in the MLIR system, representing a computable value...
Definition Value.h:96
Type getType() const
Return the type of this value.
Definition Value.h:105
void partitionTriviallyShardableOperation(Operation &op, ArrayRef< Value > partitionedOperands, ArrayRef< Sharding > operandShardings, ArrayRef< Sharding > resultShardings, IRMapping &partitionMap, SymbolTableCollection &symbolTable, OpBuilder &builder)
void registerShardingInterfaceExternalModels(DialectRegistry &registry)
Include the generated interface declarations.