17 #define GEN_PASS_DEF_CONVERTVECTORTOARMSME
18 #include "mlir/Conversion/Passes.h.inc"
25 struct ConvertVectorToArmSMEPass
26 :
public impl::ConvertVectorToArmSMEBase<ConvertVectorToArmSMEPass> {
28 void runOnOperation()
override;
32 void ConvertVectorToArmSMEPass::runOnOperation() {
40 return std::make_unique<ConvertVectorToArmSMEPass>();
static MLIRContext * getContext(OpFoldResult val)
Include the generated interface declarations.
std::unique_ptr< Pass > createConvertVectorToArmSMEPass()
Create a pass to lower operations from the vector dialect to Arm SME.
LogicalResult applyPatternsGreedily(Region ®ion, const FrozenRewritePatternSet &patterns, GreedyRewriteConfig config=GreedyRewriteConfig(), bool *changed=nullptr)
Rewrite ops in the given region, which must be isolated from above, by repeatedly applying the highes...
const FrozenRewritePatternSet & patterns
void populateVectorToArmSMEPatterns(RewritePatternSet &patterns, MLIRContext &ctx)
Collect a set of patterns to lower Vector ops to ArmSME ops that map to LLVM intrinsics.