MLIR  20.0.0git
VectorToArmSMEPass.cpp
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1 //===- VectorToArmSMEPass.cpp - Conversion from Vector to the ArmSME dialect =//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
10 
13 #include "mlir/Pass/Pass.h"
15 
16 namespace mlir {
17 #define GEN_PASS_DEF_CONVERTVECTORTOARMSME
18 #include "mlir/Conversion/Passes.h.inc"
19 } // namespace mlir
20 
21 using namespace mlir;
22 using namespace mlir::vector;
23 
24 namespace {
25 struct ConvertVectorToArmSMEPass
26  : public impl::ConvertVectorToArmSMEBase<ConvertVectorToArmSMEPass> {
27 
28  void runOnOperation() override;
29 };
30 } // namespace
31 
32 void ConvertVectorToArmSMEPass::runOnOperation() {
35 
36  (void)applyPatternsGreedily(getOperation(), std::move(patterns));
37 }
38 
39 std::unique_ptr<Pass> mlir::createConvertVectorToArmSMEPass() {
40  return std::make_unique<ConvertVectorToArmSMEPass>();
41 }
static MLIRContext * getContext(OpFoldResult val)
Include the generated interface declarations.
std::unique_ptr< Pass > createConvertVectorToArmSMEPass()
Create a pass to lower operations from the vector dialect to Arm SME.
LogicalResult applyPatternsGreedily(Region &region, const FrozenRewritePatternSet &patterns, GreedyRewriteConfig config=GreedyRewriteConfig(), bool *changed=nullptr)
Rewrite ops in the given region, which must be isolated from above, by repeatedly applying the highes...
const FrozenRewritePatternSet & patterns
void populateVectorToArmSMEPatterns(RewritePatternSet &patterns, MLIRContext &ctx)
Collect a set of patterns to lower Vector ops to ArmSME ops that map to LLVM intrinsics.