MLIR  17.0.0git
LegalizeForLLVMExport.cpp
Go to the documentation of this file.
1 //===- LegalizeForLLVMExport.cpp - Prepare ArmSVE for LLVM translation ----===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
15 #include "mlir/IR/BuiltinOps.h"
16 #include "mlir/IR/PatternMatch.h"
17 
18 using namespace mlir;
19 using namespace mlir::arm_sve;
20 
21 template <typename OpTy>
22 class ForwardOperands : public OpConversionPattern<OpTy> {
24 
26  matchAndRewrite(OpTy op, typename OpTy::Adaptor adaptor,
27  ConversionPatternRewriter &rewriter) const final {
28  if (adaptor.getOperands().getTypes() == op->getOperands().getTypes())
29  return rewriter.notifyMatchFailure(op, "operand types already match");
30 
31  rewriter.updateRootInPlace(
32  op, [&]() { op->setOperands(adaptor.getOperands()); });
33  return success();
34  }
35 };
36 
42  OneToOneConvertToLLVMPattern<ScalableMaskedAddIOp,
43  ScalableMaskedAddIIntrOp>;
45  OneToOneConvertToLLVMPattern<ScalableMaskedAddFOp,
46  ScalableMaskedAddFIntrOp>;
48  OneToOneConvertToLLVMPattern<ScalableMaskedSubIOp,
49  ScalableMaskedSubIIntrOp>;
51  OneToOneConvertToLLVMPattern<ScalableMaskedSubFOp,
52  ScalableMaskedSubFIntrOp>;
54  OneToOneConvertToLLVMPattern<ScalableMaskedMulIOp,
55  ScalableMaskedMulIIntrOp>;
57  OneToOneConvertToLLVMPattern<ScalableMaskedMulFOp,
58  ScalableMaskedMulFIntrOp>;
60  OneToOneConvertToLLVMPattern<ScalableMaskedSDivIOp,
61  ScalableMaskedSDivIIntrOp>;
63  OneToOneConvertToLLVMPattern<ScalableMaskedUDivIOp,
64  ScalableMaskedUDivIIntrOp>;
66  OneToOneConvertToLLVMPattern<ScalableMaskedDivFOp,
67  ScalableMaskedDivFIntrOp>;
68 
69 /// Populate the given list with patterns that convert from ArmSVE to LLVM.
71  LLVMTypeConverter &converter, RewritePatternSet &patterns) {
72  // Populate conversion patterns
73 
74  // clang-format off
78  &converter.getContext());
79  patterns.add<SdotOpLowering,
91  ScalableMaskedDivFOpLowering>(converter);
92  // clang-format on
93 }
94 
96  LLVMConversionTarget &target) {
97  // clang-format off
98  target.addLegalOp<SdotIntrOp,
99  SmmlaIntrOp,
100  UdotIntrOp,
101  UmmlaIntrOp,
102  ScalableMaskedAddIIntrOp,
103  ScalableMaskedAddFIntrOp,
104  ScalableMaskedSubIIntrOp,
105  ScalableMaskedSubFIntrOp,
106  ScalableMaskedMulIIntrOp,
107  ScalableMaskedMulFIntrOp,
108  ScalableMaskedSDivIIntrOp,
109  ScalableMaskedUDivIIntrOp,
110  ScalableMaskedDivFIntrOp>();
111  target.addIllegalOp<SdotOp,
112  SmmlaOp,
113  UdotOp,
114  UmmlaOp,
115  ScalableMaskedAddIOp,
116  ScalableMaskedAddFOp,
117  ScalableMaskedSubIOp,
118  ScalableMaskedSubFOp,
119  ScalableMaskedMulIOp,
120  ScalableMaskedMulFOp,
121  ScalableMaskedSDivIOp,
122  ScalableMaskedUDivIOp,
123  ScalableMaskedDivFOp>();
124  // clang-format on
125 }
OneToOneConvertToLLVMPattern< UmmlaOp, UmmlaIntrOp > UmmlaOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedSubIOp, ScalableMaskedSubIIntrOp > ScalableMaskedSubIOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedSDivIOp, ScalableMaskedSDivIIntrOp > ScalableMaskedSDivIOpLowering
OneToOneConvertToLLVMPattern< SdotOp, SdotIntrOp > SdotOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedAddIOp, ScalableMaskedAddIIntrOp > ScalableMaskedAddIOpLowering
OneToOneConvertToLLVMPattern< SmmlaOp, SmmlaIntrOp > SmmlaOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedSubFOp, ScalableMaskedSubFIntrOp > ScalableMaskedSubFOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedUDivIOp, ScalableMaskedUDivIIntrOp > ScalableMaskedUDivIOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedMulFOp, ScalableMaskedMulFIntrOp > ScalableMaskedMulFOpLowering
OneToOneConvertToLLVMPattern< UdotOp, UdotIntrOp > UdotOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedAddFOp, ScalableMaskedAddFIntrOp > ScalableMaskedAddFOpLowering
OneToOneConvertToLLVMPattern< ScalableMaskedMulIOp, ScalableMaskedMulIIntrOp > ScalableMaskedMulIOpLowering
This class implements a pattern rewriter for use with ConversionPatterns.
LogicalResult notifyMatchFailure(Location loc, function_ref< void(Diagnostic &)> reasonCallback) override
PatternRewriter hook for notifying match failure reasons.
void addLegalOp(OperationName op)
Register the given operations as legal.
void addIllegalOp(OperationName op)
Register the given operation as illegal, i.e.
Derived class that automatically populates legalization information for different LLVM ops.
Conversion from types to the LLVM IR dialect.
Definition: TypeConverter.h:33
MLIRContext & getContext()
Returns the MLIR context.
Generic implementation of one-to-one conversion from "SourceOp" to "TargetOp" where the latter belong...
Definition: Pattern.h:210
OpConversionPattern is a wrapper around ConversionPattern that allows for matching and rewriting agai...
type_range getTypes() const
Definition: ValueRange.cpp:26
operand_range getOperands()
Returns an iterator on the underlying Value's.
Definition: Operation.h:373
void setOperands(ValueRange operands)
Replace the current operands of this operation with the ones provided in 'operands'.
Definition: Operation.cpp:235
RewritePatternSet & add(ConstructorArg &&arg, ConstructorArgs &&...args)
Add an instance of each of the pattern types 'Ts' to the pattern list with the given arguments.
void updateRootInPlace(Operation *root, CallableT &&callable)
This method is a utility wrapper around a root update of an operation.
Definition: PatternMatch.h:581
This header declares functions that assit transformations in the MemRef dialect.
void configureArmSVELegalizeForExportTarget(LLVMConversionTarget &target)
Configure the target to support lowering ArmSVE ops to ops that map to LLVM intrinsics.
LogicalResult success(bool isSuccess=true)
Utility function to generate a LogicalResult.
Definition: LogicalResult.h:56
void populateArmSVELegalizeForLLVMExportPatterns(LLVMTypeConverter &converter, RewritePatternSet &patterns)
Collect a set of patterns to lower ArmSVE ops to ops that map to LLVM intrinsics.
This class represents an efficient way to signal success or failure.
Definition: LogicalResult.h:26