MLIR 23.0.0git
SCFToGPU.cpp
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1//===- SCFToGPU.cpp - Convert an affine loop nest to a GPU kernel ---------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements a straightforward conversion of an loop nest into a GPU
10// kernel. The caller is expected to guarantee that the conversion is correct
11// or to further transform the kernel to ensure correctness.
12//
13//===----------------------------------------------------------------------===//
14
16
25#include "mlir/IR/AffineExpr.h"
26#include "mlir/IR/Builders.h"
27#include "mlir/IR/IRMapping.h"
31#include "llvm/ADT/DenseSet.h"
32#include "llvm/Support/DebugLog.h"
33#include <optional>
34
35#define DEBUG_TYPE "loops-to-gpu"
36
37using namespace mlir;
38using namespace mlir::affine;
39using namespace mlir::scf;
40
41// Name of internal attribute to mark visited operations during conversion.
42//
43// NOTE: The conversion originally used the following legality criteria:
44// `!parallelOp->hasAttr(gpu::getMappingAttrName())`
45// But the provided pattern might reject some cases based on more detailed
46// analysis of the `mapping` attribute.
47// To avoid dialect conversion failure due to non-converted illegal operation
48// we use this extra Unit attribute as a marker, that the operation was checked
49// by the pattern and is should be considered as legal in the following legality
50// checks. The `finalizeParallelLoopToGPUConversion` function performs clean up
51// of this extra attributes ans is supposed to be called after the dialect
52// conversion.
53//
54// TODO: Implement a cleaner solution, factoring out the "matching" logic
55// from the pattern and its callees into a separate function that can be called
56// from both the pattern and the op legality check.
57static constexpr StringLiteral kVisitedAttrName = "SCFToGPU_visited";
58
59// Extract an indexed value from KernelDim3.
60static Value getDim3Value(const gpu::KernelDim3 &dim3, unsigned pos) {
61 switch (pos) {
62 case 0:
63 return dim3.x;
64 case 1:
65 return dim3.y;
66 case 2:
67 return dim3.z;
68 default:
69 llvm_unreachable("dim3 position out of bounds");
70 }
71 return nullptr;
72}
73
74// Get the lower bound-related operands of a loop operation.
76 return forOp.getLowerBoundOperands();
77}
78
79// Get the upper bound-related operands of a loop operation.
81 return forOp.getUpperBoundOperands();
82}
83
84// Get a Value that corresponds to the loop step. If the step is an attribute,
85// materialize a corresponding constant using builder.
86static Value getOrCreateStep(AffineForOp forOp, OpBuilder &builder) {
87 return arith::ConstantIndexOp::create(builder, forOp.getLoc(),
88 forOp.getStepAsInt());
89}
90
91// Get a Value for the loop lower bound. If the value requires computation,
92// materialize the instructions using builder.
93static Value getOrEmitLowerBound(AffineForOp forOp, OpBuilder &builder) {
94 return lowerAffineLowerBound(forOp, builder);
95}
96
97// Get a Value for the loop upper bound. If the value requires computation,
98// materialize the instructions using builder.
99static Value getOrEmitUpperBound(AffineForOp forOp, OpBuilder &builder) {
100 return lowerAffineUpperBound(forOp, builder);
101}
102
103// Check the structure of the loop nest:
104// - there are enough loops to map to numDims;
105// - the loops are perfectly nested;
106// - the loop bounds can be computed above the outermost loop.
107// This roughly corresponds to the "matcher" part of the pattern-based
108// rewriting infrastructure.
109static LogicalResult checkAffineLoopNestMappableImpl(AffineForOp forOp,
110 unsigned numDims) {
111 Region &limit = forOp.getRegion();
112 for (unsigned i = 0, e = numDims; i < e; ++i) {
113 Operation *nested = &forOp.getBody()->front();
114 if (!areValuesDefinedAbove(getLowerBoundOperands(forOp), limit) ||
116 return forOp.emitError(
117 "loops with bounds depending on other mapped loops "
118 "are not supported");
119
120 // The innermost loop can have an arbitrary body, skip the perfect nesting
121 // check for it.
122 if (i == e - 1)
123 break;
124
125 auto begin = forOp.getBody()->begin(), end = forOp.getBody()->end();
126 if (forOp.getBody()->empty() || std::next(begin, 2) != end)
127 return forOp.emitError("expected perfectly nested loops in the body");
128
129 if (!(forOp = dyn_cast<AffineForOp>(nested)))
130 return nested->emitError("expected a nested loop");
131 }
132 return success();
133}
134
135static LogicalResult checkAffineLoopNestMappable(AffineForOp forOp,
136 unsigned numBlockDims,
137 unsigned numThreadDims) {
138 if (numBlockDims < 1 || numThreadDims < 1) {
139 LDBG() << "nothing to map";
140 return success();
141 }
142
143 if (numBlockDims > 3) {
144 return forOp.emitError("cannot map to more than 3 block dimensions");
145 }
146 if (numThreadDims > 3) {
147 return forOp.emitError("cannot map to more than 3 thread dimensions");
148 }
149 return checkAffineLoopNestMappableImpl(forOp, numBlockDims + numThreadDims);
150}
151
152namespace {
153// Helper structure that holds common state of the loop to GPU kernel
154// conversion.
155struct AffineLoopToGpuConverter {
156 std::optional<AffineForOp> collectBounds(AffineForOp forOp,
157 unsigned numLoops);
158
159 void createLaunch(AffineForOp rootForOp, AffineForOp innermostForOp,
160 unsigned numBlockDims, unsigned numThreadDims);
161
162 // Ranges of the loops mapped to blocks or threads.
163 SmallVector<Value, 6> dims;
164 // Lower bounds of the loops mapped to blocks or threads.
165 SmallVector<Value, 6> lbs;
166 // Induction variables of the loops mapped to blocks or threads.
167 SmallVector<Value, 6> ivs;
168 // Steps of the loops mapped to blocks or threads.
169 SmallVector<Value, 6> steps;
170};
171} // namespace
172
173// Collect ranges, bounds, steps and induction variables in preparation for
174// mapping a loop nest of depth "numLoops" rooted at "forOp" to a GPU kernel.
175// This may fail if the IR for computing loop bounds cannot be constructed, for
176// example if an affine loop uses semi-affine maps. Return the last loop to be
177// mapped on success, std::nullopt on failure.
178std::optional<AffineForOp>
179AffineLoopToGpuConverter::collectBounds(AffineForOp forOp, unsigned numLoops) {
180 OpBuilder builder(forOp.getOperation());
181 dims.reserve(numLoops);
182 lbs.reserve(numLoops);
183 ivs.reserve(numLoops);
184 steps.reserve(numLoops);
185 AffineForOp currentLoop = forOp;
186 for (unsigned i = 0; i < numLoops; ++i) {
187 if (currentLoop.getNumIterOperands() > 0) {
188 currentLoop.emitError(
189 "affine loop with iter_args cannot be converted to GPU kernel");
190 return std::nullopt;
191 }
192
193 Value lowerBound = getOrEmitLowerBound(currentLoop, builder);
194 Value upperBound = getOrEmitUpperBound(currentLoop, builder);
195 if (!lowerBound || !upperBound) {
196 return std::nullopt;
197 }
198
199 Value range = arith::SubIOp::create(builder, currentLoop.getLoc(),
200 upperBound, lowerBound);
201 Value step = getOrCreateStep(currentLoop, builder);
202 if (getConstantIntValue(step) != static_cast<int64_t>(1))
203 range = arith::CeilDivSIOp::create(builder, currentLoop.getLoc(), range,
204 step);
205 dims.push_back(range);
206
207 lbs.push_back(lowerBound);
208 ivs.push_back(currentLoop.getInductionVar());
209 steps.push_back(step);
210
211 if (i != numLoops - 1)
212 currentLoop = cast<AffineForOp>(&currentLoop.getBody()->front());
213 }
214 return currentLoop;
215}
216
217// Replace the rooted at "rootForOp" with a GPU launch operation. This expects
218// "innermostForOp" to point to the last loop to be transformed to the kernel,
219// and to have (numBlockDims + numThreadDims) perfectly nested loops between
220// "rootForOp" and "innermostForOp".
221void AffineLoopToGpuConverter::createLaunch(AffineForOp rootForOp,
222 AffineForOp innermostForOp,
223 unsigned numBlockDims,
224 unsigned numThreadDims) {
225 OpBuilder builder(rootForOp.getOperation());
226 // Prepare the grid and block sizes for the launch operation. If there is
227 // no loop mapped to a specific dimension, use constant "1" as its size.
228 Value constOne =
229 (numBlockDims < 3 || numThreadDims < 3)
230 ? arith::ConstantIndexOp::create(builder, rootForOp.getLoc(), 1)
231 : nullptr;
232 Value gridSizeX = numBlockDims > 0 ? dims[0] : constOne;
233 Value gridSizeY = numBlockDims > 1 ? dims[1] : constOne;
234 Value gridSizeZ = numBlockDims > 2 ? dims[2] : constOne;
235 Value blockSizeX = numThreadDims > 0 ? dims[numBlockDims] : constOne;
236 Value blockSizeY = numThreadDims > 1 ? dims[numBlockDims + 1] : constOne;
237 Value blockSizeZ = numThreadDims > 2 ? dims[numBlockDims + 2] : constOne;
238
239 // Create a launch op and move the body region of the innermost loop to the
240 // launch op.
241 auto launchOp =
242 gpu::LaunchOp::create(builder, rootForOp.getLoc(), gridSizeX, gridSizeY,
243 gridSizeZ, blockSizeX, blockSizeY, blockSizeZ);
244
245 // Replace the loop terminator (loops contain only a single block) with the
246 // gpu terminator and move the operations from the loop body block to the gpu
247 // launch body block. Do not move the entire block because of the difference
248 // in block arguments.
249 Operation &terminator = innermostForOp.getBody()->back();
250 Location terminatorLoc = terminator.getLoc();
251 terminator.erase();
252 builder.setInsertionPointToEnd(innermostForOp.getBody());
253 gpu::TerminatorOp::create(builder, terminatorLoc, TypeRange());
254 launchOp.getBody().front().getOperations().splice(
255 launchOp.getBody().front().begin(),
256 innermostForOp.getBody()->getOperations());
257
258 // Remap the loop iterators to use block/thread identifiers instead. Loops
259 // may iterate from LB with step S whereas GPU thread/block ids always iterate
260 // from 0 to N with step 1. Therefore, loop induction variables are replaced
261 // with (gpu-thread/block-id * S) + LB.
262 builder.setInsertionPointToStart(&launchOp.getBody().front());
263 auto *lbArgumentIt = lbs.begin();
264 auto *stepArgumentIt = steps.begin();
265 for (const auto &en : llvm::enumerate(ivs)) {
266 Value id =
267 en.index() < numBlockDims
268 ? getDim3Value(launchOp.getBlockIds(), en.index())
269 : getDim3Value(launchOp.getThreadIds(), en.index() - numBlockDims);
270 Value step = steps[en.index()];
271 if (getConstantIntValue(step) != static_cast<int64_t>(1))
272 id = arith::MulIOp::create(builder, rootForOp.getLoc(), step, id);
273
274 Value ivReplacement =
275 arith::AddIOp::create(builder, rootForOp.getLoc(), *lbArgumentIt, id);
276 en.value().replaceAllUsesWith(ivReplacement);
277 std::advance(lbArgumentIt, 1);
278 std::advance(stepArgumentIt, 1);
279 }
280
281 // We are done and can erase the original outermost loop.
282 rootForOp.erase();
283}
284
285// Generic loop to GPU kernel conversion function.
286static LogicalResult convertAffineLoopNestToGPULaunch(AffineForOp forOp,
287 unsigned numBlockDims,
288 unsigned numThreadDims) {
289 if (failed(checkAffineLoopNestMappable(forOp, numBlockDims, numThreadDims)))
290 return failure();
291
292 AffineLoopToGpuConverter converter;
293 auto maybeInnerLoop =
294 converter.collectBounds(forOp, numBlockDims + numThreadDims);
295 if (!maybeInnerLoop)
296 return failure();
297 converter.createLaunch(forOp, *maybeInnerLoop, numBlockDims, numThreadDims);
298
299 return success();
300}
301
302LogicalResult mlir::convertAffineLoopNestToGPULaunch(AffineForOp forOp,
303 unsigned numBlockDims,
304 unsigned numThreadDims) {
305 return ::convertAffineLoopNestToGPULaunch(forOp, numBlockDims, numThreadDims);
306}
307
308namespace {
309struct ParallelToGpuLaunchLowering : public OpRewritePattern<ParallelOp> {
310 using OpRewritePattern<ParallelOp>::OpRewritePattern;
311
312 LogicalResult matchAndRewrite(ParallelOp parallelOp,
313 PatternRewriter &rewriter) const override;
314};
315} // namespace
316
317/// Tries to derive a static upper bound from the defining operation of
318/// `upperBound`.
320 PatternRewriter &rewriter) {
321 if (auto op = upperBound.getDefiningOp<arith::ConstantIndexOp>()) {
322 return op;
323 }
324
325 if (auto minOp = upperBound.getDefiningOp<AffineMinOp>()) {
326 for (const AffineExpr &result : minOp.getMap().getResults()) {
327 if (auto constExpr = dyn_cast<AffineConstantExpr>(result)) {
328 return arith::ConstantIndexOp::create(rewriter, minOp.getLoc(),
329 constExpr.getValue());
330 }
331 }
332 }
333
334 if (auto minOp = upperBound.getDefiningOp<arith::MinSIOp>()) {
335 for (Value operand : {minOp.getLhs(), minOp.getRhs()}) {
336 if (auto staticBound = deriveStaticUpperBound(operand, rewriter))
337 return staticBound;
338 }
339 }
340
341 if (auto multiplyOp = upperBound.getDefiningOp<arith::MulIOp>()) {
342 if (auto lhs = deriveStaticUpperBound(multiplyOp.getOperand(0), rewriter)
344 if (auto rhs = deriveStaticUpperBound(multiplyOp.getOperand(1), rewriter)
346 // Assumptions about the upper bound of minimum computations no longer
347 // work if multiplied by mixed signs, so abort in this case.
348 if ((lhs.value() < 0) != (rhs.value() < 0))
349 return {};
350
351 return arith::ConstantIndexOp::create(rewriter, multiplyOp.getLoc(),
352 lhs.value() * rhs.value());
353 }
354 }
355
356 return {};
357}
358
359static bool isMappedToProcessor(gpu::Processor processor) {
360 return processor != gpu::Processor::Sequential;
361}
362
363static unsigned getLaunchOpArgumentNum(gpu::Processor processor) {
364 switch (processor) {
365 case gpu::Processor::BlockX:
366 return 0;
367 case gpu::Processor::BlockY:
368 return 1;
369 case gpu::Processor::BlockZ:
370 return 2;
371 case gpu::Processor::ThreadX:
372 return 3;
373 case gpu::Processor::ThreadY:
374 return 4;
375 case gpu::Processor::ThreadZ:
376 return 5;
377 default:;
378 }
379 llvm_unreachable(
380 "invalid processor type while retrieving launch op argument number");
381}
382
383/// Modifies the current transformation state to capture the effect of the given
384/// `scf.parallel` operation on index substitutions and the operations to be
385/// inserted.
386/// Specifically, if a dimension of a parallel loop is mapped to a hardware id,
387/// this function will
388/// - compute the loop index based on the hardware id and affine map from the
389/// mapping and update `cloningMap` to substitute all uses.
390/// - derive a new upper bound for the hardware id and augment the provided
391/// `gpu.launch operation` accordingly.
392/// - if the upper bound is imprecise, insert a conditional in the `gpu.launch`
393/// and update the rewriter to insert into the conditional's body.
394/// If the dimension is mapped to sequential,
395/// - insert a for loop into the body and update the rewriter to insert into
396/// the for loop's body.
397/// - update the `cloningMap` to replace uses of the index with the index of
398/// the new for loop.
399/// In either case,
400/// - append the instructions from the loops body to worklist, in reverse order.
401/// To note the end of the current scope in case a loop or conditional was
402/// inserted, a sentinel (the `gpu.launch` operation) is inserted into the
403/// worklist. This signals the processor of the worklist to pop the rewriter
404/// one scope-level up.
405static LogicalResult processParallelLoop(
406 ParallelOp parallelOp, gpu::LaunchOp launchOp, IRMapping &cloningMap,
409 // TODO: Verify that this is a valid GPU mapping.
410 // processor ids: 0-2 block [x/y/z], 3-5 -> thread [x/y/z], 6-> sequential
411 ArrayAttr mapping =
412 parallelOp->getAttrOfType<ArrayAttr>(gpu::getMappingAttrName());
413
414 // TODO: Support multiple reductions.
415 if (!mapping || parallelOp.getNumResults() > 1)
416 return failure();
417
418 Location loc = parallelOp.getLoc();
419
420 auto launchIndependent = [&launchOp](Value val) {
421 return val.getParentRegion()->isAncestor(launchOp->getParentRegion());
422 };
423
424 auto ensureLaunchIndependent = [&rewriter,
425 launchIndependent](Value val) -> Value {
426 if (launchIndependent(val))
427 return val;
428 if (std::optional<int64_t> constOp = getConstantIntValue(val))
429 return arith::ConstantIndexOp::create(rewriter, val.getLoc(),
430 constOp.value());
431 return {};
432 };
433
434 for (auto config : llvm::zip(
435 mapping, parallelOp.getInductionVars(), parallelOp.getLowerBound(),
436 parallelOp.getUpperBound(), parallelOp.getStep())) {
437 Attribute mappingAttribute;
438 Value iv, lowerBound, upperBound, step;
439 std::tie(mappingAttribute, iv, lowerBound, upperBound, step) = config;
440 auto annotation =
441 dyn_cast<gpu::ParallelLoopDimMappingAttr>(mappingAttribute);
442 if (!annotation)
443 return parallelOp.emitOpError()
444 << "expected mapping attribute for lowering to GPU";
445 Value newIndex;
446 gpu::Processor processor = annotation.getProcessor();
447
448 if (isMappedToProcessor(processor)) {
449 // Use the corresponding thread/grid index as replacement for the loop iv.
450 Value operand =
451 launchOp.getBody().getArgument(getLaunchOpArgumentNum(processor));
452 // Take the indexmap and add the lower bound and step computations in.
453 // This computes operand * step + lowerBound.
454 // Use an affine map here so that it composes nicely with the provided
455 // annotation.
456 AffineMap lowerAndStep = AffineMap::get(
457 1, 2,
458 rewriter.getAffineDimExpr(0) * rewriter.getAffineSymbolExpr(0) +
459 rewriter.getAffineSymbolExpr(1));
460 // Map through cloningMap first so we use values valid at the launch
461 // scope, then ensure they are launch-independent (or cloned constants).
462 Value mappedStep = cloningMap.lookupOrDefault(step);
463 Value mappedLowerBound = cloningMap.lookupOrDefault(lowerBound);
464
465 mappedStep = ensureLaunchIndependent(mappedStep);
466 mappedLowerBound = ensureLaunchIndependent(mappedLowerBound);
467
468 // If either cannot be made available above the launch, fail gracefully.
469 if (!mappedStep || !mappedLowerBound) {
470 return rewriter.notifyMatchFailure(
471 parallelOp, "lower bound / step must be constant or defined above "
472 "the gpu.launch");
473 }
474
475 newIndex = AffineApplyOp::create(
476 rewriter, loc, annotation.getMap().compose(lowerAndStep),
477 ValueRange{operand, mappedStep, mappedLowerBound});
478 // If there was also a bound, insert that, too.
479 // TODO: Check that we do not assign bounds twice.
480 if (annotation.getBound()) {
481 // We pass as the single operand to the bound-map the number of
482 // iterations, which is (upperBound - lowerBound) ceilDiv step. To
483 // support inner loops with dynamic upper bounds (as generated by e.g.
484 // tiling), try to derive a max for the bounds. If the used bound for
485 // the hardware id is imprecise, wrap the contained code into a
486 // conditional. If the lower-bound is constant or defined before the
487 // launch, we can use it in the launch bounds. Otherwise fail.
488 if (!launchIndependent(lowerBound) &&
489 !getConstantIntValue(lowerBound).has_value())
490 return failure();
491 // The step must also be constant or defined outside of the loop nest.
492 if (!launchIndependent(step) && !getConstantIntValue(step).has_value())
493 return failure();
494 // If the upper-bound is constant or defined before the launch, we can
495 // use it in the launch bounds directly. Otherwise try derive a bound.
496 bool boundIsPrecise = launchIndependent(upperBound) ||
497 getConstantIntValue(upperBound).has_value();
498 {
499 PatternRewriter::InsertionGuard guard(rewriter);
500 rewriter.setInsertionPoint(launchOp);
501 if (!boundIsPrecise) {
502 upperBound = deriveStaticUpperBound(upperBound, rewriter);
503 if (!upperBound) {
504 return rewriter.notifyMatchFailure(
505 parallelOp,
506 "cannot derive loop-invariant upper bound for number of"
507 "iterations");
508 }
509 }
510 // Compute the number of iterations needed. We compute this as an
511 // affine expression ceilDiv (upperBound - lowerBound) step. We use
512 // affine.apply here so that it composes nicely with the provided map.
513 AffineMap stepMap = AffineMap::get(
514 1, 2,
515 ((rewriter.getAffineDimExpr(0) - rewriter.getAffineSymbolExpr(0))
516 .ceilDiv(rewriter.getAffineSymbolExpr(1))));
517 Value launchBound = AffineApplyOp::create(
518 rewriter, loc, annotation.getBound().compose(stepMap),
520 ensureLaunchIndependent(
521 cloningMap.lookupOrDefault(upperBound)),
522 ensureLaunchIndependent(
523 cloningMap.lookupOrDefault(lowerBound)),
524 ensureLaunchIndependent(cloningMap.lookupOrDefault(step))});
525 // todo(herhut,ravishankarm): Update the behavior of setMappingAttr
526 // when this condition is relaxed.
527 if (!bounds.try_emplace(processor, launchBound).second) {
528 return rewriter.notifyMatchFailure(
529 parallelOp, "cannot redefine the bound for processor " +
530 Twine(static_cast<int64_t>(processor)));
531 }
532 }
533 if (!boundIsPrecise) {
534 // We are using an approximation, create a surrounding conditional.
535 Value originalBound = std::get<3>(config);
536 arith::CmpIOp pred = arith::CmpIOp::create(
537 rewriter, loc, arith::CmpIPredicate::slt, newIndex,
538 cloningMap.lookupOrDefault(originalBound));
539 scf::IfOp ifOp = scf::IfOp::create(rewriter, loc, pred, false);
540 rewriter.setInsertionPointToStart(&ifOp.getThenRegion().front());
541 // Put a sentinel into the worklist so we know when to pop out of the
542 // if body again. We use the launchOp here, as that cannot be part of
543 // the bodies instruction.
544 worklist.push_back(launchOp.getOperation());
545 }
546 }
547 } else {
548 // Create a sequential for loop.
549 auto loopOp = scf::ForOp::create(rewriter, loc,
550 cloningMap.lookupOrDefault(lowerBound),
551 cloningMap.lookupOrDefault(upperBound),
552 cloningMap.lookupOrDefault(step));
553 newIndex = loopOp.getInductionVar();
554 rewriter.setInsertionPointToStart(loopOp.getBody());
555 // Put a sentinel into the worklist so we know when to pop out of the loop
556 // body again. We use the launchOp here, as that cannot be part of the
557 // bodies instruction.
558 worklist.push_back(launchOp.getOperation());
559 }
560 cloningMap.map(iv, newIndex);
561 }
562
563 // Propagate custom user defined optional attributes, that can be used at
564 // later stage, such as extension data for GPU kernel dispatch
565 for (const auto &namedAttr : parallelOp->getAttrs()) {
566 if (namedAttr.getName() == gpu::getMappingAttrName() ||
567 namedAttr.getName() == ParallelOp::getOperandSegmentSizeAttr())
568 continue;
569 launchOp->setAttr(namedAttr.getName(), namedAttr.getValue());
570 }
571
572 Block *body = parallelOp.getBody();
573 worklist.reserve(worklist.size() + body->getOperations().size());
574 // Include scf.reduce terminator if exists and has an operand.
575 if (auto terminator = body->getTerminator();
576 isa<scf::ReduceOp>(terminator) && terminator->getOperands().size() == 1) {
577 worklist.push_back(terminator);
578 }
579 for (Operation &op : llvm::reverse(body->without_terminator()))
580 worklist.push_back(&op);
581 return success();
582}
583
584/// Lower a `scf.parallel` operation into a corresponding `gpu.launch`
585/// operation.
586///
587/// This essentially transforms a loop nest into a corresponding SIMT function.
588/// The conversion is driven by mapping annotations on the `scf.parallel`
589/// operations. The mapping is provided via a `DictionaryAttribute` named
590/// `mapping`, which has three entries:
591/// - processor: the hardware id to map to. 0-2 are block dimensions, 3-5 are
592/// thread dimensions and 6 is sequential.
593/// - map : An affine map that is used to pre-process hardware ids before
594/// substitution.
595/// - bound : An affine map that is used to compute the bound of the hardware
596/// id based on an upper bound of the number of iterations.
597/// If the `scf.parallel` contains nested `scf.parallel` operations, those
598/// need to be annotated, as well. Structurally, the transformation works by
599/// splicing all operations from nested `scf.parallel` operations into a single
600/// sequence. Indices mapped to hardware ids are substituted with those ids,
601/// wheras sequential mappings result in a sequential for-loop. To have more
602/// flexibility when mapping code to hardware ids, the transform supports two
603/// affine maps. The first `map` is used to compute the actual index for
604/// substitution from the hardware id. The second `bound` is used to compute the
605/// launch dimension for the hardware id from the number of iterations the
606/// mapped loop is performing. Note that the number of iterations might be
607/// imprecise if the corresponding loop-bounds are loop-dependent. In such case,
608/// the hardware id might iterate over additional indices. The transformation
609/// caters for this by predicating the created sequence of instructions on
610/// the actual loop bound. This only works if an static upper bound for the
611/// dynamic loop bound can be derived, currently via analyzing `affine.min`
612/// operations.
613LogicalResult
614ParallelToGpuLaunchLowering::matchAndRewrite(ParallelOp parallelOp,
615 PatternRewriter &rewriter) const {
616 // Mark the operation as visited for recursive legality check.
617 parallelOp->setAttr(kVisitedAttrName, rewriter.getUnitAttr());
618
619 // We can only transform starting at the outer-most loop. Launches inside of
620 // parallel loops are not supported.
621 if (auto parentLoop = parallelOp->getParentOfType<ParallelOp>())
622 return failure();
623 // Create a launch operation. We start with bound one for all grid/block
624 // sizes. Those will be refined later as we discover them from mappings.
625 Location loc = parallelOp.getLoc();
626 Value constantOne = arith::ConstantIndexOp::create(rewriter, loc, 1);
627 gpu::LaunchOp launchOp =
628 gpu::LaunchOp::create(rewriter, loc, constantOne, constantOne,
629 constantOne, constantOne, constantOne, constantOne);
630 rewriter.setInsertionPointToEnd(&launchOp.getBody().front());
631 gpu::TerminatorOp::create(rewriter, loc);
632 rewriter.setInsertionPointToStart(&launchOp.getBody().front());
633
634 IRMapping cloningMap;
635 llvm::DenseMap<gpu::Processor, Value> launchBounds;
636 SmallVector<Operation *, 16> worklist;
637 if (failed(processParallelLoop(parallelOp, launchOp, cloningMap, worklist,
638 launchBounds, rewriter)))
639 return failure();
640
641 // Whether we have seen any side-effects. Reset when leaving an inner scope.
642 bool seenSideeffects = false;
643 // Whether we have left a nesting scope (and hence are no longer innermost).
644 bool leftNestingScope = false;
645 LocalAliasAnalysis aliasAnalysis;
646 llvm::DenseSet<Value> writtenBuffer;
647 while (!worklist.empty()) {
648 Operation *op = worklist.pop_back_val();
649 // Now walk over the body and clone it.
650 // TODO: This is only correct if there either is no further scf.parallel
651 // nested or this code has side-effect but the memory buffer is not
652 // alias to inner loop access buffer. Otherwise we might need
653 // predication.
654 if (auto nestedParallel = dyn_cast<ParallelOp>(op)) {
655 // Before entering a nested scope, make sure there have been no
656 // sideeffects until now or the nested operations do not access the
657 // buffer written by outer scope.
658 if (seenSideeffects) {
659 WalkResult walkRes = nestedParallel.walk([&](Operation *nestedOp) {
660 if (isMemoryEffectFree(nestedOp))
661 return WalkResult::advance();
662
663 auto memEffectInterface = dyn_cast<MemoryEffectOpInterface>(nestedOp);
664 if (!memEffectInterface)
665 return WalkResult::advance();
666
667 SmallVector<MemoryEffects::EffectInstance> effects;
668 memEffectInterface.getEffects(effects);
669 for (const MemoryEffects::EffectInstance &effect : effects) {
670 if (isa<MemoryEffects::Read>(effect.getEffect()) ||
671 isa<MemoryEffects::Write>(effect.getEffect())) {
672 Value baseBuffer = effect.getValue();
673 if (!baseBuffer)
674 return WalkResult::interrupt();
675 for (Value val : writtenBuffer) {
676 if (aliasAnalysis.alias(baseBuffer, val) !=
678 return WalkResult::interrupt();
679 }
680 }
681 }
682 }
683 return WalkResult::advance();
684 });
685 if (walkRes.wasInterrupted())
686 return failure();
687 }
688 // A nested scf.parallel needs insertion of code to compute indices.
689 // Insert that now. This will also update the worklist with the loops
690 // body.
691 if (failed(processParallelLoop(nestedParallel, launchOp, cloningMap,
692 worklist, launchBounds, rewriter)))
693 return failure();
694 } else if (op == launchOp.getOperation()) {
695 // Found our sentinel value. We have finished the operations from one
696 // nesting level, pop one level back up.
697 auto *parent = rewriter.getInsertionPoint()->getParentOp();
698 rewriter.setInsertionPointAfter(parent);
699 leftNestingScope = true;
700 seenSideeffects = false;
701 writtenBuffer.clear();
702 } else if (auto reduceOp = dyn_cast<scf::ReduceOp>(op)) {
703 // Convert scf.reduction op
704 auto parentLoop = op->getParentOfType<ParallelOp>();
705 if (!parentLoop || op->getOperands().size() != 1)
706 return failure();
707 auto operand = op->getOperands().front();
708 auto newValue = cloningMap.lookupOrNull(operand);
709 if (!newValue || !operand.getType().isSignlessIntOrFloat())
710 return failure();
711 // Ensure reduction region is isolated from above.
712 llvm::SetVector<Value> externalValues;
713 getUsedValuesDefinedAbove(reduceOp.getRegion(0), externalValues);
714 if (!externalValues.empty())
715 return failure();
716 // Replace by gpu.all_reduce.
717 auto gpuRedOp = gpu::AllReduceOp::create(rewriter, loc, newValue);
718 cloningMap.map(parentLoop->getResult(0), gpuRedOp.getResult());
719 // Copy region.
720 rewriter.inlineRegionBefore(reduceOp.getRegion(0), gpuRedOp.getRegion(),
721 gpuRedOp.getRegion().begin());
722 // Replace src.reduce.return with gpu.yield.
723 auto scfReturn = gpuRedOp.getRegion().front().getTerminator();
724 auto ip = rewriter.saveInsertionPoint();
725 rewriter.setInsertionPointToEnd(&gpuRedOp.getRegion().front());
726 rewriter.replaceOpWithNewOp<gpu::YieldOp>(
727 scfReturn, scfReturn->getOperands().front());
728 rewriter.restoreInsertionPoint(ip);
729 } else {
730 // Otherwise we copy it over.
731 Operation *clone = rewriter.clone(*op, cloningMap);
732 cloningMap.map(op->getResults(), clone->getResults());
733 // Check for side effects.
735 // Record the buffer accessed by the operations with write effects.
736 if (auto memEffectInterface =
737 dyn_cast<MemoryEffectOpInterface>(clone)) {
738 SmallVector<MemoryEffects::EffectInstance> effects;
739 memEffectInterface.getEffects(effects);
740 for (const MemoryEffects::EffectInstance &effect : effects) {
741 if (isa<MemoryEffects::Write>(effect.getEffect())) {
742 Value writtenBase = effect.getValue();
743 // Conservatively return failure if we cannot find the written
744 // address.
745 if (!writtenBase)
746 return failure();
747 writtenBuffer.insert(writtenBase);
748 }
749 }
750 }
751 }
752 // TODO: Handle region side effects properly.
753 seenSideeffects |=
755 // If we are no longer in the innermost scope, sideeffects are disallowed.
756 if (seenSideeffects && leftNestingScope)
757 return failure();
758 }
759 }
760
761 // Now that we succeeded creating the launch operation, also update the
762 // bounds.
763 for (auto bound : launchBounds)
764 launchOp.setOperand(getLaunchOpArgumentNum(std::get<0>(bound)),
765 std::get<1>(bound));
766
767 rewriter.eraseOp(parallelOp);
768 return success();
769}
770
772 patterns.add<ParallelToGpuLaunchLowering>(patterns.getContext());
773}
774
776 target.addLegalDialect<memref::MemRefDialect>();
777 target.addDynamicallyLegalOp<scf::ParallelOp>([](scf::ParallelOp parallelOp) {
778 return !parallelOp->hasAttr(gpu::getMappingAttrName()) ||
779 parallelOp->hasAttr(kVisitedAttrName);
780 });
781}
782
784 op->walk([](scf::ParallelOp parallelOp) {
785 parallelOp->removeAttr(kVisitedAttrName);
786 });
787}
return success()
lhs
ArrayAttr()
static LogicalResult checkAffineLoopNestMappableImpl(AffineForOp forOp, unsigned numDims)
Definition SCFToGPU.cpp:109
static Value getOrEmitUpperBound(AffineForOp forOp, OpBuilder &builder)
Definition SCFToGPU.cpp:99
static Value getDim3Value(const gpu::KernelDim3 &dim3, unsigned pos)
Definition SCFToGPU.cpp:60
static LogicalResult processParallelLoop(ParallelOp parallelOp, gpu::LaunchOp launchOp, IRMapping &cloningMap, SmallVectorImpl< Operation * > &worklist, DenseMap< gpu::Processor, Value > &bounds, PatternRewriter &rewriter)
Modifies the current transformation state to capture the effect of the given scf.parallel operation o...
Definition SCFToGPU.cpp:405
static bool isMappedToProcessor(gpu::Processor processor)
Definition SCFToGPU.cpp:359
static Operation::operand_range getLowerBoundOperands(AffineForOp forOp)
Definition SCFToGPU.cpp:75
static Value getOrCreateStep(AffineForOp forOp, OpBuilder &builder)
Definition SCFToGPU.cpp:86
static Value getOrEmitLowerBound(AffineForOp forOp, OpBuilder &builder)
Definition SCFToGPU.cpp:93
static Value deriveStaticUpperBound(Value upperBound, PatternRewriter &rewriter)
Tries to derive a static upper bound from the defining operation of upperBound.
Definition SCFToGPU.cpp:319
static unsigned getLaunchOpArgumentNum(gpu::Processor processor)
Definition SCFToGPU.cpp:363
static constexpr StringLiteral kVisitedAttrName
Definition SCFToGPU.cpp:57
static Operation::operand_range getUpperBoundOperands(AffineForOp forOp)
Definition SCFToGPU.cpp:80
static LogicalResult checkAffineLoopNestMappable(AffineForOp forOp, unsigned numBlockDims, unsigned numThreadDims)
Definition SCFToGPU.cpp:135
Base type for affine expression.
Definition AffineExpr.h:68
A multi-dimensional affine map Affine map's are immutable like Type's, and they are uniqued.
Definition AffineMap.h:46
static AffineMap get(MLIRContext *context)
Returns a zero result affine map with no dimensions or symbols: () -> ().
@ NoAlias
The two locations do not alias at all.
Attributes are known-constant values of operations.
Definition Attributes.h:25
Block represents an ordered list of Operations.
Definition Block.h:33
OpListType & getOperations()
Definition Block.h:147
Operation * getTerminator()
Get the terminator operation of this block.
Definition Block.cpp:249
iterator_range< iterator > without_terminator()
Return an iterator range over the operation within this block excluding the terminator operation at t...
Definition Block.h:222
UnitAttr getUnitAttr()
Definition Builders.cpp:102
AffineExpr getAffineSymbolExpr(unsigned position)
Definition Builders.cpp:372
AffineExpr getAffineDimExpr(unsigned position)
Definition Builders.cpp:368
This is a utility class for mapping one set of IR entities to another.
Definition IRMapping.h:26
auto lookupOrDefault(T from) const
Lookup a mapped value within the map.
Definition IRMapping.h:65
void map(Value from, Value to)
Inserts a new mapping for 'from' to 'to'.
Definition IRMapping.h:30
auto lookupOrNull(T from) const
Lookup a mapped value within the map.
Definition IRMapping.h:58
AliasResult alias(Value lhs, Value rhs)
Given two values, return their aliasing behavior.
This class defines the main interface for locations in MLIR and acts as a non-nullable wrapper around...
Definition Location.h:76
RAII guard to reset the insertion point of the builder when destroyed.
Definition Builders.h:350
This class helps build Operations.
Definition Builders.h:209
InsertPoint saveInsertionPoint() const
Return a saved insertion point.
Definition Builders.h:387
Block::iterator getInsertionPoint() const
Returns the current insertion point of the builder.
Definition Builders.h:447
Operation * clone(Operation &op, IRMapping &mapper)
Creates a deep copy of the specified operation, remapping any operands that use values outside of the...
Definition Builders.cpp:566
void setInsertionPointToStart(Block *block)
Sets the insertion point to the start of the specified block.
Definition Builders.h:433
void setInsertionPoint(Block *block, Block::iterator insertPoint)
Set the insertion point to the specified location.
Definition Builders.h:400
void setInsertionPointToEnd(Block *block)
Sets the insertion point to the end of the specified block.
Definition Builders.h:438
void restoreInsertionPoint(InsertPoint ip)
Restore the insert point to a previously saved point.
Definition Builders.h:392
void setInsertionPointAfter(Operation *op)
Sets the insertion point to the node after the specified operation, which will cause subsequent inser...
Definition Builders.h:414
Operation is the basic unit of execution within MLIR.
Definition Operation.h:88
unsigned getNumRegions()
Returns the number of regions held by this operation.
Definition Operation.h:703
Location getLoc()
The source location the operation was defined or derived from.
Definition Operation.h:244
OperandRange operand_range
Definition Operation.h:400
InFlightDiagnostic emitError(const Twine &message={})
Emit an error about fatal conditions with this operation, reporting up to any diagnostic handlers tha...
OpTy getParentOfType()
Return the closest surrounding parent operation that is of type 'OpTy'.
Definition Operation.h:259
operand_range getOperands()
Returns an iterator on the underlying Value's.
Definition Operation.h:407
std::enable_if_t< llvm::function_traits< std::decay_t< FnT > >::num_args==1, RetT > walk(FnT &&callback)
Walk the operation by calling the callback for each nested operation (including this one),...
Definition Operation.h:826
result_range getResults()
Definition Operation.h:444
void erase()
Remove this operation from its parent block and delete it.
A special type of RewriterBase that coordinates the application of a rewrite pattern on the current I...
This class contains a list of basic blocks and a link to the parent operation it is attached to.
Definition Region.h:26
MLIRContext * getContext() const
RewritePatternSet & add(ConstructorArg &&arg, ConstructorArgs &&...args)
Add an instance of each of the pattern types 'Ts' to the pattern list with the given arguments.
virtual void eraseOp(Operation *op)
This method erases an operation that is known to have no uses.
std::enable_if_t<!std::is_convertible< CallbackT, Twine >::value, LogicalResult > notifyMatchFailure(Location loc, CallbackT &&reasonCallback)
Used to notify the listener that the IR failed to be rewritten because of a match failure,...
void inlineRegionBefore(Region &region, Region &parent, Region::iterator before)
Move the blocks that belong to "region" before the given position in another region "parent".
OpTy replaceOpWithNewOp(Operation *op, Args &&...args)
Replace the results of the given (original) op with a new op that is created without verification (re...
This class provides an abstraction over the different types of ranges over Values.
Definition ValueRange.h:387
This class represents an instance of an SSA value in the MLIR system, representing a computable value...
Definition Value.h:96
Operation * getDefiningOp() const
If this value is the result of an operation, return the operation that defines it.
Definition Value.cpp:18
static WalkResult advance()
Definition WalkResult.h:47
bool wasInterrupted() const
Returns true if the walk was interrupted.
Definition WalkResult.h:51
static WalkResult interrupt()
Definition WalkResult.h:46
Specialization of arith.constant op that returns an integer of index type.
Definition Arith.h:113
static ConstantIndexOp create(OpBuilder &builder, Location location, int64_t value)
Definition ArithOps.cpp:363
SideEffects::EffectInstance< Effect > EffectInstance
StringRef getMappingAttrName()
Name of the mapping attribute produced by loop mappers.
detail::InFlightRemark failed(Location loc, RemarkOpts opts)
Report an optimization remark that failed.
Definition Remarks.h:717
Value constantOne(OpBuilder &builder, Location loc, Type tp)
Generates a 1-valued constant of the given type.
Include the generated interface declarations.
void finalizeParallelLoopToGPUConversion(Operation *op)
Clean up after applyPartialConversion/applyFullConversion call.
Definition SCFToGPU.cpp:783
void populateParallelLoopToGPUPatterns(RewritePatternSet &patterns)
Adds the conversion pattern from scf.parallel to gpu.launch to the provided pattern list.
Definition SCFToGPU.cpp:771
std::optional< int64_t > getConstantIntValue(OpFoldResult ofr)
If ofr is a constant integer or an IntegerAttr, return the integer.
LogicalResult convertAffineLoopNestToGPULaunch(affine::AffineForOp forOp, unsigned numBlockDims, unsigned numThreadDims)
Convert a perfect affine loop nest with the outermost loop identified by forOp into a gpu::Launch ope...
bool isMemoryEffectFree(Operation *op)
Returns true if the given operation is free of memory effects.
Value lowerAffineUpperBound(affine::AffineForOp op, OpBuilder &builder)
Emit code that computes the upper bound of the given affine loop using standard arithmetic operations...
void getUsedValuesDefinedAbove(Region &region, Region &limit, SetVector< Value > &values)
Fill values with a list of values defined at the ancestors of the limit region and used within region...
Operation * clone(OpBuilder &b, Operation *op, TypeRange newResultTypes, ValueRange newOperands)
llvm::DenseMap< KeyT, ValueT, KeyInfoT, BucketT > DenseMap
Definition LLVM.h:118
bool areValuesDefinedAbove(Range values, Region &limit)
Check if all values in the provided range are defined above the limit region.
Definition RegionUtils.h:26
void configureParallelLoopToGPULegality(ConversionTarget &target)
Configures the rewrite target such that only scf.parallel operations that are not rewritten by the pr...
Definition SCFToGPU.cpp:775
Value lowerAffineLowerBound(affine::AffineForOp op, OpBuilder &builder)
Emit code that computes the lower bound of the given affine loop using standard arithmetic operations...
Utility class for the GPU dialect to represent triples of Values accessible through ....
Definition GPUDialect.h:39