mlir.dialects._llvm_ops_gen¶

Attributes¶

`_ods_ir`
`_Buffer`

Classes¶

`_Dialect`
`ACosOp`
`ACosOpAdaptor`
`AShrOp`
`AShrOpAdaptor`
`ASinOp`
`ASinOpAdaptor`
`ATan2Op`
`ATan2OpAdaptor`
`ATanOp`
`ATanOpAdaptor`
`AbsOp`
`AbsOpAdaptor`
`AddOp`
`AddOpAdaptor`
`AddrSpaceCastOp`
`AddrSpaceCastOpAdaptor`
`AddressOfOp`	Creates an SSA value containing a pointer to a global value (function,
`AddressOfOpAdaptor`
`AliasOp`	`llvm.mlir.alias` is a top level operation that defines a global alias for
`AliasOpAdaptor`
`AllocaOp`
`AllocaOpAdaptor`
`AndOp`
`AndOpAdaptor`
`Annotation`
`AnnotationAdaptor`
`AssumeOp`
`AssumeOpAdaptor`
`AtomicCmpXchgOp`
`AtomicCmpXchgOpAdaptor`
`AtomicRMWOp`
`AtomicRMWOpAdaptor`
`BitReverseOp`
`BitReverseOpAdaptor`
`BitcastOp`
`BitcastOpAdaptor`
`BlockAddressOp`	Creates an SSA value containing a pointer to a basic block. The block
`BlockAddressOpAdaptor`
`BlockTagOp`	This operation uses a `tag` to uniquely identify an MLIR block in a
`BlockTagOpAdaptor`
`BrOp`
`BrOpAdaptor`
`ByteSwapOp`
`ByteSwapOpAdaptor`
`CallIntrinsicOp`	Call the specified llvm intrinsic. If the intrinsic is overloaded, use
`CallIntrinsicOpAdaptor`
`CallOp`	In LLVM IR, functions may return either 0 or 1 value. LLVM IR dialect
`CallOpAdaptor`
`ComdatOp`	Provides access to object file COMDAT section/group functionality.
`ComdatOpAdaptor`
`ComdatSelectorOp`	Provides access to object file COMDAT section/group functionality.
`ComdatSelectorOpAdaptor`
`CondBrOp`
`CondBrOpAdaptor`
`ConstantOp`	Unlike LLVM IR, MLIR does not have first-class constant values. Therefore,
`ConstantOpAdaptor`
`ConstrainedFAddIntr`
`ConstrainedFAddIntrAdaptor`
`ConstrainedFDivIntr`
`ConstrainedFDivIntrAdaptor`
`ConstrainedFMAIntr`
`ConstrainedFMAIntrAdaptor`
`ConstrainedFMulAddIntr`
`ConstrainedFMulAddIntrAdaptor`
`ConstrainedFMulIntr`
`ConstrainedFMulIntrAdaptor`
`ConstrainedFPExtIntr`
`ConstrainedFPExtIntrAdaptor`
`ConstrainedFPTruncIntr`
`ConstrainedFPTruncIntrAdaptor`
`ConstrainedFRemIntr`
`ConstrainedFRemIntrAdaptor`
`ConstrainedFSubIntr`
`ConstrainedFSubIntrAdaptor`
`ConstrainedSIToFP`
`ConstrainedSIToFPAdaptor`
`ConstrainedUIToFP`
`ConstrainedUIToFPAdaptor`
`CopySignOp`
`CopySignOpAdaptor`
`CoroAlignOp`
`CoroAlignOpAdaptor`
`CoroBeginOp`
`CoroBeginOpAdaptor`
`CoroEndOp`
`CoroEndOpAdaptor`
`CoroFreeOp`
`CoroFreeOpAdaptor`
`CoroIdOp`
`CoroIdOpAdaptor`
`CoroPromiseOp`
`CoroPromiseOpAdaptor`
`CoroResumeOp`
`CoroResumeOpAdaptor`
`CoroSaveOp`
`CoroSaveOpAdaptor`
`CoroSizeOp`
`CoroSizeOpAdaptor`
`CoroSuspendOp`
`CoroSuspendOpAdaptor`
`CosOp`
`CosOpAdaptor`
`CoshOp`
`CoshOpAdaptor`
`CountLeadingZerosOp`
`CountLeadingZerosOpAdaptor`
`CountTrailingZerosOp`
`CountTrailingZerosOpAdaptor`
`CtPopOp`
`CtPopOpAdaptor`
`DSOLocalEquivalentOp`	Creates an SSA value containing a pointer to a global value (function or
`DSOLocalEquivalentOpAdaptor`
`DbgDeclareOp`
`DbgDeclareOpAdaptor`
`DbgLabelOp`
`DbgLabelOpAdaptor`
`DbgValueOp`
`DbgValueOpAdaptor`
`DebugTrap`
`DebugTrapAdaptor`
`EhTypeidForOp`
`EhTypeidForOpAdaptor`
`Exp2Op`
`Exp2OpAdaptor`
`Exp10Op`
`Exp10OpAdaptor`
`ExpOp`
`ExpOpAdaptor`
`ExpectOp`
`ExpectOpAdaptor`
`ExpectWithProbabilityOp`
`ExpectWithProbabilityOpAdaptor`
`ExtractElementOp`
`ExtractElementOpAdaptor`
`ExtractValueOp`
`ExtractValueOpAdaptor`
`FAbsOp`
`FAbsOpAdaptor`
`FAddOp`
`FAddOpAdaptor`
`FCeilOp`
`FCeilOpAdaptor`
`FCmpOp`
`FCmpOpAdaptor`
`FDivOp`
`FDivOpAdaptor`
`FFloorOp`
`FFloorOpAdaptor`
`FMAOp`
`FMAOpAdaptor`
`FMulAddOp`
`FMulAddOpAdaptor`
`FMulOp`
`FMulOpAdaptor`
`FNegOp`
`FNegOpAdaptor`
`FPExtOp`
`FPExtOpAdaptor`
`FPToSIOp`
`FPToSIOpAdaptor`
`FPToUIOp`
`FPToUIOpAdaptor`
`FPTruncOp`
`FPTruncOpAdaptor`
`FRemOp`
`FRemOpAdaptor`
`FSubOp`
`FSubOpAdaptor`
`FTruncOp`
`FTruncOpAdaptor`
`FakeUseOp`
`FakeUseOpAdaptor`
`FenceOp`
`FenceOpAdaptor`
`FractionExpOp`
`FractionExpOpAdaptor`
`FreezeOp`
`FreezeOpAdaptor`
`FshlOp`
`FshlOpAdaptor`
`FshrOp`
`FshrOpAdaptor`
`GEPOp`	This operation mirrors LLVM IRs 'getelementptr' operation that is used to
`GEPOpAdaptor`
`GetActiveLaneMaskOp`
`GetActiveLaneMaskOpAdaptor`
`GlobalCtorsOp`	Specifies a list of constructor functions, priorities, and associated data.
`GlobalCtorsOpAdaptor`
`GlobalDtorsOp`	Specifies a list of destructor functions and priorities. The functions
`GlobalDtorsOpAdaptor`
`GlobalOp`	Since MLIR allows for arbitrary operations to be present at the top level,
`GlobalOpAdaptor`
`ICmpOp`
`ICmpOpAdaptor`
`IFuncOp`	`llvm.mlir.ifunc` is a top level operation that defines a global ifunc.
`IFuncOpAdaptor`
`IndirectBrOp`	Transfer control flow to address in `$addr`. A list of possible target
`IndirectBrOpAdaptor`
`InlineAsmOp`	The InlineAsmOp mirrors the underlying LLVM semantics with a notable
`InlineAsmOpAdaptor`
`InsertElementOp`
`InsertElementOpAdaptor`
`InsertValueOp`
`InsertValueOpAdaptor`
`IntToPtrOp`
`IntToPtrOpAdaptor`
`InvariantEndOp`
`InvariantEndOpAdaptor`
`InvariantStartOp`
`InvariantStartOpAdaptor`
`InvokeOp`
`InvokeOpAdaptor`
`IsConstantOp`
`IsConstantOpAdaptor`
`IsFPClass`
`IsFPClassAdaptor`
`LLVMFuncOp`	MLIR functions are defined by an operation that is not built into the IR
`LLVMFuncOpAdaptor`
`LShrOp`
`LShrOpAdaptor`
`LandingpadOp`
`LandingpadOpAdaptor`
`LaunderInvariantGroupOp`
`LaunderInvariantGroupOpAdaptor`
`LifetimeEndOp`
`LifetimeEndOpAdaptor`
`LifetimeStartOp`
`LifetimeStartOpAdaptor`
`LinkerOptionsOp`	Pass the given options to the linker when the resulting object file is linked.
`LinkerOptionsOpAdaptor`
`LlrintOp`
`LlrintOpAdaptor`
`LlroundOp`
`LlroundOpAdaptor`
`LoadExpOp`
`LoadExpOpAdaptor`
`LoadOp`	The `load` operation is used to read from memory. A load may be marked as
`LoadOpAdaptor`
`Log2Op`
`Log2OpAdaptor`
`Log10Op`
`Log10OpAdaptor`
`LogOp`
`LogOpAdaptor`
`LrintOp`
`LrintOpAdaptor`
`LroundOp`
`LroundOpAdaptor`
`MaskedLoadOp`
`MaskedLoadOpAdaptor`
`MaskedStoreOp`
`MaskedStoreOpAdaptor`
`MatrixColumnMajorLoadOp`
`MatrixColumnMajorLoadOpAdaptor`
`MatrixColumnMajorStoreOp`
`MatrixColumnMajorStoreOpAdaptor`
`MatrixMultiplyOp`
`MatrixMultiplyOpAdaptor`
`MatrixTransposeOp`
`MatrixTransposeOpAdaptor`
`MaxNumOp`
`MaxNumOpAdaptor`
`MaximumOp`
`MaximumOpAdaptor`
`MemcpyInlineOp`
`MemcpyInlineOpAdaptor`
`MemcpyOp`
`MemcpyOpAdaptor`
`MemmoveOp`
`MemmoveOpAdaptor`
`MemsetInlineOp`
`MemsetInlineOpAdaptor`
`MemsetOp`
`MemsetOpAdaptor`
`MinNumOp`
`MinNumOpAdaptor`
`MinimumOp`
`MinimumOpAdaptor`
`ModuleFlagsOp`	Represents the equivalent in MLIR for LLVM's `llvm.module.flags` metadata,
`ModuleFlagsOpAdaptor`
`MulOp`
`MulOpAdaptor`
`NamedMetadataOp`	Represents an LLVM named metadata node (`llvm::NamedMDNode`). Named
`NamedMetadataOpAdaptor`
`NearbyintOp`
`NearbyintOpAdaptor`
`NoAliasScopeDeclOp`
`NoAliasScopeDeclOpAdaptor`
`NoneTokenOp`	Unlike LLVM IR, MLIR does not have first-class token values. They must be
`NoneTokenOpAdaptor`
`OrOp`
`OrOpAdaptor`
`PoisonOp`	Unlike LLVM IR, MLIR does not have first-class poison values. Such values
`PoisonOpAdaptor`
`PowIOp`
`PowIOpAdaptor`
`PowOp`
`PowOpAdaptor`
`Prefetch`
`PrefetchAdaptor`
`PtrAnnotation`
`PtrAnnotationAdaptor`
`PtrMaskOp`
`PtrMaskOpAdaptor`
`PtrToAddrOp`	Operation mirroring LLVM's `ptrtoaddr` operation.
`PtrToAddrOpAdaptor`
`PtrToIntOp`
`PtrToIntOpAdaptor`
`ResumeOp`
`ResumeOpAdaptor`
`ReturnOp`
`ReturnOpAdaptor`
`RintOp`
`RintOpAdaptor`
`RoundEvenOp`
`RoundEvenOpAdaptor`
`RoundOp`
`RoundOpAdaptor`
`SAddSat`
`SAddSatAdaptor`
`SAddWithOverflowOp`
`SAddWithOverflowOpAdaptor`
`SCmpOp`
`SCmpOpAdaptor`
`SDivOp`
`SDivOpAdaptor`
`SExtOp`
`SExtOpAdaptor`
`SIToFPOp`
`SIToFPOpAdaptor`
`SMaxOp`
`SMaxOpAdaptor`
`SMinOp`
`SMinOpAdaptor`
`SMulWithOverflowOp`
`SMulWithOverflowOpAdaptor`
`SRemOp`
`SRemOpAdaptor`
`SSACopyOp`
`SSACopyOpAdaptor`
`SSHLSat`
`SSHLSatAdaptor`
`SSubSat`
`SSubSatAdaptor`
`SSubWithOverflowOp`
`SSubWithOverflowOpAdaptor`
`SelectOp`
`SelectOpAdaptor`
`ShlOp`
`ShlOpAdaptor`
`ShuffleVectorOp`
`ShuffleVectorOpAdaptor`
`SinOp`
`SinOpAdaptor`
`SincosOp`
`SincosOpAdaptor`
`SinhOp`
`SinhOpAdaptor`
`SqrtOp`
`SqrtOpAdaptor`
`StackRestoreOp`
`StackRestoreOpAdaptor`
`StackSaveOp`
`StackSaveOpAdaptor`
`StepVectorOp`
`StepVectorOpAdaptor`
`StoreOp`	The `store` operation is used to write to memory. A store may be marked as
`StoreOpAdaptor`
`StripInvariantGroupOp`
`StripInvariantGroupOpAdaptor`
`SubOp`
`SubOpAdaptor`
`SwitchOp`
`SwitchOpAdaptor`
`TanOp`
`TanOpAdaptor`
`TanhOp`
`TanhOpAdaptor`
`ThreadlocalAddressOp`
`ThreadlocalAddressOpAdaptor`
`Trap`
`TrapAdaptor`
`TruncOp`
`TruncOpAdaptor`
`UAddSat`
`UAddSatAdaptor`
`UAddWithOverflowOp`
`UAddWithOverflowOpAdaptor`
`UBSanTrap`
`UBSanTrapAdaptor`
`UCmpOp`
`UCmpOpAdaptor`
`UDivOp`
`UDivOpAdaptor`
`UIToFPOp`
`UIToFPOpAdaptor`
`UMaxOp`
`UMaxOpAdaptor`
`UMinOp`
`UMinOpAdaptor`
`UMulWithOverflowOp`
`UMulWithOverflowOpAdaptor`
`URemOp`
`URemOpAdaptor`
`USHLSat`
`USHLSatAdaptor`
`USubSat`
`USubSatAdaptor`
`USubWithOverflowOp`
`USubWithOverflowOpAdaptor`
`UndefOp`	Unlike LLVM IR, MLIR does not have first-class undefined values. Such values
`UndefOpAdaptor`
`UnreachableOp`
`UnreachableOpAdaptor`
`VPAShrOp`
`VPAShrOpAdaptor`
`VPAddOp`
`VPAddOpAdaptor`
`VPAndOp`
`VPAndOpAdaptor`
`VPFAddOp`
`VPFAddOpAdaptor`
`VPFDivOp`
`VPFDivOpAdaptor`
`VPFMulAddOp`
`VPFMulAddOpAdaptor`
`VPFMulOp`
`VPFMulOpAdaptor`
`VPFNegOp`
`VPFNegOpAdaptor`
`VPFPExtOp`
`VPFPExtOpAdaptor`
`VPFPToSIOp`
`VPFPToSIOpAdaptor`
`VPFPToUIOp`
`VPFPToUIOpAdaptor`
`VPFPTruncOp`
`VPFPTruncOpAdaptor`
`VPFRemOp`
`VPFRemOpAdaptor`
`VPFSubOp`
`VPFSubOpAdaptor`
`VPFmaOp`
`VPFmaOpAdaptor`
`VPIntToPtrOp`
`VPIntToPtrOpAdaptor`
`VPLShrOp`
`VPLShrOpAdaptor`
`VPLoadOp`
`VPLoadOpAdaptor`
`VPMergeMinOp`
`VPMergeMinOpAdaptor`
`VPMulOp`
`VPMulOpAdaptor`
`VPOrOp`
`VPOrOpAdaptor`
`VPPtrToIntOp`
`VPPtrToIntOpAdaptor`
`VPReduceAddOp`
`VPReduceAddOpAdaptor`
`VPReduceAndOp`
`VPReduceAndOpAdaptor`
`VPReduceFAddOp`
`VPReduceFAddOpAdaptor`
`VPReduceFMaxOp`
`VPReduceFMaxOpAdaptor`
`VPReduceFMinOp`
`VPReduceFMinOpAdaptor`
`VPReduceFMulOp`
`VPReduceFMulOpAdaptor`
`VPReduceMulOp`
`VPReduceMulOpAdaptor`
`VPReduceOrOp`
`VPReduceOrOpAdaptor`
`VPReduceSMaxOp`
`VPReduceSMaxOpAdaptor`
`VPReduceSMinOp`
`VPReduceSMinOpAdaptor`
`VPReduceUMaxOp`
`VPReduceUMaxOpAdaptor`
`VPReduceUMinOp`
`VPReduceUMinOpAdaptor`
`VPReduceXorOp`
`VPReduceXorOpAdaptor`
`VPSDivOp`
`VPSDivOpAdaptor`
`VPSExtOp`
`VPSExtOpAdaptor`
`VPSIToFPOp`
`VPSIToFPOpAdaptor`
`VPSMaxOp`
`VPSMaxOpAdaptor`
`VPSMinOp`
`VPSMinOpAdaptor`
`VPSRemOp`
`VPSRemOpAdaptor`
`VPSelectMinOp`
`VPSelectMinOpAdaptor`
`VPShlOp`
`VPShlOpAdaptor`
`VPStoreOp`
`VPStoreOpAdaptor`
`VPStridedLoadOp`
`VPStridedLoadOpAdaptor`
`VPStridedStoreOp`
`VPStridedStoreOpAdaptor`
`VPSubOp`
`VPSubOpAdaptor`
`VPTruncOp`
`VPTruncOpAdaptor`
`VPUDivOp`
`VPUDivOpAdaptor`
`VPUIToFPOp`
`VPUIToFPOpAdaptor`
`VPUMaxOp`
`VPUMaxOpAdaptor`
`VPUMinOp`
`VPUMinOpAdaptor`
`VPURemOp`
`VPURemOpAdaptor`
`VPXorOp`
`VPXorOpAdaptor`
`VPZExtOp`
`VPZExtOpAdaptor`
`VaArgOp`
`VaArgOpAdaptor`
`VaCopyOp`
`VaCopyOpAdaptor`
`VaEndOp`
`VaEndOpAdaptor`
`VaStartOp`
`VaStartOpAdaptor`
`VarAnnotation`
`VarAnnotationAdaptor`
`XOrOp`
`XOrOpAdaptor`
`ZExtOp`
`ZExtOpAdaptor`
`ZeroOp`	Unlike LLVM IR, MLIR does not have first-class zero-initialized values.
`ZeroOpAdaptor`
`masked_compressstore`
`masked_compressstoreAdaptor`
`masked_expandload`
`masked_expandloadAdaptor`
`masked_gather`
`masked_gatherAdaptor`
`masked_scatter`
`masked_scatterAdaptor`
`vector_deinterleave2`
`vector_deinterleave2Adaptor`
`vector_extract`
`vector_extractAdaptor`
`vector_insert`
`vector_insertAdaptor`
`vector_interleave2`
`vector_interleave2Adaptor`
`vector_reduce_add`
`vector_reduce_addAdaptor`
`vector_reduce_and`
`vector_reduce_andAdaptor`
`vector_reduce_fadd`
`vector_reduce_faddAdaptor`
`vector_reduce_fmax`
`vector_reduce_fmaxAdaptor`
`vector_reduce_fmaximum`
`vector_reduce_fmaximumAdaptor`
`vector_reduce_fmin`
`vector_reduce_fminAdaptor`
`vector_reduce_fminimum`
`vector_reduce_fminimumAdaptor`
`vector_reduce_fmul`
`vector_reduce_fmulAdaptor`
`vector_reduce_mul`
`vector_reduce_mulAdaptor`
`vector_reduce_or`
`vector_reduce_orAdaptor`
`vector_reduce_smax`
`vector_reduce_smaxAdaptor`
`vector_reduce_smin`
`vector_reduce_sminAdaptor`
`vector_reduce_umax`
`vector_reduce_umaxAdaptor`
`vector_reduce_umin`
`vector_reduce_uminAdaptor`
`vector_reduce_xor`
`vector_reduce_xorAdaptor`
`vscale`
`vscaleAdaptor`

Functions¶

`intr_acos`(→ _ods_ir)
`ashr`(→ _ods_ir)
`intr_asin`(→ _ods_ir)
`intr_atan2`(→ _ods_ir)
`intr_atan`(→ _ods_ir)
`intr_abs`(→ _ods_ir)
`add`(→ _ods_ir)
`addrspacecast`(→ _ods_ir)
`mlir_addressof`(→ _ods_ir)
`mlir_alias`(→ AliasOp)
`alloca`(→ _ods_ir)
`and_`(→ _ods_ir)
`intr_annotation`(→ _ods_ir[_ods_ir])
`intr_assume`(→ AssumeOp)
`cmpxchg`(→ _ods_ir)
`atomicrmw`(→ _ods_ir)
`intr_bitreverse`(→ _ods_ir)
`bitcast`(→ _ods_ir)
`blockaddress`(→ _ods_ir)
`blocktag`(→ BlockTagOp)
`br`(→ BrOp)
`intr_bswap`(→ _ods_ir)
`call_intrinsic`(→ Union[_ods_ir, _ods_ir, CallIntrinsicOp])
`call`(→ Union[_ods_ir, _ods_ir, CallOp])
`comdat`(→ ComdatOp)
`comdat_selector`(→ ComdatSelectorOp)
`cond_br`(→ CondBrOp)
`mlir_constant`(→ _ods_ir)
`intr_experimental_constrained_fadd`(→ _ods_ir)
`intr_experimental_constrained_fdiv`(→ _ods_ir)
`intr_experimental_constrained_fma`(→ _ods_ir)
`intr_experimental_constrained_fmuladd`(→ _ods_ir)
`intr_experimental_constrained_fmul`(→ _ods_ir)
`intr_experimental_constrained_fpext`(→ _ods_ir)
`intr_experimental_constrained_fptrunc`(→ _ods_ir)
`intr_experimental_constrained_frem`(→ _ods_ir)
`intr_experimental_constrained_fsub`(→ _ods_ir)
`intr_experimental_constrained_sitofp`(→ _ods_ir)
`intr_experimental_constrained_uitofp`(→ _ods_ir)
`intr_copysign`(→ _ods_ir)
`intr_coro_align`(→ _ods_ir)
`intr_coro_begin`(→ _ods_ir)
`intr_coro_end`(→ _ods_ir)
`intr_coro_free`(→ _ods_ir)
`intr_coro_id`(→ _ods_ir)
`intr_coro_promise`(→ _ods_ir)
`intr_coro_resume`(→ CoroResumeOp)
`intr_coro_save`(→ _ods_ir)
`intr_coro_size`(→ _ods_ir)
`intr_coro_suspend`(→ _ods_ir)
`intr_cos`(→ _ods_ir)
`intr_cosh`(→ _ods_ir)
`intr_ctlz`(→ _ods_ir)
`intr_cttz`(→ _ods_ir)
`intr_ctpop`(→ _ods_ir)
`dso_local_equivalent`(→ _ods_ir)
`intr_dbg_declare`(→ DbgDeclareOp)
`intr_dbg_label`(→ DbgLabelOp)
`intr_dbg_value`(→ DbgValueOp)
`intr_debugtrap`(→ DebugTrap)
`intr_eh_typeid_for`(→ _ods_ir)
`intr_exp2`(→ _ods_ir)
`intr_exp10`(→ _ods_ir)
`intr_exp`(→ _ods_ir)
`intr_expect`(→ _ods_ir)
`intr_expect_with_probability`(→ _ods_ir)
`extractelement`(→ _ods_ir)
`extractvalue`(→ _ods_ir)
`intr_fabs`(→ _ods_ir)
`fadd`(→ _ods_ir)
`intr_ceil`(→ _ods_ir)
`fcmp`(→ _ods_ir)
`fdiv`(→ _ods_ir)
`intr_floor`(→ _ods_ir)
`intr_fma`(→ _ods_ir)
`intr_fmuladd`(→ _ods_ir)
`fmul`(→ _ods_ir)
`fneg`(→ _ods_ir)
`fpext`(→ _ods_ir)
`fptosi`(→ _ods_ir)
`fptoui`(→ _ods_ir)
`fptrunc`(→ _ods_ir)
`frem`(→ _ods_ir)
`fsub`(→ _ods_ir)
`intr_trunc`(→ _ods_ir)
`intr_fake_use`(→ FakeUseOp)
`fence`(→ FenceOp)
`intr_frexp`(→ _ods_ir)
`freeze`(→ _ods_ir)
`intr_fshl`(→ _ods_ir)
`intr_fshr`(→ _ods_ir)
`getelementptr`(→ _ods_ir)
`intr_get_active_lane_mask`(→ _ods_ir)
`mlir_global_ctors`(→ GlobalCtorsOp)
`mlir_global_dtors`(→ GlobalDtorsOp)
`mlir_global`(→ GlobalOp)
`icmp`(→ _ods_ir)
`mlir_ifunc`(→ IFuncOp)
`indirectbr`(→ IndirectBrOp)
`inline_asm`(→ Union[_ods_ir, _ods_ir, InlineAsmOp])
`insertelement`(→ _ods_ir[_ods_ir])
`insertvalue`(→ _ods_ir)
`inttoptr`(→ _ods_ir)
`intr_invariant_end`(→ InvariantEndOp)
`intr_invariant_start`(→ _ods_ir)
`invoke`(→ Union[_ods_ir, _ods_ir, InvokeOp])
`intr_is_constant`(→ _ods_ir[_ods_ir])
`intr_is_fpclass`(→ _ods_ir)
`func`(→ LLVMFuncOp)
`lshr`(→ _ods_ir)
`landingpad`(→ _ods_ir)
`intr_launder_invariant_group`(→ _ods_ir)
`intr_lifetime_end`(→ LifetimeEndOp)
`intr_lifetime_start`(→ LifetimeStartOp)
`linker_options`(→ LinkerOptionsOp)
`intr_llrint`(→ _ods_ir)
`intr_llround`(→ _ods_ir)
`intr_ldexp`(→ _ods_ir)
`load`(→ _ods_ir)
`intr_log2`(→ _ods_ir)
`intr_log10`(→ _ods_ir)
`intr_log`(→ _ods_ir)
`intr_lrint`(→ _ods_ir)
`intr_lround`(→ _ods_ir)
`intr_masked_load`(→ _ods_ir[_ods_ir])
`intr_masked_store`(→ MaskedStoreOp)
`intr_matrix_column_major_load`(→ _ods_ir[_ods_ir])
`intr_matrix_column_major_store`(→ MatrixColumnMajorStoreOp)
`intr_matrix_multiply`(→ _ods_ir[_ods_ir])
`intr_matrix_transpose`(→ _ods_ir[_ods_ir])
`intr_maxnum`(→ _ods_ir)
`intr_maximum`(→ _ods_ir)
`intr_memcpy_inline`(→ MemcpyInlineOp)
`intr_memcpy`(→ MemcpyOp)
`intr_memmove`(→ MemmoveOp)
`intr_memset_inline`(→ MemsetInlineOp)
`intr_memset`(→ MemsetOp)
`intr_minnum`(→ _ods_ir)
`intr_minimum`(→ _ods_ir)
`module_flags`(→ ModuleFlagsOp)
`mul`(→ _ods_ir)
`named_metadata`(→ NamedMetadataOp)
`intr_nearbyint`(→ _ods_ir)
`intr_experimental_noalias_scope_decl`(→ NoAliasScopeDeclOp)
`mlir_none`(→ _ods_ir)
`or_`(→ _ods_ir)
`mlir_poison`(→ _ods_ir)
`intr_powi`(→ _ods_ir)
`intr_pow`(→ _ods_ir)
`intr_prefetch`(→ Prefetch)
`intr_ptr_annotation`(→ _ods_ir)
`intr_ptrmask`(→ _ods_ir)
`ptrtoaddr`(→ _ods_ir)
`ptrtoint`(→ _ods_ir)
`resume`(→ ResumeOp)
`return_`(→ ReturnOp)
`intr_rint`(→ _ods_ir)
`intr_roundeven`(→ _ods_ir)
`intr_round`(→ _ods_ir)
`intr_sadd_sat`(→ _ods_ir)
`intr_sadd_with_overflow`(→ _ods_ir)
`intr_scmp`(→ _ods_ir)
`sdiv`(→ _ods_ir)
`sext`(→ _ods_ir)
`sitofp`(→ _ods_ir)
`intr_smax`(→ _ods_ir)
`intr_smin`(→ _ods_ir)
`intr_smul_with_overflow`(→ _ods_ir)
`srem`(→ _ods_ir)
`intr_ssa_copy`(→ _ods_ir)
`intr_sshl_sat`(→ _ods_ir)
`intr_ssub_sat`(→ _ods_ir)
`intr_ssub_with_overflow`(→ _ods_ir)
`select`(→ _ods_ir)
`shl`(→ _ods_ir)
`shufflevector`(→ _ods_ir[_ods_ir])
`intr_sin`(→ _ods_ir)
`intr_sincos`(→ _ods_ir)
`intr_sinh`(→ _ods_ir)
`intr_sqrt`(→ _ods_ir)
`intr_stackrestore`(→ StackRestoreOp)
`intr_stacksave`(→ _ods_ir)
`intr_stepvector`(→ _ods_ir[_ods_ir])
`store`(→ StoreOp)
`intr_strip_invariant_group`(→ _ods_ir)
`sub`(→ _ods_ir)
`switch`(→ SwitchOp)
`intr_tan`(→ _ods_ir)
`intr_tanh`(→ _ods_ir)
`intr_threadlocal_address`(→ _ods_ir)
`intr_trap`(→ Trap)
`trunc`(→ _ods_ir)
`intr_uadd_sat`(→ _ods_ir)
`intr_uadd_with_overflow`(→ _ods_ir)
`intr_ubsantrap`(→ UBSanTrap)
`intr_ucmp`(→ _ods_ir)
`udiv`(→ _ods_ir)
`uitofp`(→ _ods_ir)
`intr_umax`(→ _ods_ir)
`intr_umin`(→ _ods_ir)
`intr_umul_with_overflow`(→ _ods_ir)
`urem`(→ _ods_ir)
`intr_ushl_sat`(→ _ods_ir)
`intr_usub_sat`(→ _ods_ir)
`intr_usub_with_overflow`(→ _ods_ir)
`mlir_undef`(→ _ods_ir)
`unreachable`(→ UnreachableOp)
`intr_vp_ashr`(→ _ods_ir)
`intr_vp_add`(→ _ods_ir)
`intr_vp_and`(→ _ods_ir)
`intr_vp_fadd`(→ _ods_ir)
`intr_vp_fdiv`(→ _ods_ir)
`intr_vp_fmuladd`(→ _ods_ir)
`intr_vp_fmul`(→ _ods_ir)
`intr_vp_fneg`(→ _ods_ir)
`intr_vp_fpext`(→ _ods_ir)
`intr_vp_fptosi`(→ _ods_ir)
`intr_vp_fptoui`(→ _ods_ir)
`intr_vp_fptrunc`(→ _ods_ir)
`intr_vp_frem`(→ _ods_ir)
`intr_vp_fsub`(→ _ods_ir)
`intr_vp_fma`(→ _ods_ir)
`intr_vp_inttoptr`(→ _ods_ir)
`intr_vp_lshr`(→ _ods_ir)
`intr_vp_load`(→ _ods_ir)
`intr_vp_merge`(→ _ods_ir)
`intr_vp_mul`(→ _ods_ir)
`intr_vp_or`(→ _ods_ir)
`intr_vp_ptrtoint`(→ _ods_ir)
`intr_vp_reduce_add`(→ _ods_ir)
`intr_vp_reduce_and`(→ _ods_ir)
`intr_vp_reduce_fadd`(→ _ods_ir)
`intr_vp_reduce_fmax`(→ _ods_ir)
`intr_vp_reduce_fmin`(→ _ods_ir)
`intr_vp_reduce_fmul`(→ _ods_ir)
`intr_vp_reduce_mul`(→ _ods_ir)
`intr_vp_reduce_or`(→ _ods_ir)
`intr_vp_reduce_smax`(→ _ods_ir)
`intr_vp_reduce_smin`(→ _ods_ir)
`intr_vp_reduce_umax`(→ _ods_ir)
`intr_vp_reduce_umin`(→ _ods_ir)
`intr_vp_reduce_xor`(→ _ods_ir)
`intr_vp_sdiv`(→ _ods_ir)
`intr_vp_sext`(→ _ods_ir)
`intr_vp_sitofp`(→ _ods_ir)
`intr_vp_smax`(→ _ods_ir)
`intr_vp_smin`(→ _ods_ir)
`intr_vp_srem`(→ _ods_ir)
`intr_vp_select`(→ _ods_ir)
`intr_vp_shl`(→ _ods_ir)
`intr_vp_store`(→ VPStoreOp)
`intr_experimental_vp_strided_load`(→ _ods_ir)
`intr_experimental_vp_strided_store`(→ VPStridedStoreOp)
`intr_vp_sub`(→ _ods_ir)
`intr_vp_trunc`(→ _ods_ir)
`intr_vp_udiv`(→ _ods_ir)
`intr_vp_uitofp`(→ _ods_ir)
`intr_vp_umax`(→ _ods_ir)
`intr_vp_umin`(→ _ods_ir)
`intr_vp_urem`(→ _ods_ir)
`intr_vp_xor`(→ _ods_ir)
`intr_vp_zext`(→ _ods_ir)
`va_arg`(→ _ods_ir)
`intr_vacopy`(→ VaCopyOp)
`intr_vaend`(→ VaEndOp)
`intr_vastart`(→ VaStartOp)
`intr_var_annotation`(→ VarAnnotation)
`xor`(→ _ods_ir)
`zext`(→ _ods_ir)
`mlir_zero`(→ _ods_ir)
`intr_masked_compressstore`(→ masked_compressstore)
`intr_masked_expandload`(→ _ods_ir)
`intr_masked_gather`(→ _ods_ir[_ods_ir])
`intr_masked_scatter`(→ masked_scatter)
`intr_vector_deinterleave2`(→ _ods_ir)
`intr_vector_extract`(→ _ods_ir[_ods_ir])
`intr_vector_insert`(→ _ods_ir[_ods_ir])
`intr_vector_interleave2`(→ _ods_ir)
`intr_vector_reduce_add`(→ _ods_ir)
`intr_vector_reduce_and`(→ _ods_ir)
`intr_vector_reduce_fadd`(→ _ods_ir)
`intr_vector_reduce_fmax`(→ _ods_ir)
`intr_vector_reduce_fmaximum`(→ _ods_ir)
`intr_vector_reduce_fmin`(→ _ods_ir)
`intr_vector_reduce_fminimum`(→ _ods_ir)
`intr_vector_reduce_fmul`(→ _ods_ir)
`intr_vector_reduce_mul`(→ _ods_ir)
`intr_vector_reduce_or`(→ _ods_ir)
`intr_vector_reduce_smax`(→ _ods_ir)
`intr_vector_reduce_smin`(→ _ods_ir)
`intr_vector_reduce_umax`(→ _ods_ir)
`intr_vector_reduce_umin`(→ _ods_ir)
`intr_vector_reduce_xor`(→ _ods_ir)
`intr_vscale`(→ _ods_ir)

Module Contents¶

mlir.dialects._llvm_ops_gen._ods_ir¶

mlir.dialects._llvm_ops_gen._Buffer¶

class mlir.dialects._llvm_ops_gen._Dialect¶

Bases: _ods_ir

DIALECT_NAMESPACE = 'llvm'¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.acos'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ACosOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.acos'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_acos(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AShrOp(lhs: _ods_ir, rhs: _ods_ir, *, isExact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.ashr'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AShrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.ashr'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

mlir.dialects._llvm_ops_gen.ashr(lhs: _ods_ir, rhs: _ods_ir, *, is_exact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.asin'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ASinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.asin'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_asin(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.atan2'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ATan2OpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.atan2'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_atan2(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.atan'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ATanOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.atan'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_atan(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AbsOp(res: _ods_ir, in_: _ods_ir, is_int_min_poison: bool | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.abs'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

is_int_min_poison() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AbsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.abs'¶

in_() → _ods_ir¶

is_int_min_poison() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_abs(res: _ods_ir, in_: _ods_ir, is_int_min_poison: bool | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddOp(lhs: _ods_ir, rhs: _ods_ir, overflowFlags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.add'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.add'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.add(lhs: _ods_ir, rhs: _ods_ir, overflow_flags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddrSpaceCastOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.addrspacecast'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddrSpaceCastOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.addrspacecast'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.addrspacecast(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddressOfOp(res: _ods_ir, global_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Creates an SSA value containing a pointer to a global value (function, variable or alias). The global value can be defined after its first referenced. If the global value is a constant, storing into it is not allowed.

Examples:

func @foo() {
  // Get the address of a global variable.
  %0 = llvm.mlir.addressof @const : !llvm.ptr

  // Use it as a regular pointer.
  %1 = llvm.load %0 : !llvm.ptr -> i32

  // Get the address of a function.
  %2 = llvm.mlir.addressof @foo : !llvm.ptr

  // The function address can be used for indirect calls.
  llvm.call %2() : !llvm.ptr, () -> ()

  // Get the address of an aliased global.
  %3 = llvm.mlir.addressof @const_alias : !llvm.ptr
}

// Define the global.
llvm.mlir.global @const(42 : i32) : i32

// Define an alias.
llvm.mlir.alias @const_alias : i32 {
  %0 = llvm.mlir.addressof @const : !llvm.ptr
  llvm.return %0 : !llvm.ptr
}

OPERATION_NAME = 'llvm.mlir.addressof'¶

_ODS_REGIONS = (0, True)¶

global_name() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AddressOfOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.addressof'¶

global_name() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_addressof(res: _ods_ir, global_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

llvm.mlir.alias is a top level operation that defines a global alias for global variables and functions. The operation is always initialized by using a initializer region which could be a direct map to another global value or contain some address computation on top of it.

It uses a symbol for its value, which will be uniqued by the module with respect to other symbols in it.

Similarly to functions and globals, they can also have a linkage attribute. This attribute is placed between llvm.mlir.alias and the symbol name. If the attribute is omitted, external linkage is assumed by default.

Examples:

// Global alias use @-identifiers.
llvm.mlir.alias external @foo_alias {addr_space = 0 : i32} : !llvm.ptr {
  %0 = llvm.mlir.addressof @some_function : !llvm.ptr
  llvm.return %0 : !llvm.ptr
}

// More complex initialization.
llvm.mlir.alias linkonce_odr hidden @glob
{addr_space = 0 : i32, dso_local} : !llvm.array<32 x i32> {
  %0 = llvm.mlir.constant(1234 : i64) : i64
  %1 = llvm.mlir.addressof @glob.private : !llvm.ptr
  %2 = llvm.ptrtoint %1 : !llvm.ptr to i64
  %3 = llvm.add %2, %0 : i64
  %4 = llvm.inttoptr %3 : i64 to !llvm.ptr
  llvm.return %4 : !llvm.ptr
}

OPERATION_NAME = 'llvm.mlir.alias'¶

_ODS_REGIONS = (1, True)¶

alias_type() → _ods_ir¶

sym_name() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

thread_local_() → bool¶

unnamed_addr() → _ods_ir | None¶

visibility_() → _ods_ir¶

initializer() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AliasOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.alias'¶

alias_type() → _ods_ir¶

sym_name() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

thread_local_() → bool¶

unnamed_addr() → _ods_ir | None¶

visibility_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_alias(alias_type: _ods_ir | _ods_ir, sym_name: str | _ods_ir, linkage: Any | _ods_ir, *, dso_local: bool | None = None, thread_local_: bool | None = None, unnamed_addr: Any | _ods_ir | None = None, visibility_: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → AliasOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.alloca'¶

_ODS_REGIONS = (0, True)¶

arraySize() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir | None¶

elem_type() → _ods_ir¶

inalloca() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AllocaOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.alloca'¶

arraySize() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir | None¶

elem_type() → _ods_ir¶

inalloca() → bool¶

mlir.dialects._llvm_ops_gen.alloca(res: _ods_ir, array_size: _ods_ir[_ods_ir], elem_type: _ods_ir | _ods_ir, *, alignment: int | _ods_ir | None = None, inalloca: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AndOp(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.and'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.and'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.and_(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Annotation(integer: _ods_ir[_ods_ir], annotation: _ods_ir, fileName: _ods_ir, line: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.annotation'¶

_ODS_REGIONS = (0, True)¶

integer() → _ods_ir[_ods_ir]¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.AnnotationAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.annotation'¶

integer() → _ods_ir[_ods_ir]¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_annotation(integer: _ods_ir[_ods_ir], annotation: _ods_ir, file_name: _ods_ir, line: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.AssumeOp(cond: _ods_ir[_ods_ir], op_bundle_operands: Sequence[_ods_ir], op_bundle_sizes: Sequence[int] | _ods_ir, *, op_bundle_tags: Sequence[_ods_ir] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.assume'¶

_ODS_REGIONS = (0, True)¶

cond() → _ods_ir[_ods_ir]¶

op_bundle_operands() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.AssumeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.assume'¶

cond() → _ods_ir[_ods_ir]¶

op_bundle_operands() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_assume(cond: _ods_ir[_ods_ir], op_bundle_operands: Sequence[_ods_ir], op_bundle_sizes: Sequence[int] | _ods_ir, *, op_bundle_tags: Sequence[_ods_ir] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → AssumeOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.cmpxchg'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

cmp() → _ods_ir¶

val() → _ods_ir¶

success_ordering() → _ods_ir¶

failure_ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

alignment() → _ods_ir | None¶

weak() → bool¶

volatile_() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AtomicCmpXchgOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.cmpxchg'¶

ptr() → _ods_ir¶

cmp() → _ods_ir¶

val() → _ods_ir¶

success_ordering() → _ods_ir¶

failure_ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

alignment() → _ods_ir | None¶

weak() → bool¶

volatile_() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.cmpxchg(ptr: _ods_ir, cmp: _ods_ir, val: _ods_ir, success_ordering: Any | _ods_ir, failure_ordering: Any | _ods_ir, *, syncscope: str | _ods_ir | None = None, alignment: int | _ods_ir | None = None, weak: bool | None = None, volatile_: bool | None = None, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.atomicrmw'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

val() → _ods_ir¶

bin_op() → _ods_ir¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.AtomicRMWOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.atomicrmw'¶

ptr() → _ods_ir¶

val() → _ods_ir¶

bin_op() → _ods_ir¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.atomicrmw(bin_op: Any | _ods_ir, ptr: _ods_ir, val: _ods_ir, ordering: Any | _ods_ir, *, syncscope: str | _ods_ir | None = None, alignment: int | _ods_ir | None = None, volatile_: bool | None = None, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BitReverseOp(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.bitreverse'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BitReverseOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.bitreverse'¶

in_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_bitreverse(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BitcastOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.bitcast'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BitcastOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.bitcast'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.bitcast(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BlockAddressOp(res: _ods_ir, block_addr: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Creates an SSA value containing a pointer to a basic block. The block address information (function and block) is given by the BlockAddressAttr attribute. This operation assumes an existing llvm.blocktag operation identifying an existing MLIR block within a function. Example:

llvm.mlir.global private @g() : !llvm.ptr {
  %0 = llvm.blockaddress <function = @fn, tag = <id = 0>> : !llvm.ptr
  llvm.return %0 : !llvm.ptr
}

llvm.func @fn() {
  llvm.br ^bb1
^bb1:  // pred: ^bb0
  llvm.blocktag <id = 0>
  llvm.return
}

OPERATION_NAME = 'llvm.blockaddress'¶

_ODS_REGIONS = (0, True)¶

block_addr() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BlockAddressOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.blockaddress'¶

block_addr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.blockaddress(res: _ods_ir, block_addr: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BlockTagOp(tag: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

This operation uses a tag to uniquely identify an MLIR block in a function. The same tag is used by llvm.blockaddress in order to compute the target address.

A given function should have at most one llvm.blocktag operation with a given tag. This operation cannot be used as a terminator.

Example:

llvm.func @f() -> !llvm.ptr {
  %addr = llvm.blockaddress <function = @f, tag = <id = 1>> : !llvm.ptr
  llvm.br ^bb1
^bb1:
  llvm.blocktag <id = 1>
  llvm.return %addr : !llvm.ptr
}

OPERATION_NAME = 'llvm.blocktag'¶

_ODS_REGIONS = (0, True)¶

tag() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.BlockTagOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.blocktag'¶

tag() → _ods_ir¶

mlir.dialects._llvm_ops_gen.blocktag(tag: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → BlockTagOp¶

class mlir.dialects._llvm_ops_gen.BrOp(destOperands: Sequence[_ods_ir], dest: _ods_ir, *, loop_annotation: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.br'¶

_ODS_REGIONS = (0, True)¶

destOperands() → _ods_ir¶

loop_annotation() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.BrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.br'¶

destOperands() → _ods_ir¶

loop_annotation() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.br(dest_operands: Sequence[_ods_ir], dest: _ods_ir, *, loop_annotation: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → BrOp¶

class mlir.dialects._llvm_ops_gen.ByteSwapOp(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.bswap'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ByteSwapOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.bswap'¶

in_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_bswap(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

Call the specified llvm intrinsic. If the intrinsic is overloaded, use the MLIR function type of this op to determine which intrinsic to call.

OPERATION_NAME = 'llvm.call_intrinsic'¶

_ODS_OPERAND_SEGMENTS¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

intrin() → _ods_ir¶

fastmathFlags() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

results_() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.CallIntrinsicOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.call_intrinsic'¶

args() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

intrin() → _ods_ir¶

fastmathFlags() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.call_intrinsic(results_: _ods_ir | None, intrin: str | _ods_ir, args: Sequence[_ods_ir], op_bundle_operands: Sequence[_ods_ir], op_bundle_sizes: Sequence[int] | _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, op_bundle_tags: Sequence[_ods_ir] | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir | _ods_ir | CallIntrinsicOp¶

Bases: _ods_ir

In LLVM IR, functions may return either 0 or 1 value. LLVM IR dialect implements this behavior by providing a variadic call operation for 0- and 1-result functions. Even though MLIR supports multi-result functions, LLVM IR dialect disallows them.

The call instruction supports both direct and indirect calls. Direct calls start with a function name (@-prefixed) and indirect calls start with an SSA value (%-prefixed). The direct callee, if present, is stored as a function attribute callee. For indirect calls, the callee is of !llvm.ptr type and is stored as the first value in callee_operands. If and only if the callee is a variadic function, the var_callee_type attribute must carry the variadic LLVM function type. The trailing type list contains the optional indirect callee type and the MLIR function type, which differs from the LLVM function type that uses an explicit void type to model functions that do not return a value.

If this operatin has the no_inline attribute, then this specific function call will never be inlined. The opposite behavior will occur if the call has always_inline attribute. The inline_hint attribute indicates that it is desirable to inline this function call.

Examples:

// Direct call without arguments and with one result.
%0 = llvm.call @foo() : () -> (f32)

// Direct call with arguments and without a result.
llvm.call @bar(%0) : (f32) -> ()

// Indirect call with an argument and without a result.
%1 = llvm.mlir.addressof @foo : !llvm.ptr
llvm.call %1(%0) : !llvm.ptr, (f32) -> ()

// Direct variadic call.
llvm.call @printf(%0, %1) vararg(!llvm.func<i32 (ptr, ...)>) : (!llvm.ptr, i32) -> i32

// Indirect variadic call
llvm.call %1(%0) vararg(!llvm.func<void (...)>) : !llvm.ptr, (i32) -> ()

OPERATION_NAME = 'llvm.call'¶

_ODS_OPERAND_SEGMENTS¶

_ODS_REGIONS = (0, True)¶

callee_operands() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

var_callee_type() → _ods_ir | None¶

callee() → _ods_ir | None¶

fastmathFlags() → _ods_ir¶

CConv() → _ods_ir¶

TailCallKind() → _ods_ir¶

memory_effects() → _ods_ir | None¶

convergent() → bool¶

no_unwind() → bool¶

will_return() → bool¶

noreturn() → bool¶

returns_twice() → bool¶

hot() → bool¶

cold() → bool¶

noduplicate() → bool¶

no_caller_saved_registers() → bool¶

nocallback() → bool¶

modular_format() → _ods_ir | None¶

nobuiltins() → _ods_ir | None¶

allocsize() → _ods_ir | None¶

optsize() → bool¶

minsize() → bool¶

builtin() → bool¶

nobuiltin() → bool¶

save_reg_params() → bool¶

zero_call_used_regs() → _ods_ir | None¶

trap_func_name() → _ods_ir | None¶

default_func_attrs() → _ods_ir | None¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

no_inline() → bool¶

always_inline() → bool¶

inline_hint() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

result() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.CallOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.call'¶

callee_operands() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

var_callee_type() → _ods_ir | None¶

callee() → _ods_ir | None¶

fastmathFlags() → _ods_ir¶

CConv() → _ods_ir¶

TailCallKind() → _ods_ir¶

memory_effects() → _ods_ir | None¶

convergent() → bool¶

no_unwind() → bool¶

will_return() → bool¶

noreturn() → bool¶

returns_twice() → bool¶

hot() → bool¶

cold() → bool¶

noduplicate() → bool¶

no_caller_saved_registers() → bool¶

nocallback() → bool¶

modular_format() → _ods_ir | None¶

nobuiltins() → _ods_ir | None¶

allocsize() → _ods_ir | None¶

optsize() → bool¶

minsize() → bool¶

builtin() → bool¶

nobuiltin() → bool¶

save_reg_params() → bool¶

zero_call_used_regs() → _ods_ir | None¶

trap_func_name() → _ods_ir | None¶

default_func_attrs() → _ods_ir | None¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

no_inline() → bool¶

always_inline() → bool¶

inline_hint() → bool¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.call(result: _ods_ir | None, callee_operands: Sequence[_ods_ir], op_bundle_operands: Sequence[_ods_ir], op_bundle_sizes: Sequence[int] | _ods_ir, *, var_callee_type: Any | _ods_ir | None = None, callee: str | _ods_ir | None = None, fastmath_flags: Any | _ods_ir | None = None, c_conv: Any | _ods_ir | None = None, tail_call_kind: Any | _ods_ir | None = None, memory_effects: Any | _ods_ir | None = None, convergent: bool | None = None, no_unwind: bool | None = None, will_return: bool | None = None, noreturn: bool | None = None, returns_twice: bool | None = None, hot: bool | None = None, cold: bool | None = None, noduplicate: bool | None = None, no_caller_saved_registers: bool | None = None, nocallback: bool | None = None, modular_format: str | _ods_ir | None = None, nobuiltins: Sequence[_ods_ir] | _ods_ir | None = None, allocsize: Sequence[int] | _ods_ir | None = None, optsize: bool | None = None, minsize: bool | None = None, builtin: bool | None = None, nobuiltin: bool | None = None, save_reg_params: bool | None = None, zero_call_used_regs: str | _ods_ir | None = None, trap_func_name: str | _ods_ir | None = None, default_func_attrs: dict | _ods_ir | None = None, op_bundle_tags: Sequence[_ods_ir] | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, no_inline: bool | None = None, always_inline: bool | None = None, inline_hint: bool | None = None, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir | _ods_ir | CallOp¶

class mlir.dialects._llvm_ops_gen.ComdatOp(sym_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Provides access to object file COMDAT section/group functionality.

Examples:

llvm.comdat @__llvm_comdat {
  llvm.comdat_selector @any any
}
llvm.mlir.global internal constant @has_any_comdat(1 : i64) comdat(@__llvm_comdat::@any) : i64

OPERATION_NAME = 'llvm.comdat'¶

_ODS_REGIONS = (1, True)¶

sym_name() → _ods_ir¶

body() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ComdatOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.comdat'¶

sym_name() → _ods_ir¶

mlir.dialects._llvm_ops_gen.comdat(sym_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → ComdatOp¶

class mlir.dialects._llvm_ops_gen.ComdatSelectorOp(sym_name: str | _ods_ir, comdat: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Provides access to object file COMDAT section/group functionality.

Examples:

llvm.comdat @__llvm_comdat {
  llvm.comdat_selector @any any
}
llvm.mlir.global internal constant @has_any_comdat(1 : i64) comdat(@__llvm_comdat::@any) : i64

OPERATION_NAME = 'llvm.comdat_selector'¶

_ODS_REGIONS = (0, True)¶

sym_name() → _ods_ir¶

comdat() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ComdatSelectorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.comdat_selector'¶

sym_name() → _ods_ir¶

comdat() → _ods_ir¶

mlir.dialects._llvm_ops_gen.comdat_selector(sym_name: str | _ods_ir, comdat: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → ComdatSelectorOp¶

class mlir.dialects._llvm_ops_gen.CondBrOp(condition: _ods_ir[_ods_ir], trueDestOperands: Sequence[_ods_ir], falseDestOperands: Sequence[_ods_ir], trueDest: _ods_ir, falseDest: _ods_ir, *, branch_weights: Sequence[int] | _ods_ir | None = None, loop_annotation: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.cond_br'¶

_ODS_OPERAND_SEGMENTS¶

_ODS_REGIONS = (0, True)¶

condition() → _ods_ir[_ods_ir]¶

trueDestOperands() → _ods_ir¶

falseDestOperands() → _ods_ir¶

branch_weights() → _ods_ir | None¶

loop_annotation() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.CondBrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.cond_br'¶

condition() → _ods_ir[_ods_ir]¶

trueDestOperands() → _ods_ir¶

falseDestOperands() → _ods_ir¶

branch_weights() → _ods_ir | None¶

loop_annotation() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.cond_br(condition: _ods_ir[_ods_ir], true_dest_operands: Sequence[_ods_ir], false_dest_operands: Sequence[_ods_ir], true_dest: _ods_ir, false_dest: _ods_ir, *, branch_weights: Sequence[int] | _ods_ir | None = None, loop_annotation: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → CondBrOp¶

class mlir.dialects._llvm_ops_gen.ConstantOp(res: _ods_ir, value: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Unlike LLVM IR, MLIR does not have first-class constant values. Therefore, all constants must be created as SSA values before being used in other operations. llvm.mlir.constant creates such values for scalars, vectors, strings, structs, and array of structs. It has a mandatory value attribute whose type depends on the type of the constant value. The type of the constant value must correspond to the attribute type converted to LLVM IR type.

When creating constant scalars, the value attribute must be either an integer attribute or a floating point attribute. The type of the attribute may be omitted for i64 and f64 types that are implied.

When creating constant vectors, the value attribute must be either an array attribute, a dense attribute, or a sparse attribute that contains integers or floats. The number of elements in the result vector must match the number of elements in the attribute.

When creating constant strings, the value attribute must be a string attribute. The type of the constant must be an LLVM array of ``i8``s, and the length of the array must match the length of the attribute.

When creating constant structs, the value attribute must be an array attribute that contains integers or floats. The type of the constant must be an LLVM struct type. The number of fields in the struct must match the number of elements in the attribute, and the type of each LLVM struct field must correspond to the type of the corresponding attribute element converted to LLVM IR.

When creating an array of structs, the value attribute must be an array attribute, itself containing zero, or undef, or array attributes for each potential nested array type, and the elements of the leaf array attributes for must match the struct element types or be zero or undef attributes.

Examples:

// Integer constant, internal i32 is mandatory
%0 = llvm.mlir.constant(42 : i32) : i32

// It's okay to omit i64.
%1 = llvm.mlir.constant(42) : i64

// Floating point constant.
%2 = llvm.mlir.constant(42.0 : f32) : f32

// Splat dense vector constant.
%3 = llvm.mlir.constant(dense<1.0> : vector<4xf32>) : vector<4xf32>

OPERATION_NAME = 'llvm.mlir.constant'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstantOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.constant'¶

value() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_constant(res: _ods_ir, value: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFAddIntr(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fadd'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFAddIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fadd'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fadd(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFDivIntr(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fdiv'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFDivIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fdiv'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fdiv(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMAIntr(arg_0: _ods_ir, arg_1: _ods_ir, arg_2: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fma'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

arg_2() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMAIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fma'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

arg_2() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fma(arg_0: _ods_ir, arg_1: _ods_ir, arg_2: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMulAddIntr(arg_0: _ods_ir, arg_1: _ods_ir, arg_2: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fmuladd'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

arg_2() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMulAddIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fmuladd'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

arg_2() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fmuladd(arg_0: _ods_ir, arg_1: _ods_ir, arg_2: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMulIntr(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fmul'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFMulIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fmul'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fmul(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFPExtIntr(res: _ods_ir, arg_0: _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fpext'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFPExtIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fpext'¶

arg_0() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fpext(res: _ods_ir, arg_0: _ods_ir, fp_exception_behavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFPTruncIntr(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fptrunc'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFPTruncIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fptrunc'¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fptrunc(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFRemIntr(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.frem'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFRemIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.frem'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_frem(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFSubIntr(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fsub'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedFSubIntrAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.fsub'¶

arg_0() → _ods_ir¶

arg_1() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_fsub(arg_0: _ods_ir, arg_1: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedSIToFP(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.sitofp'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedSIToFPAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.sitofp'¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_sitofp(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedUIToFP(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fpExceptionBehavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.uitofp'¶

_ODS_REGIONS = (0, True)¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ConstrainedUIToFPAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.constrained.uitofp'¶

arg_0() → _ods_ir¶

roundingmode() → _ods_ir¶

fpExceptionBehavior() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_constrained_uitofp(res: _ods_ir, arg_0: _ods_ir, roundingmode: Any | _ods_ir, fp_exception_behavior: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.copysign'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CopySignOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.copysign'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_copysign(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroAlignOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.align'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroAlignOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.align'¶

mlir.dialects._llvm_ops_gen.intr_coro_align(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroBeginOp(res: _ods_ir, token: _ods_ir, mem: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.begin'¶

_ODS_REGIONS = (0, True)¶

token() → _ods_ir¶

mem() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroBeginOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.begin'¶

token() → _ods_ir¶

mem() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_begin(res: _ods_ir, token: _ods_ir, mem: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroEndOp(res: _ods_ir, handle: _ods_ir, unwind: _ods_ir[_ods_ir], retvals: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.end'¶

_ODS_REGIONS = (0, True)¶

handle() → _ods_ir¶

unwind() → _ods_ir[_ods_ir]¶

retvals() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroEndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.end'¶

handle() → _ods_ir¶

unwind() → _ods_ir[_ods_ir]¶

retvals() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_end(res: _ods_ir, handle: _ods_ir, unwind: _ods_ir[_ods_ir], retvals: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroFreeOp(res: _ods_ir, id: _ods_ir, handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.free'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

handle() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroFreeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.free'¶

id() → _ods_ir¶

handle() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_free(res: _ods_ir, id: _ods_ir, handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroIdOp(res: _ods_ir, align: _ods_ir[_ods_ir], promise: _ods_ir, coroaddr: _ods_ir, fnaddrs: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.id'¶

_ODS_REGIONS = (0, True)¶

align() → _ods_ir[_ods_ir]¶

promise() → _ods_ir¶

coroaddr() → _ods_ir¶

fnaddrs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroIdOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.id'¶

align() → _ods_ir[_ods_ir]¶

promise() → _ods_ir¶

coroaddr() → _ods_ir¶

fnaddrs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_id(res: _ods_ir, align: _ods_ir[_ods_ir], promise: _ods_ir, coroaddr: _ods_ir, fnaddrs: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroPromiseOp(res: _ods_ir, handle: _ods_ir, align: _ods_ir[_ods_ir], from_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.promise'¶

_ODS_REGIONS = (0, True)¶

handle() → _ods_ir¶

align() → _ods_ir[_ods_ir]¶

from_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroPromiseOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.promise'¶

handle() → _ods_ir¶

align() → _ods_ir[_ods_ir]¶

from_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_coro_promise(res: _ods_ir, handle: _ods_ir, align: _ods_ir[_ods_ir], from_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroResumeOp(handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.resume'¶

_ODS_REGIONS = (0, True)¶

handle() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroResumeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.resume'¶

handle() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_resume(handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → CoroResumeOp¶

class mlir.dialects._llvm_ops_gen.CoroSaveOp(res: _ods_ir, handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.save'¶

_ODS_REGIONS = (0, True)¶

handle() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroSaveOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.save'¶

handle() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_coro_save(res: _ods_ir, handle: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroSizeOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.size'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroSizeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.size'¶

mlir.dialects._llvm_ops_gen.intr_coro_size(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroSuspendOp(res: _ods_ir, save: _ods_ir, final: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.suspend'¶

_ODS_REGIONS = (0, True)¶

save() → _ods_ir¶

final() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoroSuspendOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.coro.suspend'¶

save() → _ods_ir¶

final() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_coro_suspend(res: _ods_ir, save: _ods_ir, final: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cos'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CosOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cos'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_cos(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cosh'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CoshOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cosh'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_cosh(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CountLeadingZerosOp(in_: _ods_ir, is_zero_poison: bool | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ctlz'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

is_zero_poison() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CountLeadingZerosOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ctlz'¶

in_() → _ods_ir¶

is_zero_poison() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ctlz(in_: _ods_ir, is_zero_poison: bool | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CountTrailingZerosOp(in_: _ods_ir, is_zero_poison: bool | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cttz'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

is_zero_poison() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CountTrailingZerosOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.cttz'¶

in_() → _ods_ir¶

is_zero_poison() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_cttz(in_: _ods_ir, is_zero_poison: bool | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CtPopOp(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ctpop'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.CtPopOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ctpop'¶

in_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ctpop(in_: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.DSOLocalEquivalentOp(res: _ods_ir, function_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Creates an SSA value containing a pointer to a global value (function or alias to function). It represents a function which is functionally equivalent to a given function, but is always defined in the current linkage unit. The target function may not have extern_weak linkage.

Examples:

llvm.mlir.global external constant @const() : i64 {
  %0 = llvm.mlir.addressof @const : !llvm.ptr
  %1 = llvm.ptrtoint %0 : !llvm.ptr to i64
  %2 = llvm.dso_local_equivalent @func : !llvm.ptr
  %4 = llvm.ptrtoint %2 : !llvm.ptr to i64
  llvm.return %4 : i64
}

OPERATION_NAME = 'llvm.dso_local_equivalent'¶

_ODS_REGIONS = (0, True)¶

function_name() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.DSOLocalEquivalentOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.dso_local_equivalent'¶

function_name() → _ods_ir¶

mlir.dialects._llvm_ops_gen.dso_local_equivalent(res: _ods_ir, function_name: str | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.declare'¶

_ODS_REGIONS = (0, True)¶

addr() → _ods_ir¶

varInfo() → _ods_ir¶

locationExpr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.DbgDeclareOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.declare'¶

addr() → _ods_ir¶

varInfo() → _ods_ir¶

locationExpr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_dbg_declare(addr: _ods_ir, var_info: Any | _ods_ir, *, location_expr: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → DbgDeclareOp¶

class mlir.dialects._llvm_ops_gen.DbgLabelOp(label: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.label'¶

_ODS_REGIONS = (0, True)¶

label() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.DbgLabelOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.label'¶

label() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_dbg_label(label: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → DbgLabelOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.value'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir¶

varInfo() → _ods_ir¶

locationExpr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.DbgValueOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.dbg.value'¶

value() → _ods_ir¶

varInfo() → _ods_ir¶

locationExpr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_dbg_value(value: _ods_ir, var_info: Any | _ods_ir, *, location_expr: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → DbgValueOp¶

class mlir.dialects._llvm_ops_gen.DebugTrap(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.debugtrap'¶

_ODS_REGIONS = (0, True)¶

class mlir.dialects._llvm_ops_gen.DebugTrapAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.debugtrap'¶

mlir.dialects._llvm_ops_gen.intr_debugtrap(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → DebugTrap¶

class mlir.dialects._llvm_ops_gen.EhTypeidForOp(res: _ods_ir, type_info: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.eh.typeid.for'¶

_ODS_REGIONS = (0, True)¶

type_info() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.EhTypeidForOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.eh.typeid.for'¶

type_info() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_eh_typeid_for(res: _ods_ir, type_info: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp2'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Exp2OpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp2'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_exp2(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp10'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Exp10OpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp10'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_exp10(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.exp'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_exp(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExpectOp(val: _ods_ir[_ods_ir], expected: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.expect'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir[_ods_ir]¶

expected() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExpectOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.expect'¶

val() → _ods_ir[_ods_ir]¶

expected() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_expect(val: _ods_ir[_ods_ir], expected: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExpectWithProbabilityOp(val: _ods_ir[_ods_ir], expected: _ods_ir[_ods_ir], prob: float | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.expect.with.probability'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir[_ods_ir]¶

expected() → _ods_ir[_ods_ir]¶

prob() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExpectWithProbabilityOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.expect.with.probability'¶

val() → _ods_ir[_ods_ir]¶

expected() → _ods_ir[_ods_ir]¶

prob() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_expect_with_probability(val: _ods_ir[_ods_ir], expected: _ods_ir[_ods_ir], prob: float | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExtractElementOp(vector: _ods_ir[_ods_ir], position: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.extractelement'¶

_ODS_REGIONS = (0, True)¶

vector() → _ods_ir[_ods_ir]¶

position() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExtractElementOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.extractelement'¶

vector() → _ods_ir[_ods_ir]¶

position() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.extractelement(vector: _ods_ir[_ods_ir], position: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExtractValueOp(res: _ods_ir, container: _ods_ir, position: Sequence[int] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.extractvalue'¶

_ODS_REGIONS = (0, True)¶

container() → _ods_ir¶

position() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ExtractValueOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.extractvalue'¶

container() → _ods_ir¶

position() → _ods_ir¶

mlir.dialects._llvm_ops_gen.extractvalue(res: _ods_ir, container: _ods_ir, position: Sequence[int] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fabs'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FAbsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fabs'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fabs(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fadd'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fadd'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fadd(lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ceil'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FCeilOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ceil'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ceil(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fcmp'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

predicate() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FCmpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fcmp'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

predicate() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fcmp(predicate: Any | _ods_ir, lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fdiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fdiv'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fdiv(lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.floor'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FFloorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.floor'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_floor(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fma'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FMAOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fma'¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fma(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fmuladd'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FMulAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fmuladd'¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fmuladd(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fmul'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FMulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fmul'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fmul(lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fneg'¶

_ODS_REGIONS = (0, True)¶

operand() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FNegOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fneg'¶

operand() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fneg(operand: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPExtOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fpext'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fpext'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fpext(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPToSIOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptosi'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPToSIOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptosi'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fptosi(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPToUIOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptoui'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPToUIOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptoui'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fptoui(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPTruncOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptrunc'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FPTruncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fptrunc'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fptrunc(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.frem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FRemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.frem'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.frem(lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fsub'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FSubOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fsub'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.fsub(lhs: _ods_ir, rhs: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.trunc'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FTruncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.trunc'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_trunc(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FakeUseOp(args: Sequence[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fake.use'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FakeUseOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fake.use'¶

args() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fake_use(args: Sequence[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → FakeUseOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fence'¶

_ODS_REGIONS = (0, True)¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.FenceOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.fence'¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.fence(ordering: Any | _ods_ir, *, syncscope: str | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → FenceOp¶

class mlir.dialects._llvm_ops_gen.FractionExpOp(res: _ods_ir, val: _ods_ir, *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.frexp'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FractionExpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.frexp'¶

val() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_frexp(res: _ods_ir, val: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FreezeOp(val: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.freeze'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FreezeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.freeze'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.freeze(val: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FshlOp(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fshl'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FshlOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fshl'¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fshl(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FshrOp(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fshr'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.FshrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.fshr'¶

a() → _ods_ir¶

b() → _ods_ir¶

c() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_fshr(a: _ods_ir, b: _ods_ir, c: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GEPOp(res: _ods_ir, base: _ods_ir, dynamicIndices: Sequence[_ods_ir], rawConstantIndices: Sequence[int] | _ods_ir, elem_type: _ods_ir | _ods_ir, noWrapFlags, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

This operation mirrors LLVM IRs ‘getelementptr’ operation that is used to perform pointer arithmetic.

Like in LLVM IR, it is possible to use both constants as well as SSA values as indices. In the case of indexing within a structure, it is required to either use constant indices directly, or supply a constant SSA value.

The no-wrap flags can be used to specify the low-level pointer arithmetic overflow behavior that LLVM uses after lowering the operation to LLVM IR. Valid options include ‘inbounds’ (pointer arithmetic must be within object bounds), ‘nusw’ (no unsigned signed wrap), and ‘nuw’ (no unsigned wrap). Note that ‘inbounds’ implies ‘nusw’ which is ensured by the enum definition. The flags can be set individually or in combination.

Examples:

// GEP with an SSA value offset
%0 = llvm.getelementptr %1[%2] : (!llvm.ptr, i64) -> !llvm.ptr, f32

// GEP with a constant offset and the inbounds attribute set
%0 = llvm.getelementptr inbounds %1[3] : (!llvm.ptr) -> !llvm.ptr, f32

// GEP with constant offsets into a structure
%0 = llvm.getelementptr %1[0, 1]
   : (!llvm.ptr) -> !llvm.ptr, !llvm.struct<(i32, f32)>

OPERATION_NAME = 'llvm.getelementptr'¶

_ODS_REGIONS = (0, True)¶

base() → _ods_ir¶

dynamicIndices() → _ods_ir¶

rawConstantIndices() → _ods_ir¶

elem_type() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GEPOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.getelementptr'¶

base() → _ods_ir¶

dynamicIndices() → _ods_ir¶

rawConstantIndices() → _ods_ir¶

elem_type() → _ods_ir¶

mlir.dialects._llvm_ops_gen.getelementptr(res: _ods_ir, base: _ods_ir, dynamic_indices: Sequence[_ods_ir], raw_constant_indices: Sequence[int] | _ods_ir, elem_type: _ods_ir | _ods_ir, no_wrap_flags, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GetActiveLaneMaskOp(res: _ods_ir, base: _ods_ir[_ods_ir], n: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.get.active.lane.mask'¶

_ODS_REGIONS = (0, True)¶

base() → _ods_ir[_ods_ir]¶

n() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GetActiveLaneMaskOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.get.active.lane.mask'¶

base() → _ods_ir[_ods_ir]¶

n() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_get_active_lane_mask(res: _ods_ir, base: _ods_ir[_ods_ir], n: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

Specifies a list of constructor functions, priorities, and associated data. The functions referenced by this array will be called in ascending order of priority (i.e. lowest first) when the module is loaded. The order of functions with the same priority is not defined. This operation is translated to LLVM’s global_ctors global variable. The initializer functions are run at load time. However, if the associated data is not #llvm.zero, functions only run if the data is not discarded.

Examples:

llvm.func @ctor() {
  ...
  llvm.return
}
llvm.mlir.global_ctors ctors = [@ctor], priorities = [0],
                               data = [#llvm.zero]

OPERATION_NAME = 'llvm.mlir.global_ctors'¶

_ODS_REGIONS = (0, True)¶

ctors() → _ods_ir¶

priorities() → _ods_ir¶

data() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GlobalCtorsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.global_ctors'¶

ctors() → _ods_ir¶

priorities() → _ods_ir¶

data() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_global_ctors(ctors: Sequence[str] | _ods_ir, priorities: Sequence[int] | _ods_ir, data: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → GlobalCtorsOp¶

Bases: _ods_ir

Specifies a list of destructor functions and priorities. The functions referenced by this array will be called in descending order of priority (i.e. highest first) when the module is unloaded. The order of functions with the same priority is not defined. This operation is translated to LLVM’s global_dtors global variable. The destruction functions are run at load time. However, if the associated data is not #llvm.zero, functions only run if the data is not discarded.

Examples:

llvm.func @dtor() {
  llvm.return
}
llvm.mlir.global_dtors dtors = [@dtor], priorities = [0],
                               data = [#llvm.zero]

OPERATION_NAME = 'llvm.mlir.global_dtors'¶

_ODS_REGIONS = (0, True)¶

dtors() → _ods_ir¶

priorities() → _ods_ir¶

data() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GlobalDtorsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.global_dtors'¶

dtors() → _ods_ir¶

priorities() → _ods_ir¶

data() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_global_dtors(dtors: Sequence[str] | _ods_ir, priorities: Sequence[int] | _ods_ir, data: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → GlobalDtorsOp¶

Bases: _ods_ir

Since MLIR allows for arbitrary operations to be present at the top level, global variables are defined using the llvm.mlir.global operation. Both global constants and variables can be defined, and the value may also be initialized in both cases.

There are two forms of initialization syntax. Simple constants that can be represented as MLIR attributes can be given in-line:

llvm.mlir.global @variable(32.0 : f32) : f32

This initialization and type syntax is similar to llvm.mlir.constant and may use two types: one for MLIR attribute and another for the LLVM value. These types must be compatible.

More complex constants that cannot be represented as MLIR attributes can be given in an initializer region:

// This global is initialized with the equivalent of:
//   i32* getelementptr (i32* @g2, i32 2)
llvm.mlir.global constant @int_gep() : !llvm.ptr {
  %0 = llvm.mlir.addressof @g2 : !llvm.ptr
  %1 = llvm.mlir.constant(2 : i32) : i32
  %2 = llvm.getelementptr %0[%1]
     : (!llvm.ptr, i32) -> !llvm.ptr, i32
  // The initializer region must end with `llvm.return`.
  llvm.return %2 : !llvm.ptr
}

Only one of the initializer attribute or initializer region may be provided.

llvm.mlir.global must appear at top-level of the enclosing module. It uses an @-identifier for its value, which will be uniqued by the module with respect to other @-identifiers in it.

Examples:

// Global values use @-identifiers.
llvm.mlir.global constant @cst(42 : i32) : i32

// Non-constant values must also be initialized.
llvm.mlir.global @variable(32.0 : f32) : f32

// Strings are expected to be of wrapped LLVM i8 array type and do not
// automatically include the trailing zero.
llvm.mlir.global @string("abc") : !llvm.array<3 x i8>

// For strings globals, the trailing type may be omitted.
llvm.mlir.global constant @no_trailing_type("foo bar")

// A complex initializer is constructed with an initializer region.
llvm.mlir.global constant @int_gep() : !llvm.ptr {
  %0 = llvm.mlir.addressof @g2 : !llvm.ptr
  %1 = llvm.mlir.constant(2 : i32) : i32
  %2 = llvm.getelementptr %0[%1]
     : (!llvm.ptr, i32) -> !llvm.ptr, i32
  llvm.return %2 : !llvm.ptr
}

Similarly to functions, globals have a linkage attribute. In the custom syntax, this attribute is placed between llvm.mlir.global and the optional constant keyword. If the attribute is omitted, external linkage is assumed by default.

Examples:

// A constant with internal linkage will not participate in linking.
llvm.mlir.global internal constant @cst(42 : i32) : i32

// By default, "external" linkage is assumed and the global participates in
// symbol resolution at link-time.
llvm.mlir.global @glob(0 : f32) : f32

// Alignment is optional
llvm.mlir.global private constant @y(dense<1.0> : tensor<8xf32>) : !llvm.array<8 x f32>

Like global variables in LLVM IR, globals can have an (optional) alignment attribute using keyword alignment. The integer value of the alignment must be a positive integer that is a power of 2.

Examples:

// Alignment is optional
llvm.mlir.global private constant @y(dense<1.0> : tensor<8xf32>) { alignment = 32 : i64 } : !llvm.array<8 x f32>

The target_specific_attrs attribute provides a mechanism to preserve target-specific LLVM IR attributes that are not explicitly modeled in the LLVM dialect.

The attribute is an array containing either string attributes or two-element array attributes of strings. The value of a standalone string attribute is interpreted as the name of an LLVM IR attribute on the global. A two-element array is interpreted as a key-value pair.

Example:

llvm.mlir.global external @example() {
  target_specific_attrs = ["value-less-attr", ["int-attr", "4"], ["string-attr", "string"]]} : f64

OPERATION_NAME = 'llvm.mlir.global'¶

_ODS_REGIONS = (1, True)¶

global_type() → _ods_ir¶

constant() → bool¶

sym_name() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

thread_local_() → bool¶

externally_initialized() → bool¶

value() → _ods_ir | None¶

alignment() → _ods_ir | None¶

addr_space() → _ods_ir¶

unnamed_addr() → _ods_ir | None¶

section() → _ods_ir | None¶

comdat() → _ods_ir | None¶

dbg_exprs() → _ods_ir | None¶

visibility_() → _ods_ir¶

target_specific_attrs() → _ods_ir | None¶

initializer() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.GlobalOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.global'¶

global_type() → _ods_ir¶

constant() → bool¶

sym_name() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

thread_local_() → bool¶

externally_initialized() → bool¶

value() → _ods_ir | None¶

alignment() → _ods_ir | None¶

addr_space() → _ods_ir¶

unnamed_addr() → _ods_ir | None¶

section() → _ods_ir | None¶

comdat() → _ods_ir | None¶

dbg_exprs() → _ods_ir | None¶

visibility_() → _ods_ir¶

target_specific_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.mlir_global(global_type: _ods_ir | _ods_ir, sym_name: str | _ods_ir, linkage: Any | _ods_ir, *, constant: bool | None = None, dso_local: bool | None = None, thread_local_: bool | None = None, externally_initialized: bool | None = None, value: Any | _ods_ir | None = None, alignment: int | _ods_ir | None = None, addr_space: int | _ods_ir | None = None, unnamed_addr: Any | _ods_ir | None = None, section: str | _ods_ir | None = None, comdat: str | _ods_ir | None = None, dbg_exprs: Any | _ods_ir | None = None, visibility_: Any | _ods_ir | None = None, target_specific_attrs: Sequence[_ods_ir] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → GlobalOp¶

class mlir.dialects._llvm_ops_gen.ICmpOp(predicate: Any | _ods_ir, lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.icmp'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

predicate() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ICmpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.icmp'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

predicate() → _ods_ir¶

mlir.dialects._llvm_ops_gen.icmp(predicate: Any | _ods_ir, lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

llvm.mlir.ifunc is a top level operation that defines a global ifunc. It defines a new symbol and takes a symbol refering to a resolver function. IFuncs can be called as regular functions. The function type is the same as the IFuncType. The symbol is resolved at runtime by calling a resolver function.

Examples:

// IFuncs resolve a symbol at runtime using a resovler function.
llvm.mlir.ifunc external @foo: !llvm.func<f32 (i64)>, !llvm.ptr @resolver

llvm.func @foo_1(i64) -> f32
llvm.func @foo_2(i64) -> f32

llvm.func @resolve_foo() -> !llvm.ptr attributes {
  %0 = llvm.mlir.addressof @foo_2 : !llvm.ptr
  %1 = llvm.mlir.addressof @foo_1 : !llvm.ptr

  // ... Logic selecting from foo_{1, 2}

  // Return function pointer to the selected function
  llvm.return %7 : !llvm.ptr
}

llvm.func @use_foo() {
  // IFuncs are called as regular functions
  %res = llvm.call @foo(%value) : i64 -> f32
}

OPERATION_NAME = 'llvm.mlir.ifunc'¶

_ODS_REGIONS = (0, True)¶

sym_name() → _ods_ir¶

i_func_type() → _ods_ir¶

resolver() → _ods_ir¶

resolver_type() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

address_space() → _ods_ir¶

unnamed_addr() → _ods_ir¶

visibility_() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.IFuncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.ifunc'¶

sym_name() → _ods_ir¶

i_func_type() → _ods_ir¶

resolver() → _ods_ir¶

resolver_type() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

address_space() → _ods_ir¶

unnamed_addr() → _ods_ir¶

visibility_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mlir_ifunc(sym_name: str | _ods_ir, i_func_type: _ods_ir | _ods_ir, resolver: str | _ods_ir, resolver_type: _ods_ir | _ods_ir, linkage: Any | _ods_ir, *, dso_local: bool | None = None, address_space: int | _ods_ir | None = None, unnamed_addr: Any | _ods_ir | None = None, visibility_: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → IFuncOp¶

class mlir.dialects._llvm_ops_gen.IndirectBrOp(addr: _ods_ir, succOperands: Sequence[_ods_ir], indbr_operand_segments: Sequence[int] | _ods_ir, successors: Sequence[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Transfer control flow to address in $addr. A list of possible target blocks in $successors can be provided and maybe used as a hint in LLVM:

...
llvm.func @g(...
  %dest = llvm.blockaddress <function = @g, tag = <id = 0>> : !llvm.ptr
  llvm.indirectbr %dest : !llvm.ptr, [
    ^head
  ]
^head:
  llvm.blocktag <id = 0>
  llvm.return %arg0 : i32
  ...

It also supports a list of operands that can be passed to a target block:

  llvm.indirectbr %dest : !llvm.ptr, [
    ^head(%arg0 : i32),
    ^tail(%arg1, %arg0 : i32, i32)
  ]
^head(%r0 : i32):
  llvm.return %r0 : i32
^tail(%r1 : i32, %r2 : i32):
  ...

OPERATION_NAME = 'llvm.indirectbr'¶

_ODS_REGIONS = (0, True)¶

addr() → _ods_ir¶

succOperands() → _ods_ir¶

indbr_operand_segments() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.IndirectBrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.indirectbr'¶

addr() → _ods_ir¶

succOperands() → _ods_ir¶

indbr_operand_segments() → _ods_ir¶

mlir.dialects._llvm_ops_gen.indirectbr(addr: _ods_ir, succ_operands: Sequence[_ods_ir], indbr_operand_segments: Sequence[int] | _ods_ir, successors: Sequence[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → IndirectBrOp¶

Bases: _ods_ir

The InlineAsmOp mirrors the underlying LLVM semantics with a notable exception: the embedded asm_string is not allowed to define or reference any symbol or any global variable: only the operands of the op may be read, written, or referenced. Attempting to define or reference any symbol or any global behavior is considered undefined behavior at this time. If tail_call_kind is used, the operation behaves like the specified tail call kind. The musttail kind it’s not available for this operation, since it isn’t supported by LLVM’s inline asm.

OPERATION_NAME = 'llvm.inline_asm'¶

_ODS_REGIONS = (0, True)¶

operands_() → _ods_ir¶

asm_string() → _ods_ir¶

constraints() → _ods_ir¶

has_side_effects() → bool¶

is_align_stack() → bool¶

tail_call_kind() → _ods_ir¶

asm_dialect() → _ods_ir | None¶

operand_attrs() → _ods_ir | None¶

res() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.InlineAsmOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.inline_asm'¶

operands_() → _ods_ir¶

asm_string() → _ods_ir¶

constraints() → _ods_ir¶

has_side_effects() → bool¶

is_align_stack() → bool¶

tail_call_kind() → _ods_ir¶

asm_dialect() → _ods_ir | None¶

operand_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.inline_asm(res: _ods_ir | None, operands_: Sequence[_ods_ir], asm_string: str | _ods_ir, constraints: str | _ods_ir, *, has_side_effects: bool | None = None, is_align_stack: bool | None = None, tail_call_kind: Any | _ods_ir | None = None, asm_dialect: Any | _ods_ir | None = None, operand_attrs: Sequence[_ods_ir] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir | _ods_ir | InlineAsmOp¶

class mlir.dialects._llvm_ops_gen.InsertElementOp(vector: _ods_ir[_ods_ir], value: _ods_ir, position: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.insertelement'¶

_ODS_REGIONS = (0, True)¶

vector() → _ods_ir[_ods_ir]¶

value() → _ods_ir¶

position() → _ods_ir[_ods_ir]¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.InsertElementOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.insertelement'¶

vector() → _ods_ir[_ods_ir]¶

value() → _ods_ir¶

position() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.insertelement(vector: _ods_ir[_ods_ir], value: _ods_ir, position: _ods_ir[_ods_ir], *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.InsertValueOp(container: _ods_ir, value: _ods_ir, position: Sequence[int] | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.insertvalue'¶

_ODS_REGIONS = (0, True)¶

container() → _ods_ir¶

value() → _ods_ir¶

position() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.InsertValueOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.insertvalue'¶

container() → _ods_ir¶

value() → _ods_ir¶

position() → _ods_ir¶

mlir.dialects._llvm_ops_gen.insertvalue(container: _ods_ir, value: _ods_ir, position: Sequence[int] | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.IntToPtrOp(res: _ods_ir, arg: _ods_ir, *, dereferenceable: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.inttoptr'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

dereferenceable() → _ods_ir | None¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.IntToPtrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.inttoptr'¶

arg() → _ods_ir¶

dereferenceable() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.inttoptr(res: _ods_ir, arg: _ods_ir, *, dereferenceable: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.InvariantEndOp(start: _ods_ir, size: int | _ods_ir, ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.invariant.end'¶

_ODS_REGIONS = (0, True)¶

start() → _ods_ir¶

ptr() → _ods_ir¶

size() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.InvariantEndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.invariant.end'¶

start() → _ods_ir¶

ptr() → _ods_ir¶

size() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_invariant_end(start: _ods_ir, size: int | _ods_ir, ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → InvariantEndOp¶

class mlir.dialects._llvm_ops_gen.InvariantStartOp(size: int | _ods_ir, ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.invariant.start'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

size() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.InvariantStartOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.invariant.start'¶

ptr() → _ods_ir¶

size() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_invariant_start(size: int | _ods_ir, ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.invoke'¶

_ODS_OPERAND_SEGMENTS¶

_ODS_REGIONS = (0, True)¶

callee_operands() → _ods_ir¶

normalDestOperands() → _ods_ir¶

unwindDestOperands() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

var_callee_type() → _ods_ir | None¶

callee() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

branch_weights() → _ods_ir | None¶

CConv() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

result() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.InvokeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.invoke'¶

callee_operands() → _ods_ir¶

normalDestOperands() → _ods_ir¶

unwindDestOperands() → _ods_ir¶

op_bundle_operands() → _ods_ir¶

var_callee_type() → _ods_ir | None¶

callee() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

branch_weights() → _ods_ir | None¶

CConv() → _ods_ir¶

op_bundle_sizes() → _ods_ir¶

op_bundle_tags() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.invoke(result: _ods_ir | None, callee_operands: Sequence[_ods_ir], normal_dest_operands: Sequence[_ods_ir], unwind_dest_operands: Sequence[_ods_ir], op_bundle_operands: Sequence[_ods_ir], op_bundle_sizes: Sequence[int] | _ods_ir, normal_dest: _ods_ir, unwind_dest: _ods_ir, *, var_callee_type: Any | _ods_ir | None = None, callee: str | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, branch_weights: Sequence[int] | _ods_ir | None = None, c_conv: Any | _ods_ir | None = None, op_bundle_tags: Sequence[_ods_ir] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir | _ods_ir | InvokeOp¶

class mlir.dialects._llvm_ops_gen.IsConstantOp(val: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.is.constant'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.IsConstantOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.is.constant'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_is_constant(val: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.IsFPClass(res: _ods_ir, in_: _ods_ir, bit: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.is.fpclass'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

bit() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.IsFPClassAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.is.fpclass'¶

in_() → _ods_ir¶

bit() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_is_fpclass(res: _ods_ir, in_: _ods_ir, bit: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

MLIR functions are defined by an operation that is not built into the IR itself. The LLVM dialect provides an llvm.func operation to define functions compatible with LLVM IR. These functions have LLVM dialect function type but use MLIR syntax to express it. They are required to have exactly one result type. LLVM function operation is intended to capture additional properties of LLVM functions, such as linkage and calling convention, that may be modeled differently by the built-in MLIR function.

// The type of @bar is !llvm<"i64 (i64)">
llvm.func @bar(%arg0: i64) -> i64 {
  llvm.return %arg0 : i64
}

// Type type of @foo is !llvm<"void (i64)">
// !llvm.void type is omitted
llvm.func @foo(%arg0: i64) {
  llvm.return
}

// A function with `internal` linkage.
llvm.func internal @internal_func() {
  llvm.return
}

OPERATION_NAME = 'llvm.func'¶

_ODS_REGIONS = (1, True)¶

sym_name() → _ods_ir¶

sym_visibility() → _ods_ir | None¶

function_type() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

CConv() → _ods_ir¶

comdat() → _ods_ir | None¶

convergent() → bool¶

personality() → _ods_ir | None¶

garbageCollector() → _ods_ir | None¶

passthrough() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

function_entry_count() → _ods_ir | None¶

memory_effects() → _ods_ir | None¶

visibility_() → _ods_ir¶

arm_streaming() → bool¶

arm_locally_streaming() → bool¶

arm_streaming_compatible() → bool¶

arm_new_za() → bool¶

arm_in_za() → bool¶

arm_out_za() → bool¶

arm_inout_za() → bool¶

arm_preserves_za() → bool¶

section() → _ods_ir | None¶

unnamed_addr() → _ods_ir | None¶

alignment() → _ods_ir | None¶

vscale_range() → _ods_ir | None¶

frame_pointer() → _ods_ir | None¶

target_cpu() → _ods_ir | None¶

tune_cpu() → _ods_ir | None¶

reciprocal_estimates() → _ods_ir | None¶

prefer_vector_width() → _ods_ir | None¶

target_features() → _ods_ir | None¶

no_signed_zeros_fp_math() → _ods_ir | None¶

denormal_fpenv() → _ods_ir | None¶

fp_contract() → _ods_ir | None¶

instrument_function_entry() → _ods_ir | None¶

instrument_function_exit() → _ods_ir | None¶

no_inline() → bool¶

always_inline() → bool¶

inline_hint() → bool¶

no_unwind() → bool¶

will_return() → bool¶

noreturn() → bool¶

optimize_none() → bool¶

returns_twice() → bool¶

hot() → bool¶

cold() → bool¶

noduplicate() → bool¶

no_caller_saved_registers() → bool¶

nocallback() → bool¶

modular_format() → _ods_ir | None¶

nobuiltins() → _ods_ir | None¶

allocsize() → _ods_ir | None¶

optsize() → bool¶

minsize() → bool¶

save_reg_params() → bool¶

zero_call_used_regs() → _ods_ir | None¶

default_func_attrs() → _ods_ir | None¶

vec_type_hint() → _ods_ir | None¶

work_group_size_hint() → _ods_ir | None¶

reqd_work_group_size() → _ods_ir | None¶

intel_reqd_sub_group_size() → _ods_ir | None¶

uwtable_kind() → _ods_ir | None¶

use_sample_profile() → _ods_ir | None¶

body() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LLVMFuncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.func'¶

sym_name() → _ods_ir¶

sym_visibility() → _ods_ir | None¶

function_type() → _ods_ir¶

linkage() → _ods_ir¶

dso_local() → bool¶

CConv() → _ods_ir¶

comdat() → _ods_ir | None¶

convergent() → bool¶

personality() → _ods_ir | None¶

garbageCollector() → _ods_ir | None¶

passthrough() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

function_entry_count() → _ods_ir | None¶

memory_effects() → _ods_ir | None¶

visibility_() → _ods_ir¶

arm_streaming() → bool¶

arm_locally_streaming() → bool¶

arm_streaming_compatible() → bool¶

arm_new_za() → bool¶

arm_in_za() → bool¶

arm_out_za() → bool¶

arm_inout_za() → bool¶

arm_preserves_za() → bool¶

section() → _ods_ir | None¶

unnamed_addr() → _ods_ir | None¶

alignment() → _ods_ir | None¶

vscale_range() → _ods_ir | None¶

frame_pointer() → _ods_ir | None¶

target_cpu() → _ods_ir | None¶

tune_cpu() → _ods_ir | None¶

reciprocal_estimates() → _ods_ir | None¶

prefer_vector_width() → _ods_ir | None¶

target_features() → _ods_ir | None¶

no_signed_zeros_fp_math() → _ods_ir | None¶

denormal_fpenv() → _ods_ir | None¶

fp_contract() → _ods_ir | None¶

instrument_function_entry() → _ods_ir | None¶

instrument_function_exit() → _ods_ir | None¶

no_inline() → bool¶

always_inline() → bool¶

inline_hint() → bool¶

no_unwind() → bool¶

will_return() → bool¶

noreturn() → bool¶

optimize_none() → bool¶

returns_twice() → bool¶

hot() → bool¶

cold() → bool¶

noduplicate() → bool¶

no_caller_saved_registers() → bool¶

nocallback() → bool¶

modular_format() → _ods_ir | None¶

nobuiltins() → _ods_ir | None¶

allocsize() → _ods_ir | None¶

optsize() → bool¶

minsize() → bool¶

save_reg_params() → bool¶

zero_call_used_regs() → _ods_ir | None¶

default_func_attrs() → _ods_ir | None¶

vec_type_hint() → _ods_ir | None¶

work_group_size_hint() → _ods_ir | None¶

reqd_work_group_size() → _ods_ir | None¶

intel_reqd_sub_group_size() → _ods_ir | None¶

uwtable_kind() → _ods_ir | None¶

use_sample_profile() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.func(sym_name: str | _ods_ir, function_type: Any | _ods_ir, *, sym_visibility: str | _ods_ir | None = None, linkage: Any | _ods_ir | None = None, dso_local: bool | None = None, c_conv: Any | _ods_ir | None = None, comdat: str | _ods_ir | None = None, convergent: bool | None = None, personality: str | _ods_ir | None = None, garbage_collector: str | _ods_ir | None = None, passthrough: Sequence[_ods_ir] | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, function_entry_count: int | _ods_ir | None = None, memory_effects: Any | _ods_ir | None = None, visibility_: Any | _ods_ir | None = None, arm_streaming: bool | None = None, arm_locally_streaming: bool | None = None, arm_streaming_compatible: bool | None = None, arm_new_za: bool | None = None, arm_in_za: bool | None = None, arm_out_za: bool | None = None, arm_inout_za: bool | None = None, arm_preserves_za: bool | None = None, section: str | _ods_ir | None = None, unnamed_addr: Any | _ods_ir | None = None, alignment: int | _ods_ir | None = None, vscale_range: Any | _ods_ir | None = None, frame_pointer: Any | _ods_ir | None = None, target_cpu: str | _ods_ir | None = None, tune_cpu: str | _ods_ir | None = None, reciprocal_estimates: str | _ods_ir | None = None, prefer_vector_width: str | _ods_ir | None = None, target_features: Any | _ods_ir | None = None, no_signed_zeros_fp_math: bool | _ods_ir | None = None, denormal_fpenv: Any | _ods_ir | None = None, fp_contract: str | _ods_ir | None = None, instrument_function_entry: str | _ods_ir | None = None, instrument_function_exit: str | _ods_ir | None = None, no_inline: bool | None = None, always_inline: bool | None = None, inline_hint: bool | None = None, no_unwind: bool | None = None, will_return: bool | None = None, noreturn: bool | None = None, optimize_none: bool | None = None, returns_twice: bool | None = None, hot: bool | None = None, cold: bool | None = None, noduplicate: bool | None = None, no_caller_saved_registers: bool | None = None, nocallback: bool | None = None, modular_format: str | _ods_ir | None = None, nobuiltins: Sequence[_ods_ir] | _ods_ir | None = None, allocsize: Sequence[int] | _ods_ir | None = None, optsize: bool | None = None, minsize: bool | None = None, save_reg_params: bool | None = None, zero_call_used_regs: str | _ods_ir | None = None, default_func_attrs: dict | _ods_ir | None = None, vec_type_hint: Any | _ods_ir | None = None, work_group_size_hint: Sequence[int] | _ods_ir | None = None, reqd_work_group_size: Sequence[int] | _ods_ir | None = None, intel_reqd_sub_group_size: int | _ods_ir | None = None, uwtable_kind: Any | _ods_ir | None = None, use_sample_profile: bool | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → LLVMFuncOp¶

class mlir.dialects._llvm_ops_gen.LShrOp(lhs: _ods_ir, rhs: _ods_ir, *, isExact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.lshr'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LShrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.lshr'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

mlir.dialects._llvm_ops_gen.lshr(lhs: _ods_ir, rhs: _ods_ir, *, is_exact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LandingpadOp(res: _ods_ir, _gen_arg_1: Sequence[_ods_ir], *, cleanup: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.landingpad'¶

_ODS_REGIONS = (0, True)¶

cleanup() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LandingpadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.landingpad'¶

cleanup() → bool¶

mlir.dialects._llvm_ops_gen.landingpad(res: _ods_ir, _gen_arg_1: Sequence[_ods_ir], *, cleanup: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LaunderInvariantGroupOp(ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.launder.invariant.group'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LaunderInvariantGroupOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.launder.invariant.group'¶

ptr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_launder_invariant_group(ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LifetimeEndOp(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lifetime.end'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LifetimeEndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lifetime.end'¶

ptr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_lifetime_end(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → LifetimeEndOp¶

class mlir.dialects._llvm_ops_gen.LifetimeStartOp(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lifetime.start'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LifetimeStartOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lifetime.start'¶

ptr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_lifetime_start(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → LifetimeStartOp¶

class mlir.dialects._llvm_ops_gen.LinkerOptionsOp(options: Sequence[str] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Pass the given options to the linker when the resulting object file is linked. This is used extensively on Windows to determine the C runtime that the object files should link against.

Examples:

// Link against the MSVC static threaded CRT.
llvm.linker_options ["/DEFAULTLIB:", "libcmt"]

// Link against aarch64 compiler-rt builtins
llvm.linker_options ["-l", "clang_rt.builtins-aarch64"]

OPERATION_NAME = 'llvm.linker_options'¶

_ODS_REGIONS = (0, True)¶

options() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LinkerOptionsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.linker_options'¶

options() → _ods_ir¶

mlir.dialects._llvm_ops_gen.linker_options(options: Sequence[str] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → LinkerOptionsOp¶

class mlir.dialects._llvm_ops_gen.LlrintOp(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.llrint'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LlrintOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.llrint'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_llrint(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LlroundOp(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.llround'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LlroundOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.llround'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_llround(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LoadExpOp(res: _ods_ir, val: _ods_ir, power: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ldexp'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

power() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LoadExpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ldexp'¶

val() → _ods_ir¶

power() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ldexp(res: _ods_ir, val: _ods_ir, power: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

The load operation is used to read from memory. A load may be marked as atomic, volatile, and/or nontemporal, and takes a number of optional attributes that specify aliasing information.

An atomic load only supports a limited set of pointer, integer, and floating point types, and requires an explicit alignment.

Examples:

// A volatile load of a float variable.
%0 = llvm.load volatile %ptr : !llvm.ptr -> f32

// A nontemporal load of a float variable.
%0 = llvm.load %ptr {nontemporal} : !llvm.ptr -> f32

// An atomic load of an integer variable.
%0 = llvm.load %ptr atomic monotonic {alignment = 8 : i64}
    : !llvm.ptr -> i64

See the following link for more details: https://llvm.org/docs/LangRef.html#load-instruction

OPERATION_NAME = 'llvm.load'¶

_ODS_REGIONS = (0, True)¶

addr() → _ods_ir¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

nontemporal() → bool¶

invariant() → bool¶

invariantGroup() → bool¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

dereferenceable() → _ods_ir | None¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LoadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.load'¶

addr() → _ods_ir¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

nontemporal() → bool¶

invariant() → bool¶

invariantGroup() → bool¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

dereferenceable() → _ods_ir | None¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.load(res: _ods_ir, addr: _ods_ir, *, alignment: int | _ods_ir | None = None, volatile_: bool | None = None, nontemporal: bool | None = None, invariant: bool | None = None, invariant_group: bool | None = None, ordering: Any | _ods_ir | None = None, syncscope: str | _ods_ir | None = None, dereferenceable: Any | _ods_ir | None = None, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log2'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Log2OpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log2'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_log2(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log10'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Log10OpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log10'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_log10(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LogOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.log'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_log(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LrintOp(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lrint'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LrintOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lrint'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_lrint(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LroundOp(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lround'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.LroundOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.lround'¶

val() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_lround(res: _ods_ir, val: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MaskedLoadOp(res: _ods_ir, data: _ods_ir, mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, pass_thru: _ods_ir[_ods_ir] | None = None, nontemporal: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.load'¶

_ODS_REGIONS = (0, True)¶

data() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

pass_thru() → _ods_ir[_ods_ir] | None¶

alignment() → _ods_ir¶

nontemporal() → bool¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MaskedLoadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.load'¶

data() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

pass_thru() → _ods_ir[_ods_ir] | None¶

alignment() → _ods_ir¶

nontemporal() → bool¶

mlir.dialects._llvm_ops_gen.intr_masked_load(res: _ods_ir, data: _ods_ir, mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, pass_thru: _ods_ir[_ods_ir] | None = None, nontemporal: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MaskedStoreOp(value: _ods_ir[_ods_ir], data: _ods_ir, mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.store'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir[_ods_ir]¶

data() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MaskedStoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.store'¶

value() → _ods_ir[_ods_ir]¶

data() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_masked_store(value: _ods_ir[_ods_ir], data: _ods_ir, mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MaskedStoreOp¶

class mlir.dialects._llvm_ops_gen.MatrixColumnMajorLoadOp(res: _ods_ir, data: _ods_ir, stride: _ods_ir[_ods_ir], isVolatile: bool | _ods_ir, rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.column.major.load'¶

_ODS_REGIONS = (0, True)¶

data() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

rows() → _ods_ir¶

columns() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MatrixColumnMajorLoadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.column.major.load'¶

data() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

rows() → _ods_ir¶

columns() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_matrix_column_major_load(res: _ods_ir, data: _ods_ir, stride: _ods_ir[_ods_ir], is_volatile: bool | _ods_ir, rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MatrixColumnMajorStoreOp(matrix: _ods_ir[_ods_ir], data: _ods_ir, stride: _ods_ir[_ods_ir], isVolatile: bool | _ods_ir, rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.column.major.store'¶

_ODS_REGIONS = (0, True)¶

matrix() → _ods_ir[_ods_ir]¶

data() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

rows() → _ods_ir¶

columns() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MatrixColumnMajorStoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.column.major.store'¶

matrix() → _ods_ir[_ods_ir]¶

data() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

rows() → _ods_ir¶

columns() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_matrix_column_major_store(matrix: _ods_ir[_ods_ir], data: _ods_ir, stride: _ods_ir[_ods_ir], is_volatile: bool | _ods_ir, rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MatrixColumnMajorStoreOp¶

class mlir.dialects._llvm_ops_gen.MatrixMultiplyOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], lhs_rows: int | _ods_ir, lhs_columns: int | _ods_ir, rhs_columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.multiply'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

lhs_rows() → _ods_ir¶

lhs_columns() → _ods_ir¶

rhs_columns() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MatrixMultiplyOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.multiply'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

lhs_rows() → _ods_ir¶

lhs_columns() → _ods_ir¶

rhs_columns() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_matrix_multiply(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], lhs_rows: int | _ods_ir, lhs_columns: int | _ods_ir, rhs_columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MatrixTransposeOp(res: _ods_ir, matrix: _ods_ir[_ods_ir], rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.transpose'¶

_ODS_REGIONS = (0, True)¶

matrix() → _ods_ir[_ods_ir]¶

rows() → _ods_ir¶

columns() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.MatrixTransposeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.matrix.transpose'¶

matrix() → _ods_ir[_ods_ir]¶

rows() → _ods_ir¶

columns() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_matrix_transpose(res: _ods_ir, matrix: _ods_ir[_ods_ir], rows: int | _ods_ir, columns: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.maxnum'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MaxNumOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.maxnum'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_maxnum(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.maximum'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MaximumOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.maximum'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_maximum(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memcpy.inline'¶

_ODS_REGIONS = (0, True)¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.MemcpyInlineOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memcpy.inline'¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_memcpy_inline(dst: _ods_ir, src: _ods_ir, len: Any | _ods_ir, is_volatile: bool | _ods_ir, *, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MemcpyInlineOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memcpy'¶

_ODS_REGIONS = (0, True)¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.MemcpyOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memcpy'¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_memcpy(dst: _ods_ir, src: _ods_ir, len: _ods_ir[_ods_ir], is_volatile: bool | _ods_ir, *, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MemcpyOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memmove'¶

_ODS_REGIONS = (0, True)¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.MemmoveOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memmove'¶

dst() → _ods_ir¶

src() → _ods_ir¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_memmove(dst: _ods_ir, src: _ods_ir, len: _ods_ir[_ods_ir], is_volatile: bool | _ods_ir, *, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MemmoveOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memset.inline'¶

_ODS_REGIONS = (0, True)¶

dst() → _ods_ir¶

val() → _ods_ir[_ods_ir]¶

len() → _ods_ir¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.MemsetInlineOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memset.inline'¶

dst() → _ods_ir¶

val() → _ods_ir[_ods_ir]¶

len() → _ods_ir¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_memset_inline(dst: _ods_ir, val: _ods_ir[_ods_ir], len: Any | _ods_ir, is_volatile: bool | _ods_ir, *, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MemsetInlineOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memset'¶

_ODS_REGIONS = (0, True)¶

dst() → _ods_ir¶

val() → _ods_ir[_ods_ir]¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.MemsetOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.memset'¶

dst() → _ods_ir¶

val() → _ods_ir[_ods_ir]¶

len() → _ods_ir[_ods_ir]¶

isVolatile() → _ods_ir¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_memset(dst: _ods_ir, val: _ods_ir[_ods_ir], len: _ods_ir[_ods_ir], is_volatile: bool | _ods_ir, *, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → MemsetOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.minnum'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MinNumOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.minnum'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_minnum(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.minimum'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MinimumOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.minimum'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_minimum(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ModuleFlagsOp(flags: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Represents the equivalent in MLIR for LLVM’s llvm.module.flags metadata, which requires a list of metadata triplets. Each triplet entry is described by a ModuleFlagAttr.

Example:

llvm.module.flags [
  #llvm.mlir.module_flag<error, "wchar_size", 4>,
  #llvm.mlir.module_flag<max, "PIC Level", 2>
]

OPERATION_NAME = 'llvm.module_flags'¶

_ODS_REGIONS = (0, True)¶

flags() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ModuleFlagsOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.module_flags'¶

flags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.module_flags(flags: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → ModuleFlagsOp¶

class mlir.dialects._llvm_ops_gen.MulOp(lhs: _ods_ir, rhs: _ods_ir, overflowFlags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mul'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.MulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mul'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.mul(lhs: _ods_ir, rhs: _ods_ir, overflow_flags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NamedMetadataOp(metadata_name: str | _ods_ir, nodes: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Represents an LLVM named metadata node (llvm::NamedMDNode). Named metadata nodes are module-level metadata that associate a name string with a list of metadata nodes. Each operand must be an #llvm.md_node.

Note: cyclic metadata graphs are not supported. Because metadata attributes are represented as MLIR attributes (which form a tree), there is no way to express a metadata node that directly or transitively references itself. LLVM IR permits such cycles (e.g. !0 = !{!0}), but they cannot be represented here and will not round-trip through this op.

Example:

llvm.named_metadata "foo.version" [
  #llvm.md_node<#llvm.md_const<2 : i32>,
                #llvm.md_const<9 : i32>,
                #llvm.md_const<0 : i32>
  >
]
llvm.named_metadata "foo.kernel" [
  #llvm.md_node<
    #llvm.md_func<@my_kernel>,
    #llvm.md_node<>,
    #llvm.md_node<
      #llvm.md_node<#llvm.md_const<0 : i32>,
                    #llvm.md_string<"foo.buffer">
      >
    >
  >
]

OPERATION_NAME = 'llvm.named_metadata'¶

_ODS_REGIONS = (0, True)¶

metadata_name() → _ods_ir¶

nodes() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NamedMetadataOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.named_metadata'¶

metadata_name() → _ods_ir¶

nodes() → _ods_ir¶

mlir.dialects._llvm_ops_gen.named_metadata(metadata_name: str | _ods_ir, nodes: Sequence[_ods_ir] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → NamedMetadataOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.nearbyint'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NearbyintOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.nearbyint'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_nearbyint(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NoAliasScopeDeclOp(scope: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.noalias.scope.decl'¶

_ODS_REGIONS = (0, True)¶

scope() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NoAliasScopeDeclOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.noalias.scope.decl'¶

scope() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_experimental_noalias_scope_decl(scope: Any | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → NoAliasScopeDeclOp¶

class mlir.dialects._llvm_ops_gen.NoneTokenOp(*, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Unlike LLVM IR, MLIR does not have first-class token values. They must be explicitly created as SSA values using llvm.mlir.none. This operation has no operands or attributes, and returns a none token value of a wrapped LLVM IR pointer type.

Examples:

%0 = llvm.mlir.none : !llvm.token

OPERATION_NAME = 'llvm.mlir.none'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.NoneTokenOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.none'¶

mlir.dialects._llvm_ops_gen.mlir_none(*, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.OrOp(lhs: _ods_ir, rhs: _ods_ir, *, isDisjoint: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.or'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isDisjoint() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.OrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.or'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isDisjoint() → bool¶

mlir.dialects._llvm_ops_gen.or_(lhs: _ods_ir, rhs: _ods_ir, *, is_disjoint: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PoisonOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Unlike LLVM IR, MLIR does not have first-class poison values. Such values must be created as SSA values using llvm.mlir.poison. This operation has no operands or attributes. It creates a poison value of the specified LLVM IR dialect type.

Example:

// Create a poison value for a structure with a 32-bit integer followed
// by a float.
%0 = llvm.mlir.poison : !llvm.struct<(i32, f32)>

OPERATION_NAME = 'llvm.mlir.poison'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PoisonOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.poison'¶

mlir.dialects._llvm_ops_gen.mlir_poison(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PowIOp(res: _ods_ir, val: _ods_ir, power: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.powi'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

power() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PowIOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.powi'¶

val() → _ods_ir¶

power() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_powi(res: _ods_ir, val: _ods_ir, power: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.pow'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.pow'¶

a() → _ods_ir¶

b() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_pow(a: _ods_ir, b: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.prefetch'¶

_ODS_REGIONS = (0, True)¶

addr() → _ods_ir¶

rw() → _ods_ir¶

hint() → _ods_ir¶

cache() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PrefetchAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.prefetch'¶

addr() → _ods_ir¶

rw() → _ods_ir¶

hint() → _ods_ir¶

cache() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_prefetch(addr: _ods_ir, rw: int | _ods_ir, hint: int | _ods_ir, cache: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → Prefetch¶

class mlir.dialects._llvm_ops_gen.PtrAnnotation(ptr: _ods_ir, annotation: _ods_ir, fileName: _ods_ir, line: _ods_ir[_ods_ir], attr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ptr.annotation'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

attr() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrAnnotationAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ptr.annotation'¶

ptr() → _ods_ir¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

attr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ptr_annotation(ptr: _ods_ir, annotation: _ods_ir, file_name: _ods_ir, line: _ods_ir[_ods_ir], attr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrMaskOp(ptr: _ods_ir, mask: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ptrmask'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

mask() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrMaskOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ptrmask'¶

ptr() → _ods_ir¶

mask() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ptrmask(ptr: _ods_ir, mask: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrToAddrOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Operation mirroring LLVM’s ptrtoaddr operation.

This operation casts a pointer (or a vector of pointers) to an integer (or a vector of integers) without capturing the provenance of the pointer. Therefore, an integer returned or derived from llvm.ptrtoaddr does not create a legal-to-access pointer when used in llvm.inttoptr. Code that only cares about the address value of a pointer (e.g. pointer subtraction) should prefer llvm.ptrtoaddr over llvm.ptrtoint.

The integer type used as the result type is required to be equal in width to the pointer type as specified in the data layout. Use the llvm-target-to-data-layout pass to derive an MLIR datalayout from an LLVM datalayout.

Examples:

llvm.func @default_64_bit_ptrtoaddr(%arg0 : !llvm.ptr) -> i64 {
  %0 = llvm.ptrtoaddr %arg0 : !llvm.ptr to i64
  llvm.return i64
}

module attributes { dlti.dl_spec = #dlti.dl_spec<
  #dlti.dl_entry<!llvm.ptr, dense<[/*size=*/32, 32, 64]> : vector<3xi64>>
>} {
  llvm.func @datalayout_32_bit(%arg0 : !llvm.ptr) -> i32 {
    %0 = llvm.ptrtoaddr %arg0 : !llvm.ptr to i32
    llvm.return %0 : i32
  }
}

OPERATION_NAME = 'llvm.ptrtoaddr'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrToAddrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.ptrtoaddr'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.ptrtoaddr(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrToIntOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.ptrtoint'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.PtrToIntOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.ptrtoint'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.ptrtoint(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ResumeOp(value: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.resume'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ResumeOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.resume'¶

value() → _ods_ir¶

mlir.dialects._llvm_ops_gen.resume(value: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → ResumeOp¶

class mlir.dialects._llvm_ops_gen.ReturnOp(*, arg: _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.return'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.ReturnOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.return'¶

arg() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.return_(*, arg: _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → ReturnOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.rint'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.RintOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.rint'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_rint(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.roundeven'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.RoundEvenOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.roundeven'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_roundeven(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.round'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.RoundOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.round'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_round(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SAddSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sadd.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SAddSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sadd.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sadd_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SAddWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sadd.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SAddWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sadd.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_sadd_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SCmpOp(res: _ods_ir, a: _ods_ir, b: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.scmp'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SCmpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.scmp'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_scmp(res: _ods_ir, a: _ods_ir, b: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SDivOp(lhs: _ods_ir, rhs: _ods_ir, *, isExact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sdiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sdiv'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

mlir.dialects._llvm_ops_gen.sdiv(lhs: _ods_ir, rhs: _ods_ir, *, is_exact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SExtOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sext'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sext'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.sext(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SIToFPOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sitofp'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SIToFPOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sitofp'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.sitofp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMaxOp(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smax'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smax'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_smax(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMinOp(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smin'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smin'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_smin(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMulWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smul.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SMulWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.smul.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_smul_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SRemOp(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.srem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SRemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.srem'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.srem(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSACopyOp(operand: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssa.copy'¶

_ODS_REGIONS = (0, True)¶

operand() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSACopyOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssa.copy'¶

operand() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ssa_copy(operand: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSHLSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sshl.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSHLSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sshl.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sshl_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSubSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssub.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSubSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssub.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ssub_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSubWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssub.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SSubWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ssub.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_ssub_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SelectOp(condition: _ods_ir, trueValue: _ods_ir, falseValue: _ods_ir, *, fastmathFlags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.select'¶

_ODS_REGIONS = (0, True)¶

condition() → _ods_ir¶

trueValue() → _ods_ir¶

falseValue() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SelectOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.select'¶

condition() → _ods_ir¶

trueValue() → _ods_ir¶

falseValue() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.select(condition: _ods_ir, true_value: _ods_ir, false_value: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ShlOp(lhs: _ods_ir, rhs: _ods_ir, overflowFlags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.shl'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ShlOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.shl'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.shl(lhs: _ods_ir, rhs: _ods_ir, overflow_flags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ShuffleVectorOp(res: _ods_ir, v1: _ods_ir[_ods_ir], v2: _ods_ir[_ods_ir], mask: Sequence[int] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.shufflevector'¶

_ODS_REGIONS = (0, True)¶

v1() → _ods_ir[_ods_ir]¶

v2() → _ods_ir[_ods_ir]¶

mask() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.ShuffleVectorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.shufflevector'¶

v1() → _ods_ir[_ods_ir]¶

v2() → _ods_ir[_ods_ir]¶

mask() → _ods_ir¶

mlir.dialects._llvm_ops_gen.shufflevector(res: _ods_ir, v1: _ods_ir[_ods_ir], v2: _ods_ir[_ods_ir], mask: Sequence[int] | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sin'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sin'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sin(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SincosOp(res: _ods_ir, val: _ods_ir, *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sincos'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SincosOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sincos'¶

val() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sincos(res: _ods_ir, val: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sinh'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SinhOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sinh'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sinh(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sqrt'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SqrtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.sqrt'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_sqrt(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.StackRestoreOp(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stackrestore'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.StackRestoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stackrestore'¶

ptr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_stackrestore(ptr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → StackRestoreOp¶

class mlir.dialects._llvm_ops_gen.StackSaveOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stacksave'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.StackSaveOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stacksave'¶

mlir.dialects._llvm_ops_gen.intr_stacksave(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.StepVectorOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stepvector'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.StepVectorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.stepvector'¶

mlir.dialects._llvm_ops_gen.intr_stepvector(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

Bases: _ods_ir

The store operation is used to write to memory. A store may be marked as atomic, volatile, and/or nontemporal, and takes a number of optional attributes that specify aliasing information.

An atomic store only supports a limited set of pointer, integer, and floating point types, and requires an explicit alignment.

Examples:

// A volatile store of a float variable.
llvm.store volatile %val, %ptr : f32, !llvm.ptr

// A nontemporal store of a float variable.
llvm.store %val, %ptr {nontemporal} : f32, !llvm.ptr

// An atomic store of an integer variable.
llvm.store %val, %ptr atomic monotonic {alignment = 8 : i64}
    : i64, !llvm.ptr

See the following link for more details: https://llvm.org/docs/LangRef.html#store-instruction

OPERATION_NAME = 'llvm.store'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir¶

addr() → _ods_ir¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

nontemporal() → bool¶

invariantGroup() → bool¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.StoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.store'¶

value() → _ods_ir¶

addr() → _ods_ir¶

alignment() → _ods_ir | None¶

volatile_() → bool¶

nontemporal() → bool¶

invariantGroup() → bool¶

ordering() → _ods_ir¶

syncscope() → _ods_ir | None¶

access_groups() → _ods_ir | None¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.store(value: _ods_ir, addr: _ods_ir, *, alignment: int | _ods_ir | None = None, volatile_: bool | None = None, nontemporal: bool | None = None, invariant_group: bool | None = None, ordering: Any | _ods_ir | None = None, syncscope: str | _ods_ir | None = None, access_groups: Any | _ods_ir | None = None, alias_scopes: Any | _ods_ir | None = None, noalias_scopes: Any | _ods_ir | None = None, tbaa: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → StoreOp¶

class mlir.dialects._llvm_ops_gen.StripInvariantGroupOp(ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.strip.invariant.group'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.StripInvariantGroupOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.strip.invariant.group'¶

ptr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_strip_invariant_group(ptr: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SubOp(lhs: _ods_ir, rhs: _ods_ir, overflowFlags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sub'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SubOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.sub'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.sub(lhs: _ods_ir, rhs: _ods_ir, overflow_flags, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.SwitchOp(value: _ods_ir[_ods_ir], defaultOperands: Sequence[_ods_ir], caseOperands: Sequence[_ods_ir], case_operand_segments: Sequence[int] | _ods_ir, defaultDestination: _ods_ir, caseDestinations: Sequence[_ods_ir], *, case_values: Any | _ods_ir | None = None, branch_weights: Sequence[int] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.switch'¶

_ODS_OPERAND_SEGMENTS¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir[_ods_ir]¶

defaultOperands() → _ods_ir¶

caseOperands() → _ods_ir¶

case_values() → _ods_ir | None¶

case_operand_segments() → _ods_ir¶

branch_weights() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.SwitchOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.switch'¶

value() → _ods_ir[_ods_ir]¶

defaultOperands() → _ods_ir¶

caseOperands() → _ods_ir¶

case_values() → _ods_ir | None¶

case_operand_segments() → _ods_ir¶

branch_weights() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.switch(value: _ods_ir[_ods_ir], default_operands: Sequence[_ods_ir], case_operands: Sequence[_ods_ir], case_operand_segments: Sequence[int] | _ods_ir, default_destination: _ods_ir, case_destinations: Sequence[_ods_ir], *, case_values: Any | _ods_ir | None = None, branch_weights: Sequence[int] | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → SwitchOp¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.tan'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.TanOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.tan'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_tan(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.tanh'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.TanhOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.tanh'¶

in_() → _ods_ir¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_tanh(in_: _ods_ir, *, fastmath_flags: Any | _ods_ir | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ThreadlocalAddressOp(res: _ods_ir, global_: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.threadlocal.address'¶

_ODS_REGIONS = (0, True)¶

global_() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ThreadlocalAddressOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.threadlocal.address'¶

global_() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_threadlocal_address(res: _ods_ir, global_: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.Trap(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.trap'¶

_ODS_REGIONS = (0, True)¶

class mlir.dialects._llvm_ops_gen.TrapAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.trap'¶

mlir.dialects._llvm_ops_gen.intr_trap(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → Trap¶

class mlir.dialects._llvm_ops_gen.TruncOp(res: _ods_ir, arg: _ods_ir, overflowFlags, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.trunc'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.TruncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.trunc'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.trunc(res: _ods_ir, arg: _ods_ir, overflow_flags, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UAddSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.uadd.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UAddSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.uadd.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_uadd_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UAddWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.uadd.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UAddWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.uadd.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_uadd_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UBSanTrap(failureKind: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ubsantrap'¶

_ODS_REGIONS = (0, True)¶

failureKind() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UBSanTrapAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ubsantrap'¶

failureKind() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ubsantrap(failure_kind: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → UBSanTrap¶

class mlir.dialects._llvm_ops_gen.UCmpOp(res: _ods_ir, a: _ods_ir, b: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ucmp'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UCmpOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ucmp'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ucmp(res: _ods_ir, a: _ods_ir, b: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UDivOp(lhs: _ods_ir, rhs: _ods_ir, *, isExact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.udiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.udiv'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

isExact() → bool¶

mlir.dialects._llvm_ops_gen.udiv(lhs: _ods_ir, rhs: _ods_ir, *, is_exact: bool | None = None, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UIToFPOp(res: _ods_ir, arg: _ods_ir, *, nonNeg: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.uitofp'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

nonNeg() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UIToFPOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.uitofp'¶

arg() → _ods_ir¶

nonNeg() → bool¶

mlir.dialects._llvm_ops_gen.uitofp(res: _ods_ir, arg: _ods_ir, *, non_neg: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMaxOp(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umax'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umax'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_umax(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMinOp(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umin'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umin'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_umin(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMulWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umul.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UMulWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.umul.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_umul_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.URemOp(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.urem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.URemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.urem'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.urem(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USHLSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ushl.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USHLSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.ushl.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_ushl_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USubSat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.usub.sat'¶

_ODS_REGIONS = (0, True)¶

a() → _ods_ir¶

b() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USubSatAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.usub.sat'¶

a() → _ods_ir¶

b() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_usub_sat(a: _ods_ir, b: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USubWithOverflowOp(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.usub.with.overflow'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.USubWithOverflowOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.usub.with.overflow'¶

mlir.dialects._llvm_ops_gen.intr_usub_with_overflow(res: _ods_ir, _gen_arg_0: _ods_ir, _gen_arg_1: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UndefOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Unlike LLVM IR, MLIR does not have first-class undefined values. Such values must be created as SSA values using llvm.mlir.undef. This operation has no operands or attributes. It creates an undefined value of the specified LLVM IR dialect type.

Example:

// Create a structure with a 32-bit integer followed by a float.
%0 = llvm.mlir.undef : !llvm.struct<(i32, f32)>

OPERATION_NAME = 'llvm.mlir.undef'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UndefOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.undef'¶

mlir.dialects._llvm_ops_gen.mlir_undef(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.UnreachableOp(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.unreachable'¶

_ODS_REGIONS = (0, True)¶

class mlir.dialects._llvm_ops_gen.UnreachableOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.unreachable'¶

mlir.dialects._llvm_ops_gen.unreachable(*, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → UnreachableOp¶

class mlir.dialects._llvm_ops_gen.VPAShrOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.ashr'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPAShrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.ashr'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_ashr(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPAddOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.add'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.add'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_add(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPAndOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.and'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPAndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.and'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_and(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFAddOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fadd'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fadd'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fadd(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFDivOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fdiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fdiv'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fdiv(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFMulAddOp(res: _ods_ir, op1: _ods_ir[_ods_ir], op2: _ods_ir[_ods_ir], op3: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fmuladd'¶

_ODS_REGIONS = (0, True)¶

op1() → _ods_ir[_ods_ir]¶

op2() → _ods_ir[_ods_ir]¶

op3() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFMulAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fmuladd'¶

op1() → _ods_ir[_ods_ir]¶

op2() → _ods_ir[_ods_ir]¶

op3() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fmuladd(res: _ods_ir, op1: _ods_ir[_ods_ir], op2: _ods_ir[_ods_ir], op3: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFMulOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fmul'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFMulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fmul'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fmul(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFNegOp(res: _ods_ir, op: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fneg'¶

_ODS_REGIONS = (0, True)¶

op() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFNegOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fneg'¶

op() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fneg(res: _ods_ir, op: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPExtOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fpext'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fpext'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fpext(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPToSIOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptosi'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPToSIOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptosi'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fptosi(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPToUIOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptoui'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPToUIOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptoui'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fptoui(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPTruncOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptrunc'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFPTruncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fptrunc'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fptrunc(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFRemOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.frem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFRemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.frem'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_frem(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFSubOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fsub'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFSubOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fsub'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fsub(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFmaOp(res: _ods_ir, op1: _ods_ir[_ods_ir], op2: _ods_ir[_ods_ir], op3: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fma'¶

_ODS_REGIONS = (0, True)¶

op1() → _ods_ir[_ods_ir]¶

op2() → _ods_ir[_ods_ir]¶

op3() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPFmaOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.fma'¶

op1() → _ods_ir[_ods_ir]¶

op2() → _ods_ir[_ods_ir]¶

op3() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_fma(res: _ods_ir, op1: _ods_ir[_ods_ir], op2: _ods_ir[_ods_ir], op3: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPIntToPtrOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.inttoptr'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPIntToPtrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.inttoptr'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_inttoptr(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPLShrOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.lshr'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPLShrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.lshr'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_lshr(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPLoadOp(res: _ods_ir, ptr: _ods_ir, mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.load'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPLoadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.load'¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_load(res: _ods_ir, ptr: _ods_ir, mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPMergeMinOp(res: _ods_ir, cond: _ods_ir[_ods_ir], true_val: _ods_ir[_ods_ir], false_val: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.merge'¶

_ODS_REGIONS = (0, True)¶

cond() → _ods_ir[_ods_ir]¶

true_val() → _ods_ir[_ods_ir]¶

false_val() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPMergeMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.merge'¶

cond() → _ods_ir[_ods_ir]¶

true_val() → _ods_ir[_ods_ir]¶

false_val() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_merge(res: _ods_ir, cond: _ods_ir[_ods_ir], true_val: _ods_ir[_ods_ir], false_val: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPMulOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.mul'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPMulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.mul'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_mul(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPOrOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.or'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPOrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.or'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_or(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPPtrToIntOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.ptrtoint'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPPtrToIntOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.ptrtoint'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_ptrtoint(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceAddOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.add'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.add'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_add(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceAndOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.and'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceAndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.and'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_and(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFAddOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fadd'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFAddOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fadd'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_fadd(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMaxOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmax'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmax'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_fmax(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMinOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmin'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmin'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_fmin(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMulOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmul'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceFMulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.fmul'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_fmul(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceMulOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.mul'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceMulOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.mul'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_mul(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceOrOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.or'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceOrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.or'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_or(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceSMaxOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.smax'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceSMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.smax'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_smax(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceSMinOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.smin'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceSMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.smin'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_smin(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceUMaxOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.umax'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceUMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.umax'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_umax(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceUMinOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.umin'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceUMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.umin'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_umin(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceXorOp(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.xor'¶

_ODS_REGIONS = (0, True)¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPReduceXorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.reduce.xor'¶

satrt_value() → _ods_ir[_ods_ir]¶

val() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_reduce_xor(res: _ods_ir, satrt_value: _ods_ir[_ods_ir], val: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSDivOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sdiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sdiv'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_sdiv(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSExtOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sext'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sext'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_sext(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSIToFPOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sitofp'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSIToFPOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sitofp'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_sitofp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSMaxOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.smax'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.smax'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_smax(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSMinOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.smin'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.smin'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_smin(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSRemOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.srem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSRemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.srem'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_srem(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSelectMinOp(res: _ods_ir, cond: _ods_ir[_ods_ir], true_val: _ods_ir[_ods_ir], false_val: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.select'¶

_ODS_REGIONS = (0, True)¶

cond() → _ods_ir[_ods_ir]¶

true_val() → _ods_ir[_ods_ir]¶

false_val() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSelectMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.select'¶

cond() → _ods_ir[_ods_ir]¶

true_val() → _ods_ir[_ods_ir]¶

false_val() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_select(res: _ods_ir, cond: _ods_ir[_ods_ir], true_val: _ods_ir[_ods_ir], false_val: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPShlOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.shl'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPShlOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.shl'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_shl(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPStoreOp(val: _ods_ir[_ods_ir], ptr: _ods_ir, mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.store'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.VPStoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.store'¶

val() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_store(val: _ods_ir[_ods_ir], ptr: _ods_ir, mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VPStoreOp¶

class mlir.dialects._llvm_ops_gen.VPStridedLoadOp(res: _ods_ir, ptr: _ods_ir, stride: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.vp.strided.load'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPStridedLoadOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.vp.strided.load'¶

ptr() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_experimental_vp_strided_load(res: _ods_ir, ptr: _ods_ir, stride: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPStridedStoreOp(val: _ods_ir[_ods_ir], ptr: _ods_ir, stride: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.vp.strided.store'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.VPStridedStoreOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.experimental.vp.strided.store'¶

val() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

stride() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_experimental_vp_strided_store(val: _ods_ir[_ods_ir], ptr: _ods_ir, stride: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VPStridedStoreOp¶

class mlir.dialects._llvm_ops_gen.VPSubOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sub'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPSubOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.sub'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_sub(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPTruncOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.trunc'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPTruncOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.trunc'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_trunc(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUDivOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.udiv'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUDivOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.udiv'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_udiv(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUIToFPOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.uitofp'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUIToFPOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.uitofp'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_uitofp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUMaxOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.umax'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUMaxOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.umax'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_umax(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUMinOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.umin'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPUMinOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.umin'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_umin(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPURemOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.urem'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPURemOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.urem'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_urem(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPXorOp(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.xor'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPXorOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.xor'¶

lhs() → _ods_ir[_ods_ir]¶

rhs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_xor(res: _ods_ir, lhs: _ods_ir[_ods_ir], rhs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPZExtOp(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.zext'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VPZExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vp.zext'¶

src() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

evl() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vp_zext(res: _ods_ir, src: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], evl: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaArgOp(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.va_arg'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaArgOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.va_arg'¶

arg() → _ods_ir¶

mlir.dialects._llvm_ops_gen.va_arg(res: _ods_ir, arg: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaCopyOp(dest_list: _ods_ir, src_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vacopy'¶

_ODS_REGIONS = (0, True)¶

dest_list() → _ods_ir¶

src_list() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaCopyOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vacopy'¶

dest_list() → _ods_ir¶

src_list() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vacopy(dest_list: _ods_ir, src_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VaCopyOp¶

class mlir.dialects._llvm_ops_gen.VaEndOp(arg_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vaend'¶

_ODS_REGIONS = (0, True)¶

arg_list() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaEndOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vaend'¶

arg_list() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vaend(arg_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VaEndOp¶

class mlir.dialects._llvm_ops_gen.VaStartOp(arg_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vastart'¶

_ODS_REGIONS = (0, True)¶

arg_list() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VaStartOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vastart'¶

arg_list() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vastart(arg_list: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VaStartOp¶

class mlir.dialects._llvm_ops_gen.VarAnnotation(val: _ods_ir, annotation: _ods_ir, fileName: _ods_ir, line: _ods_ir[_ods_ir], attr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.var.annotation'¶

_ODS_REGIONS = (0, True)¶

val() → _ods_ir¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

attr() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.VarAnnotationAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.var.annotation'¶

val() → _ods_ir¶

annotation() → _ods_ir¶

fileName() → _ods_ir¶

line() → _ods_ir[_ods_ir]¶

attr() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_var_annotation(val: _ods_ir, annotation: _ods_ir, file_name: _ods_ir, line: _ods_ir[_ods_ir], attr: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → VarAnnotation¶

class mlir.dialects._llvm_ops_gen.XOrOp(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.xor'¶

_ODS_REGIONS = (0, True)¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.XOrOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.xor'¶

lhs() → _ods_ir¶

rhs() → _ods_ir¶

mlir.dialects._llvm_ops_gen.xor(lhs: _ods_ir, rhs: _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ZExtOp(res: _ods_ir, arg: _ods_ir, *, nonNeg: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.zext'¶

_ODS_REGIONS = (0, True)¶

arg() → _ods_ir¶

nonNeg() → bool¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ZExtOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.zext'¶

arg() → _ods_ir¶

nonNeg() → bool¶

mlir.dialects._llvm_ops_gen.zext(res: _ods_ir, arg: _ods_ir, *, non_neg: bool | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ZeroOp(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

Unlike LLVM IR, MLIR does not have first-class zero-initialized values. Such values must be created as SSA values using llvm.mlir.zero. This operation has no operands or attributes. It creates a zero-initialized value of the specified LLVM IR dialect type.

Example:

// Create a zero-initialized value for a structure with a 32-bit integer
// followed by a float.
%0 = llvm.mlir.zero : !llvm.struct<(i32, f32)>

OPERATION_NAME = 'llvm.mlir.zero'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.ZeroOpAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.mlir.zero'¶

mlir.dialects._llvm_ops_gen.mlir_zero(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.compressstore'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

class mlir.dialects._llvm_ops_gen.masked_compressstoreAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.compressstore'¶

value() → _ods_ir[_ods_ir]¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_masked_compressstore(value: _ods_ir[_ods_ir], ptr: _ods_ir, mask: _ods_ir[_ods_ir], *, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → masked_compressstore¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.expandload'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

passthru() → _ods_ir[_ods_ir]¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.masked_expandloadAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.expandload'¶

ptr() → _ods_ir¶

mask() → _ods_ir[_ods_ir]¶

passthru() → _ods_ir[_ods_ir]¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

mlir.dialects._llvm_ops_gen.intr_masked_expandload(res: _ods_ir, ptr: _ods_ir, mask: _ods_ir[_ods_ir], passthru: _ods_ir[_ods_ir], *, arg_attrs: Any | _ods_ir | None = None, res_attrs: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.masked_gather(res: _ods_ir, ptrs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], pass_thru: Sequence[_ods_ir[_ods_ir]], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.gather'¶

_ODS_REGIONS = (0, True)¶

ptrs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

pass_thru() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.masked_gatherAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.gather'¶

ptrs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

pass_thru() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_masked_gather(res: _ods_ir, ptrs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], pass_thru: Sequence[_ods_ir[_ods_ir]], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.masked_scatter(value: _ods_ir[_ods_ir], ptrs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.scatter'¶

_ODS_REGIONS = (0, True)¶

value() → _ods_ir[_ods_ir]¶

ptrs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.masked_scatterAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.masked.scatter'¶

value() → _ods_ir[_ods_ir]¶

ptrs() → _ods_ir[_ods_ir]¶

mask() → _ods_ir[_ods_ir]¶

alignment() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_masked_scatter(value: _ods_ir[_ods_ir], ptrs: _ods_ir[_ods_ir], mask: _ods_ir[_ods_ir], alignment: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → masked_scatter¶

class mlir.dialects._llvm_ops_gen.vector_deinterleave2(res: _ods_ir, vec: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.deinterleave2'¶

_ODS_REGIONS = (0, True)¶

vec() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_deinterleave2Adaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.deinterleave2'¶

vec() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_deinterleave2(res: _ods_ir, vec: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_extract(res: _ods_ir, srcvec: _ods_ir[_ods_ir], pos: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.extract'¶

_ODS_REGIONS = (0, True)¶

srcvec() → _ods_ir[_ods_ir]¶

pos() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.vector_extractAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.extract'¶

srcvec() → _ods_ir[_ods_ir]¶

pos() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_extract(res: _ods_ir, srcvec: _ods_ir[_ods_ir], pos: int | _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.vector_insert(dstvec: _ods_ir[_ods_ir], srcvec: _ods_ir[_ods_ir], pos: int | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.insert'¶

_ODS_REGIONS = (0, True)¶

dstvec() → _ods_ir[_ods_ir]¶

srcvec() → _ods_ir[_ods_ir]¶

pos() → _ods_ir¶

res() → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.vector_insertAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.insert'¶

dstvec() → _ods_ir[_ods_ir]¶

srcvec() → _ods_ir[_ods_ir]¶

pos() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_insert(dstvec: _ods_ir[_ods_ir], srcvec: _ods_ir[_ods_ir], pos: int | _ods_ir, *, results: Sequence[_ods_ir] | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir[_ods_ir]¶

class mlir.dialects._llvm_ops_gen.vector_interleave2(res: _ods_ir, vec1: _ods_ir[_ods_ir], vec2: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.interleave2'¶

_ODS_REGIONS = (0, True)¶

vec1() → _ods_ir[_ods_ir]¶

vec2() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_interleave2Adaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.interleave2'¶

vec1() → _ods_ir[_ods_ir]¶

vec2() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_interleave2(res: _ods_ir, vec1: _ods_ir[_ods_ir], vec2: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_add(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.add'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_addAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.add'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_add(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_and(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.and'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_andAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.and'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_and(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fadd(res: _ods_ir, start_value: _ods_ir[_ods_ir], input: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fadd'¶

_ODS_REGIONS = (0, True)¶

start_value() → _ods_ir[_ods_ir]¶

input() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_faddAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fadd'¶

start_value() → _ods_ir[_ods_ir]¶

input() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fadd(res: _ods_ir, start_value: _ods_ir[_ods_ir], input: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmax'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmaxAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmax'¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fmax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmaximum(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmaximum'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmaximumAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmaximum'¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fmaximum(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmin'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fminAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmin'¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fmin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fminimum(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fminimum'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fminimumAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fminimum'¶

in_() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fminimum(res: _ods_ir, in_: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmul(res: _ods_ir, start_value: _ods_ir[_ods_ir], input: _ods_ir[_ods_ir], *, fastmathFlags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmul'¶

_ODS_REGIONS = (0, True)¶

start_value() → _ods_ir[_ods_ir]¶

input() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_fmulAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.fmul'¶

start_value() → _ods_ir[_ods_ir]¶

input() → _ods_ir[_ods_ir]¶

fastmathFlags() → _ods_ir¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_fmul(res: _ods_ir, start_value: _ods_ir[_ods_ir], input: _ods_ir[_ods_ir], *, fastmath_flags: Any | _ods_ir | None = None, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_mul(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.mul'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_mulAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.mul'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_mul(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_or(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.or'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_orAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.or'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_or(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_smax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.smax'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_smaxAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.smax'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_smax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_smin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.smin'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_sminAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.smin'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_smin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_umax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.umax'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_umaxAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.umax'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_umax(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_umin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.umin'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_uminAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.umin'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_umin(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_xor(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.xor'¶

_ODS_REGIONS = (0, True)¶

in_() → _ods_ir[_ods_ir]¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vector_reduce_xorAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vector.reduce.xor'¶

in_() → _ods_ir[_ods_ir]¶

mlir.dialects._llvm_ops_gen.intr_vector_reduce_xor(res: _ods_ir, in_: _ods_ir[_ods_ir], *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vscale(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None)¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vscale'¶

_ODS_REGIONS = (0, True)¶

res() → _ods_ir¶

class mlir.dialects._llvm_ops_gen.vscaleAdaptor¶

Bases: _ods_ir

OPERATION_NAME = 'llvm.intr.vscale'¶

mlir.dialects._llvm_ops_gen.intr_vscale(res: _ods_ir, *, loc: _ods_ir | None = None, ip: _ods_ir | None = None) → _ods_ir¶