mlir.dialects._rocdl_ops_gen¶

Attributes¶

_ods_ir

Classes¶

`_Dialect`
`BallotOp`	Ballot provides a bit mask containing the 1-bit predicate value from each lane.
`BarrierInitOp`	Available on gfx1250+.
`BarrierJoinOp`	Available on gfx1250+.
`BarrierLeaveOp`	Available on gfx1250+.
`BarrierOp`
`BarrierSignalIsfirstOp`	Available on gfx1250+.
`BarrierSignalOp`
`BarrierSignalVarOp`	Available on gfx1250+.
`BarrierWaitOp`
`BlockDimXOp`
`BlockDimYOp`
`BlockDimZOp`
`BlockIdXOp`
`BlockIdYOp`
`BlockIdZOp`
`CvtF32Bf8Op`	Convert 8-bit bf8 value from the byteSel``th bit of ``srcA to fp32.
`CvtF32Fp8Op`	Convert 8-bit fp8 value from the byteSel``th bit of ``srcA to fp32.
`CvtPkBf8F32Op`	Convert `srcA` and `srcB` to bf8 and store into the low/high word of
`CvtPkF32Bf8Op`	Convert `src` based on $wordSel to packed fp32,
`CvtPkF32Fp8Op`	Convert `src` based on $wordSel to packed fp32.
`CvtPkFp8F32Op`	Convert `srcA` and `srcB` to fp8 and store into the low/high word of
`CvtPkRtz`	Convert two f32 values into a packed vector<2xf16>.
`CvtPkScalePk8Bf16Bf8Op`	Available on gfx1250+.
`CvtPkScalePk8Bf16Fp4Op`	Available on gfx1250+.
`CvtPkScalePk8Bf16Fp8Op`	Available on gfx1250+.
`CvtPkScalePk8F16Bf8Op`	Available on gfx1250+.
`CvtPkScalePk8F16Fp4Op`	Available on gfx1250+.
`CvtPkScalePk8F16Fp8Op`	Available on gfx1250+.
`CvtPkScalePk8F32Bf8Op`	Available on gfx1250+.
`CvtPkScalePk8F32Fp4Op`	Available on gfx1250+.
`CvtPkScalePk8F32Fp8Op`	Available on gfx1250+.
`CvtPkScalePk16Bf16Bf6Op`	Available on gfx1250+.
`CvtPkScalePk16Bf16Fp6Op`	Available on gfx1250+.
`CvtPkScalePk16F16Bf6Op`	Available on gfx1250+.
`CvtPkScalePk16F16Fp6Op`	Available on gfx1250+.
`CvtPkScalePk16F32Bf6Op`	Available on gfx1250+.
`CvtPkScalePk16F32Fp6Op`	Available on gfx1250+.
`CvtScaleF32F16Bf8Op`	Convert a bf8 byte from `src`, selected by
`CvtScaleF32F16Fp8Op`	Convert a fp8 byte from `src`, selected by
`CvtScaleF32F32Bf8Op`	Convert a bf8 byte from `src`, selected by
`CvtScaleF32F32Fp8Op`	Convert a fp8 byte from `src`, selected by
`CvtScaleF32Pk8Bf8Bf16Op`	Convert 8 packed bf16 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Bf8F16Op`	Convert 8 packed f16 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Bf8F32Op`	Convert 8 packed f32 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp4Bf16Op`	Convert 8 packed bf16 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp4F16Op`	Convert 8 packed f16 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp4F32Op`	Convert 8 packed f32 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp8Bf16Op`	Convert 8 packed bf16 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp8F16Op`	Convert 8 packed f16 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk8Fp8F32Op`	Convert 8 packed f32 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Bf6Bf16Op`	Convert 8 packed bf16 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Bf6F16Op`	Convert 8 packed f16 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Bf6F32Op`	Convert 8 packed f32 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Fp6Bf16Op`	Convert 8 packed bf16 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Fp6F16Op`	Convert 8 packed f16 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk16Fp6F32Op`	Convert 8 packed f32 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32Bf6Bf16Op`	Convert 32 packed bf16 values to packed bf6, dividing by the exponent part of `scale`
`CvtScaleF32Pk32Bf6F16Op`	Convert 32 packed f16 values to packed bf6, dividing by the exponent part of `scale`
`CvtScaleF32Pk32Bf16Bf6Op`	Convert 32 packed bf6 values to packed bf16, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32Bf16Fp6Op`	Convert 32 packed fp6 values to packed bf16, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32F16Bf6Op`	Convert 32 packed bf6 values to packed f16, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32F16Fp6Op`	Convert 32 packed fp6 values to packed f16, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32F32Bf6Op`	Convert 32 packed bf6 values to packed f32, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32F32Fp6Op`	Convert 32 packed fp6 values to packed f32, multiplying by the exponent part of `scale`
`CvtScaleF32Pk32Fp6Bf16Op`	Convert 32 packed bf16 values to packed fp6, dividing by the exponent part of `scale`
`CvtScaleF32Pk32Fp6F16Op`	Convert 32 packed f16 values to packed fp6, dividing by the exponent part of `scale`
`CvtScaleF32PkBf8Bf16Op`	Convert two bf16 values in `src0` to two bf8 bytes, dividing by the exponent in `scale`. The bytes are
`CvtScaleF32PkBf8F16Op`	Convert two f16 values in `src0` to two bf8 bytes, dividing by the exponent in `scale`. The bytes are
`CvtScaleF32PkBf8F32Op`	Convert two f32 values in `src0` and `src1` to two bf8 bytes,
`CvtScaleF32PkBf16Bf8Op`	Convert two packed bf8 values in `src0` to two bf16 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkBf16Fp4Op`	Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer
`CvtScaleF32PkBf16Fp8Op`	Convert two packed fp8 values in `src0` to two bf16 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkF16Bf8Op`	Convert two packed bf8 values in `src0` to two f16 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkF16Fp4Op`	Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer
`CvtScaleF32PkF16Fp8Op`	Convert two packed fp8 values in `src0` to two f16 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkF32Bf8Op`	Convert two packed bf8 values in `src0` to two f32 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkF32Fp4Op`	Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer
`CvtScaleF32PkF32Fp8Op`	Convert two packed fp8 values in `src0` to two f32 values, multiplying by the exponent in `scale`.
`CvtScaleF32PkFp4Bf16Op`	Convert two packed bf16 values to packed
`CvtScaleF32PkFp4F16Op`	Convert two packed f16 values to packed
`CvtScaleF32PkFp4F32Op`	Convert two single-precision float values, passed in `src0` and `src1`
`CvtScaleF32PkFp8Bf16Op`	Convert two bf16 values in `src0` to two fp8 bytes, dividing by the exponent in `scale`. The bytes are
`CvtScaleF32PkFp8F16Op`	Convert two f16 values in `src0` to two fp8 bytes, dividing by the exponent in `scale`. The bytes are
`CvtScaleF32PkFp8F32Op`	Convert two f32 values in `src0` and `src1` to two fp8 bytes,
`CvtScaleF32SrBf8BF16Op`	Convert a bf16 value in `src0` to a bf8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrBf8F16Op`	Convert a f16 value in `src0` to a bf8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrBf8F32Op`	Convert a f32 value in `src0` to a bf8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrFp8BF16Op`	Convert a bf16 value in `src0` to a fp8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrFp8F16Op`	Convert a f16 value in `src0` to a fp8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrFp8F32Op`	Convert a f32 value in `src0` to a fp8 bytes, dividing by the exponent in `scale` and using `seed`
`CvtScaleF32SrPk8Bf8Bf16Op`	Convert 8 packed bf16 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Bf8F16Op`	Convert 8 packed f16 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Bf8F32Op`	Convert 8 packed f32 values to packed bf8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp4Bf16Op`	Convert 8 packed bf16 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp4F16Op`	Convert 8 packed f16 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp4F32Op`	Convert 8 packed f32 values to packed fp4, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp8Bf16Op`	Convert 8 packed bf16 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp8F16Op`	Convert 8 packed f16 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk8Fp8F32Op`	Convert 8 packed f32 values to packed fp8, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Bf6Bf16Op`	Convert 8 packed bf16 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Bf6F16Op`	Convert 8 packed f16 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Bf6F32Op`	Convert 8 packed f32 values to packed bf6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Fp6Bf16Op`	Convert 8 packed bf16 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Fp6F16Op`	Convert 8 packed f16 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk16Fp6F32Op`	Convert 8 packed f32 values to packed fp6, multiplying by the exponent part of `scale`
`CvtScaleF32SrPk32Bf6Bf16Op`	Convert 32 packed bf16 values to packed bf6, dividing by the exponent part of `scale`
`CvtScaleF32SrPk32Bf6F16Op`	Convert 32 packed f16 values to packed bf6, dividing by the exponent part of `scale`
`CvtScaleF32SrPk32Bf6F32Op`	Convert 32 packed f32 values to packed bf6, dividing by the exponent part of `scale`
`CvtScaleF32SrPk32Fp6Bf16Op`	Convert 32 packed bf16 values to packed fp6, dividing by the exponent part of `scale`
`CvtScaleF32SrPk32Fp6F16Op`	Convert 32 packed f16 values to packed fp6, dividing by the exponent part of `scale`
`CvtScaleF32SrPk32Fp6F32Op`	Convert 32 packed f32 values to packed fp6, dividing by the exponent part of `scale`
`CvtScaleF32SrPkFp4Bf16Op`	Convert two packed bf16 values to packed
`CvtScaleF32SrPkFp4F16Op`	Convert two packed f16 values to packed
`CvtScaleF32SrPkFp4F32Op`	Convert two packed f32 values to packed
`CvtScaleF322xPk16Bf6F32Op`	Convert 32 single-precision float values, packed into two length-16
`CvtScaleF322xPk16Fp6F32Op`	Convert 32 single-precision float values, packed into two length-16
`CvtSrBf8F32Op`	Convert `srcA` to bf8, adding the rounding factor from `srcB`,
`CvtSrFp8F32Op`	Convert `srcA` to fp8, adding the rounding factor from `srcB`,
`DPPUpdateOp`
`DsBpermuteOp`
`DsLoadTr4_B64`	Load a matrix of 4-bit data from the ds memory,
`DsLoadTr6_B96`	Load a matrix of 6-bit data from the ds memory,
`DsLoadTr8_B64`	Load a matrix of 8-bit data from the ds memory,
`DsLoadTr16_B128`	Load a matrix of 16-bit data from the ds memory,
`DsSwizzleOp`
`FMed3Op`	Computes the median of three floating-point values using the AMDGPU fmed3 intrinsic.
`GetBarrierStateOp`	Available on gfx1250+.
`GlobalLoadAsyncToLDSB8Op`	Asynchronously loads 8 bits of data from a global memory pointer
`GlobalLoadAsyncToLDSB32Op`	Asynchronously loads 32 bits of data from a global memory pointer
`GlobalLoadAsyncToLDSB64Op`	Asynchronously loads 64 bits of data from a global memory pointer
`GlobalLoadAsyncToLDSB128Op`	Asynchronously loads 128 bits of data from a global memory pointer
`GlobalLoadLDSOp`
`GlobalLoadTr4_B64`	Load a matrix of 4-bit data from the global memory,
`GlobalLoadTr6_B96`	Load a matrix of 6-bit data from the global memory,
`GlobalLoadTr8_B64`	Load a matrix of 8-bit data from the global memory,
`GlobalLoadTr8_B128`	Load a matrix of 16-bit data from the global memory,
`GridDimXOp`
`GridDimYOp`
`GridDimZOp`
`IglpOpt`
`LoadToLDSOp`
`MakeBufferRsrcOp`
`MbcntHiOp`
`MbcntLoOp`
`Permlane16SwapOp`	Performs a `permlane16.swap` operation with the given operands, applying the
`Permlane32SwapOp`	Performs a `permlane32.swap` operation with the given operands, applying the
`PermlaneX16Op`	Performs a `permlanex16` operation with the given operands, applying the
`RawBufferAtomicCmpSwap`
`RawBufferAtomicFAddOp`
`RawBufferAtomicFMaxOp`
`RawBufferAtomicSMaxOp`
`RawBufferAtomicUMinOp`
`RawBufferLoadOp`
`RawBufferStoreOp`
`RawPtrBufferAtomicCmpSwap`
`RawPtrBufferAtomicFaddOp`
`RawPtrBufferAtomicFmaxOp`
`RawPtrBufferAtomicSmaxOp`
`RawPtrBufferAtomicUminOp`
`RawPtrBufferLoadLdsOp`
`RawPtrBufferLoadOp`
`RawPtrBufferStoreOp`
`ReadfirstlaneOp`	Returns the value in the lowest active lane of the input operand.
`ReadlaneOp`	Get the value in lane `src1` from input `src0`.
`SBarrierOp`
`SSleepOp`
`SWaitcntOp`
`SchedBarrier`
`SchedGroupBarrier`
`SetPrioOp`
`TensorLoadToLDSD2Op`	Moves tiles of tensor data between global memory and LDS. The tile is
`TensorLoadToLDSOp`	Moves tiles of tensor data between global memory and LDS. The tile is
`TensorStoreFromLDSD2Op`	Moves tiles of tensor data between global memory and LDS. The tile is
`TensorStoreFromLDSOp`	Moves tiles of tensor data between global memory and LDS. The tile is
`ThreadIdXOp`
`ThreadIdYOp`
`ThreadIdZOp`
`WaitAsynccntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WaitDscntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WaitExpcntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WaitLoadcntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WaitStorecntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WaitTensorcntOp`	Wait for the counter specified to be less-than or equal-to the `count`
`WavefrontSizeOp`
`ds_read_tr4_b64`
`ds_read_tr6_b96`
`ds_read_tr8_b64`
`ds_read_tr16_b64`
`mfma_f32_4x4x1f32`
`mfma_f32_4x4x2bf16`
`mfma_f32_4x4x4bf16_1k`
`mfma_f32_4x4x4f16`
`mfma_f32_16x16x1f32`
`mfma_f32_16x16x2bf16`
`mfma_f32_16x16x4bf16_1k`
`mfma_f32_16x16x4f16`
`mfma_f32_16x16x4f32`
`mfma_f32_16x16x8_xf32`
`mfma_f32_16x16x8bf16`
`mfma_f32_16x16x16bf16_1k`
`mfma_f32_16x16x16f16`
`mfma_f32_16x16x32_bf8_bf8`
`mfma_f32_16x16x32_bf8_fp8`
`mfma_f32_16x16x32_bf16`
`mfma_f32_16x16x32_f16`
`mfma_f32_16x16x32_fp8_bf8`
`mfma_f32_16x16x32_fp8_fp8`
`mfma_f32_32x32x1f32`
`mfma_f32_32x32x2bf16`
`mfma_f32_32x32x2f32`
`mfma_f32_32x32x4_xf32`
`mfma_f32_32x32x4bf16`
`mfma_f32_32x32x4bf16_1k`
`mfma_f32_32x32x4f16`
`mfma_f32_32x32x8bf16_1k`
`mfma_f32_32x32x8f16`
`mfma_f32_32x32x16_bf8_bf8`
`mfma_f32_32x32x16_bf8_fp8`
`mfma_f32_32x32x16_bf16`
`mfma_f32_32x32x16_f16`
`mfma_f32_32x32x16_fp8_bf8`
`mfma_f32_32x32x16_fp8_fp8`
`mfma_f64_4x4x4f64`
`mfma_f64_16x16x4f64`
`mfma_i32_4x4x4i8`
`mfma_i32_16x16x4i8`
`mfma_i32_16x16x16i8`
`mfma_i32_16x16x32_i8`
`mfma_i32_16x16x64_i8`
`mfma_i32_32x32x4i8`
`mfma_i32_32x32x8i8`
`mfma_i32_32x32x16_i8`
`mfma_i32_32x32x32_i8`
`mfma_scale_f32_16x16x128_f8f6f4`
`mfma_scale_f32_32x32x64_f8f6f4`
`smfmac_f32_16x16x32_bf16`
`smfmac_f32_16x16x32_f16`
`smfmac_f32_16x16x64_bf8_bf8`
`smfmac_f32_16x16x64_bf8_fp8`
`smfmac_f32_16x16x64_fp8_bf8`
`smfmac_f32_16x16x64_fp8_fp8`
`smfmac_f32_32x32x16_bf16`
`smfmac_f32_32x32x16_f16`
`smfmac_f32_32x32x32_bf8_bf8`
`smfmac_f32_32x32x32_bf8_fp8`
`smfmac_f32_32x32x32_fp8_bf8`
`smfmac_f32_32x32x32_fp8_fp8`
`smfmac_i32_16x16x64_i8`
`smfmac_i32_32x32x32_i8`
`wmma_bf16_16x16x16_bf16`
`wmma_bf16_16x16x32_bf16`
`wmma_bf16f32_16x16x32_bf16`
`wmma_f16_16x16x16_f16`
`wmma_f16_16x16x32_f16`
`wmma_f16_16x16x64_bf8_bf8`
`wmma_f16_16x16x64_bf8_fp8`
`wmma_f16_16x16x64_fp8_bf8`
`wmma_f16_16x16x64_fp8_fp8`
`wmma_f16_16x16x128_bf8_bf8`
`wmma_f16_16x16x128_bf8_fp8`
`wmma_f16_16x16x128_fp8_bf8`
`wmma_f16_16x16x128_fp8_fp8`
`wmma_f32_16x16x4_f32`
`wmma_f32_16x16x16_bf8_bf8`
`wmma_f32_16x16x16_bf8_fp8`
`wmma_f32_16x16x16_bf16`
`wmma_f32_16x16x16_f16`
`wmma_f32_16x16x16_fp8_bf8`
`wmma_f32_16x16x16_fp8_fp8`
`wmma_f32_16x16x32_bf16`
`wmma_f32_16x16x32_f16`
`wmma_f32_16x16x64_bf8_bf8`
`wmma_f32_16x16x64_bf8_fp8`
`wmma_f32_16x16x64_fp8_bf8`
`wmma_f32_16x16x64_fp8_fp8`
`wmma_f32_16x16x128_bf8_bf8`
`wmma_f32_16x16x128_bf8_fp8`
`wmma_f32_16x16x128_fp8_bf8`
`wmma_f32_16x16x128_fp8_fp8`
`wmma_i32_16x16x16_iu4`
`wmma_i32_16x16x16_iu8`
`wmma_i32_16x16x32_iu4`
`wmma_i32_16x16x64_iu8`

Functions¶

`ballot`(→ _ods_ir)
`s_barrier_init`(→ BarrierInitOp)
`s_barrier_join`(→ BarrierJoinOp)
`s_barrier_leave`(→ BarrierLeaveOp)
`barrier`(→ BarrierOp)
`s_barrier_signal_isfirst`(→ _ods_ir)
`s_barrier_signal`(→ BarrierSignalOp)
`s_barrier_signal_var`(→ BarrierSignalVarOp)
`s_barrier_wait`(→ BarrierWaitOp)
`workgroup_dim_x`(→ _ods_ir)
`workgroup_dim_y`(→ _ods_ir)
`workgroup_dim_z`(→ _ods_ir)
`workgroup_id_x`(→ _ods_ir)
`workgroup_id_y`(→ _ods_ir)
`workgroup_id_z`(→ _ods_ir)
`cvt_f32_bf8`(→ _ods_ir)
`cvt_f32_fp8`(→ _ods_ir)
`cvt_pk_bf8_f32`(→ _ods_ir)
`cvt_pk_f32_bf8`(→ _ods_ir)
`cvt_pk_f32_fp8`(→ _ods_ir)
`cvt_pk_fp8_f32`(→ _ods_ir)
`cvt_pkrtz`(→ _ods_ir)
`cvt_scale_pk8_bf16_bf8`(→ _ods_ir)
`cvt_scale_pk8_bf16_fp4`(→ _ods_ir)
`cvt_scale_pk8_bf16_fp8`(→ _ods_ir)
`cvt_scale_pk8_f16_bf8`(→ _ods_ir)
`cvt_scale_pk8_f16_fp4`(→ _ods_ir)
`cvt_scale_pk8_f16_fp8`(→ _ods_ir)
`cvt_scale_pk8_f32_bf8`(→ _ods_ir)
`cvt_scale_pk8_f32_fp4`(→ _ods_ir)
`cvt_scale_pk8_f32_fp8`(→ _ods_ir)
`cvt_scale_pk16_bf16_bf6`(→ _ods_ir)
`cvt_scale_pk16_bf16_fp6`(→ _ods_ir)
`cvt_scale_pk16_f16_bf6`(→ _ods_ir)
`cvt_scale_pk16_f16_fp6`(→ _ods_ir)
`cvt_scale_pk16_f32_bf6`(→ _ods_ir)
`cvt_scale_pk16_f32_fp6`(→ _ods_ir)
`cvt_scalef32_f16_bf8`(→ _ods_ir)
`cvt_scalef32_f16_fp8`(→ _ods_ir)
`cvt_scalef32_f32_bf8`(→ _ods_ir)
`cvt_scalef32_f32_fp8`(→ _ods_ir)
`cvt_scalef32_pk8_bf8_bf16`(→ _ods_ir)
`cvt_scalef32_pk8_bf8_f16`(→ _ods_ir)
`cvt_scalef32_pk8_bf8_f32`(→ _ods_ir)
`cvt_scalef32_pk8_fp4_bf16`(→ _ods_ir)
`cvt_scalef32_pk8_fp4_f16`(→ _ods_ir)
`cvt_scalef32_pk8_fp4_f32`(→ _ods_ir)
`cvt_scalef32_pk8_fp8_bf16`(→ _ods_ir)
`cvt_scalef32_pk8_fp8_f16`(→ _ods_ir)
`cvt_scalef32_pk8_fp8_f32`(→ _ods_ir)
`cvt_scalef32_pk16_bf6_bf16`(→ _ods_ir)
`cvt_scalef32_pk16_bf6_f16`(→ _ods_ir)
`cvt_scalef32_pk16_bf6_f32`(→ _ods_ir)
`cvt_scalef32_pk16_fp6_bf16`(→ _ods_ir)
`cvt_scalef32_pk16_fp6_f16`(→ _ods_ir)
`cvt_scalef32_pk16_fp6_f32`(→ _ods_ir)
`cvt_scalef32_pk32_bf6_bf16`(→ _ods_ir)
`cvt_scalef32_pk32_bf6_f16`(→ _ods_ir)
`cvt_scalef32_pk32_bf16_bf6`(→ _ods_ir)
`cvt_scalef32_pk32_bf16_fp6`(→ _ods_ir)
`cvt_scalef32_pk32_f16_bf6`(→ _ods_ir)
`cvt_scalef32_pk32_f16_fp6`(→ _ods_ir)
`cvt_scalef32_pk32_f32_bf6`(→ _ods_ir)
`cvt_scalef32_pk32_f32_fp6`(→ _ods_ir)
`cvt_scalef32_pk32_fp6_bf16`(→ _ods_ir)
`cvt_scalef32_pk32_fp6_f16`(→ _ods_ir)
`cvt_scalef32_pk_bf8_bf16`(→ _ods_ir)
`cvt_scalef32_pk_bf8_f16`(→ _ods_ir)
`cvt_scalef32_pk_bf8_f32`(→ _ods_ir)
`cvt_scalef32_pk_bf16_bf8`(→ _ods_ir)
`cvt_scalef32_pk_bf16_fp4`(→ _ods_ir)
`cvt_scalef32_pk_bf16_fp8`(→ _ods_ir)
`cvt_scalef32_pk_f16_bf8`(→ _ods_ir)
`cvt_scalef32_pk_f16_fp4`(→ _ods_ir)
`cvt_scalef32_pk_f16_fp8`(→ _ods_ir)
`cvt_scalef32_pk_f32_bf8`(→ _ods_ir)
`cvt_scalef32_pk_f32_fp4`(→ _ods_ir)
`cvt_scalef32_pk_f32_fp8`(→ _ods_ir)
`cvt_scalef32_pk_fp4_bf16`(→ _ods_ir)
`cvt_scalef32_pk_fp4_f16`(→ _ods_ir)
`cvt_scalef32_pk_fp4_f32`(→ _ods_ir)
`cvt_scalef32_pk_fp8_bf16`(→ _ods_ir)
`cvt_scalef32_pk_fp8_f16`(→ _ods_ir)
`cvt_scalef32_pk_fp8_f32`(→ _ods_ir)
`cvt_scalef32_sr_bf8_bf16`(→ _ods_ir)
`cvt_scalef32_sr_bf8_f16`(→ _ods_ir)
`cvt_scalef32_sr_bf8_f32`(→ _ods_ir)
`cvt_scalef32_sr_fp8_bf16`(→ _ods_ir)
`cvt_scalef32_sr_fp8_f16`(→ _ods_ir)
`cvt_scalef32_sr_fp8_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk8_bf8_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_bf8_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_bf8_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp4_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp4_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp4_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp8_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp8_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk8_fp8_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk16_bf6_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk16_bf6_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk16_bf6_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk16_fp6_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk16_fp6_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk16_fp6_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk32_bf6_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk32_bf6_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk32_bf6_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk32_fp6_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk32_fp6_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk32_fp6_f32`(→ _ods_ir)
`cvt_scalef32_sr_pk_fp4_bf16`(→ _ods_ir)
`cvt_scalef32_sr_pk_fp4_f16`(→ _ods_ir)
`cvt_scalef32_sr_pk_fp4_f32`(→ _ods_ir)
`cvt_scalef32_2xpk16_bf6_f32`(→ _ods_ir)
`cvt_scalef32_2xpk16_fp6_f32`(→ _ods_ir)
`cvt_sr_bf8_f32`(→ _ods_ir)
`cvt_sr_fp8_f32`(→ _ods_ir)
`update_dpp`(→ _ods_ir)
`ds_bpermute`(→ _ods_ir)
`ds_load_tr4_b64`(→ _ods_ir)
`ds_load_tr6_b96`(→ _ods_ir)
`ds_load_tr8_b64`(→ _ods_ir)
`ds_load_tr16_b128`(→ _ods_ir)
`ds_swizzle`(→ _ods_ir)
`fmed3`(→ _ods_ir)
`s_get_barrier_state`(→ _ods_ir)
`global_load_async_to_lds_b8`(→ GlobalLoadAsyncToLDSB8Op)
`global_load_async_to_lds_b32`(→ GlobalLoadAsyncToLDSB32Op)
`global_load_async_to_lds_b64`(→ GlobalLoadAsyncToLDSB64Op)
`global_load_async_to_lds_b128`(→ GlobalLoadAsyncToLDSB128Op)
`global_load_lds`(→ GlobalLoadLDSOp)
`global_load_tr4_b64`(→ _ods_ir)
`global_load_tr6_b96`(→ _ods_ir)
`global_load_tr_b64`(→ _ods_ir)
`global_load_tr_b128`(→ _ods_ir)
`grid_dim_x`(→ _ods_ir)
`grid_dim_y`(→ _ods_ir)
`grid_dim_z`(→ _ods_ir)
`iglp_opt`(→ IglpOpt)
`load_to_lds`(→ LoadToLDSOp)
`make_buffer_rsrc`(→ _ods_ir)
`mbcnt_hi`(→ _ods_ir)
`mbcnt_lo`(→ _ods_ir)
`permlane16_swap`(→ _ods_ir)
`permlane32_swap`(→ _ods_ir)
`permlanex16`(→ _ods_ir)
`raw_buffer_atomic_cmpswap`(→ _ods_ir)
`raw_buffer_atomic_fadd`(→ RawBufferAtomicFAddOp)
`raw_buffer_atomic_fmax`(→ RawBufferAtomicFMaxOp)
`raw_buffer_atomic_smax`(→ RawBufferAtomicSMaxOp)
`raw_buffer_atomic_umin`(→ RawBufferAtomicUMinOp)
`raw_buffer_load`(→ _ods_ir)
`raw_buffer_store`(→ RawBufferStoreOp)
`raw_ptr_buffer_atomic_cmpswap`(→ _ods_ir)
`raw_ptr_buffer_atomic_fadd`(→ RawPtrBufferAtomicFaddOp)
`raw_ptr_buffer_atomic_fmax`(→ RawPtrBufferAtomicFmaxOp)
`raw_ptr_buffer_atomic_smax`(→ RawPtrBufferAtomicSmaxOp)
`raw_ptr_buffer_atomic_umin`(→ RawPtrBufferAtomicUminOp)
`raw_ptr_buffer_load_lds`(→ RawPtrBufferLoadLdsOp)
`raw_ptr_buffer_load`(→ _ods_ir)
`raw_ptr_buffer_store`(→ RawPtrBufferStoreOp)
`readfirstlane`(→ _ods_ir)
`readlane`(→ _ods_ir)
`s_barrier`(→ SBarrierOp)
`s_sleep`(→ SSleepOp)
`s_waitcnt`(→ SWaitcntOp)
`sched_barrier`(→ SchedBarrier)
`sched_group_barrier`(→ SchedGroupBarrier)
`s_setprio`(→ SetPrioOp)
`tensor_load_to_lds_d2`(→ TensorLoadToLDSD2Op)
`tensor_load_to_lds`(→ TensorLoadToLDSOp)
`tensor_store_from_lds_d2`(→ TensorStoreFromLDSD2Op)
`tensor_store_from_lds`(→ TensorStoreFromLDSOp)
`workitem_id_x`(→ _ods_ir)
`workitem_id_y`(→ _ods_ir)
`workitem_id_z`(→ _ods_ir)
`s_wait_asynccnt`(→ WaitAsynccntOp)
`s_wait_dscnt`(→ WaitDscntOp)
`s_wait_expcnt`(→ WaitExpcntOp)
`s_wait_loadcnt`(→ WaitLoadcntOp)
`s_wait_storecnt`(→ WaitStorecntOp)
`s_wait_tensorcnt`(→ WaitTensorcntOp)
`wavefrontsize`(→ _ods_ir)
`ds_read_tr4_b64_`(→ _ods_ir)
`ds_read_tr6_b96_`(→ _ods_ir)
`ds_read_tr8_b64_`(→ _ods_ir)
`ds_read_tr16_b64_`(→ _ods_ir)
`mfma_f32_4x4x1f32_`(→ _ods_ir)
`mfma_f32_4x4x2bf16_`(→ _ods_ir)
`mfma_f32_4x4x4bf16_1k_`(→ _ods_ir)
`mfma_f32_4x4x4f16_`(→ _ods_ir)
`mfma_f32_16x16x1f32_`(→ _ods_ir)
`mfma_f32_16x16x2bf16_`(→ _ods_ir)
`mfma_f32_16x16x4bf16_1k_`(→ _ods_ir)
`mfma_f32_16x16x4f16_`(→ _ods_ir)
`mfma_f32_16x16x4f32_`(→ _ods_ir)
`mfma_f32_16x16x8_xf32_`(→ _ods_ir)
`mfma_f32_16x16x8bf16_`(→ _ods_ir)
`mfma_f32_16x16x16bf16_1k_`(→ _ods_ir)
`mfma_f32_16x16x16f16_`(→ _ods_ir)
`mfma_f32_16x16x32_bf8_bf8_`(→ _ods_ir)
`mfma_f32_16x16x32_bf8_fp8_`(→ _ods_ir)
`mfma_f32_16x16x32_bf16_`(→ _ods_ir)
`mfma_f32_16x16x32_f16_`(→ _ods_ir)
`mfma_f32_16x16x32_fp8_bf8_`(→ _ods_ir)
`mfma_f32_16x16x32_fp8_fp8_`(→ _ods_ir)
`mfma_f32_32x32x1f32_`(→ _ods_ir)
`mfma_f32_32x32x2bf16_`(→ _ods_ir)
`mfma_f32_32x32x2f32_`(→ _ods_ir)
`mfma_f32_32x32x4_xf32_`(→ _ods_ir)
`mfma_f32_32x32x4bf16_`(→ _ods_ir)
`mfma_f32_32x32x4bf16_1k_`(→ _ods_ir)
`mfma_f32_32x32x4f16_`(→ _ods_ir)
`mfma_f32_32x32x8bf16_1k_`(→ _ods_ir)
`mfma_f32_32x32x8f16_`(→ _ods_ir)
`mfma_f32_32x32x16_bf8_bf8_`(→ _ods_ir)
`mfma_f32_32x32x16_bf8_fp8_`(→ _ods_ir)
`mfma_f32_32x32x16_bf16_`(→ _ods_ir)
`mfma_f32_32x32x16_f16_`(→ _ods_ir)
`mfma_f32_32x32x16_fp8_bf8_`(→ _ods_ir)
`mfma_f32_32x32x16_fp8_fp8_`(→ _ods_ir)
`mfma_f64_4x4x4f64_`(→ _ods_ir)
`mfma_f64_16x16x4f64_`(→ _ods_ir)
`mfma_i32_4x4x4i8_`(→ _ods_ir)
`mfma_i32_16x16x4i8_`(→ _ods_ir)
`mfma_i32_16x16x16i8_`(→ _ods_ir)
`mfma_i32_16x16x32_i8_`(→ _ods_ir)
`mfma_i32_16x16x64_i8_`(→ _ods_ir)
`mfma_i32_32x32x4i8_`(→ _ods_ir)
`mfma_i32_32x32x8i8_`(→ _ods_ir)
`mfma_i32_32x32x16_i8_`(→ _ods_ir)
`mfma_i32_32x32x32_i8_`(→ _ods_ir)
`mfma_scale_f32_16x16x128_f8f6f4_`(→ _ods_ir)
`mfma_scale_f32_32x32x64_f8f6f4_`(→ _ods_ir)
`smfmac_f32_16x16x32_bf16_`(→ _ods_ir)
`smfmac_f32_16x16x32_f16_`(→ _ods_ir)
`smfmac_f32_16x16x64_bf8_bf8_`(→ _ods_ir)
`smfmac_f32_16x16x64_bf8_fp8_`(→ _ods_ir)
`smfmac_f32_16x16x64_fp8_bf8_`(→ _ods_ir)
`smfmac_f32_16x16x64_fp8_fp8_`(→ _ods_ir)
`smfmac_f32_32x32x16_bf16_`(→ _ods_ir)
`smfmac_f32_32x32x16_f16_`(→ _ods_ir)
`smfmac_f32_32x32x32_bf8_bf8_`(→ _ods_ir)
`smfmac_f32_32x32x32_bf8_fp8_`(→ _ods_ir)
`smfmac_f32_32x32x32_fp8_bf8_`(→ _ods_ir)
`smfmac_f32_32x32x32_fp8_fp8_`(→ _ods_ir)
`smfmac_i32_16x16x64_i8_`(→ _ods_ir)
`smfmac_i32_32x32x32_i8_`(→ _ods_ir)
`wmma_bf16_16x16x16_bf16_`(→ _ods_ir)
`wmma_bf16_16x16x32_bf16_`(→ _ods_ir)
`wmma_bf16f32_16x16x32_bf16_`(→ _ods_ir)
`wmma_f16_16x16x16_f16_`(→ _ods_ir)
`wmma_f16_16x16x32_f16_`(→ _ods_ir)
`wmma_f16_16x16x64_bf8_bf8_`(→ _ods_ir)
`wmma_f16_16x16x64_bf8_fp8_`(→ _ods_ir)
`wmma_f16_16x16x64_fp8_bf8_`(→ _ods_ir)
`wmma_f16_16x16x64_fp8_fp8_`(→ _ods_ir)
`wmma_f16_16x16x128_bf8_bf8_`(→ _ods_ir)
`wmma_f16_16x16x128_bf8_fp8_`(→ _ods_ir)
`wmma_f16_16x16x128_fp8_bf8_`(→ _ods_ir)
`wmma_f16_16x16x128_fp8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x4_f32_`(→ _ods_ir)
`wmma_f32_16x16x16_bf8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x16_bf8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x16_bf16_`(→ _ods_ir)
`wmma_f32_16x16x16_f16_`(→ _ods_ir)
`wmma_f32_16x16x16_fp8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x16_fp8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x32_bf16_`(→ _ods_ir)
`wmma_f32_16x16x32_f16_`(→ _ods_ir)
`wmma_f32_16x16x64_bf8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x64_bf8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x64_fp8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x64_fp8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x128_bf8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x128_bf8_fp8_`(→ _ods_ir)
`wmma_f32_16x16x128_fp8_bf8_`(→ _ods_ir)
`wmma_f32_16x16x128_fp8_fp8_`(→ _ods_ir)
`wmma_i32_16x16x16_iu4_`(→ _ods_ir)
`wmma_i32_16x16x16_iu8_`(→ _ods_ir)
`wmma_i32_16x16x32_iu4_`(→ _ods_ir)
`wmma_i32_16x16x64_iu8_`(→ _ods_ir)

Module Contents¶

mlir.dialects._rocdl_ops_gen._ods_ir¶

class mlir.dialects._rocdl_ops_gen._Dialect(descriptor: object)¶

Bases: _ods_ir

DIALECT_NAMESPACE = 'rocdl'¶

class mlir.dialects._rocdl_ops_gen.BallotOp(res, pred, *, loc=None, ip=None)¶

Bases: _ods_ir

Ballot provides a bit mask containing the 1-bit predicate value from each lane. The nth bit of the result contains the 1 bit contributed by the nth warp lane.

OPERATION_NAME = 'rocdl.ballot'¶

_ODS_REGIONS = (0, True)¶

pred() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ballot(res, pred, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BarrierInitOp(ptr, id, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.barrier.init'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

id() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_init(ptr, id, *, loc=None, ip=None) → BarrierInitOp¶

class mlir.dialects._rocdl_ops_gen.BarrierJoinOp(ptr, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.barrier.join'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_join(ptr, *, loc=None, ip=None) → BarrierJoinOp¶

class mlir.dialects._rocdl_ops_gen.BarrierLeaveOp(id, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.barrier.leave'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_leave(id, *, loc=None, ip=None) → BarrierLeaveOp¶

class mlir.dialects._rocdl_ops_gen.BarrierOp(*, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.barrier'¶

_ODS_REGIONS = (0, True)¶

mlir.dialects._rocdl_ops_gen.barrier(*, loc=None, ip=None) → BarrierOp¶

class mlir.dialects._rocdl_ops_gen.BarrierSignalIsfirstOp(res, id, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.barrier.signal.isfirst'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_signal_isfirst(res, id, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BarrierSignalOp(id, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.barrier.signal'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_signal(id, *, loc=None, ip=None) → BarrierSignalOp¶

class mlir.dialects._rocdl_ops_gen.BarrierSignalVarOp(ptr, id, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.barrier.signal.var'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

id() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_signal_var(ptr, id, *, loc=None, ip=None) → BarrierSignalVarOp¶

class mlir.dialects._rocdl_ops_gen.BarrierWaitOp(id, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.barrier.wait'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_barrier_wait(id, *, loc=None, ip=None) → BarrierWaitOp¶

class mlir.dialects._rocdl_ops_gen.BlockDimXOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.dim.x'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_dim_x(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BlockDimYOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.dim.y'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_dim_y(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BlockDimZOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.dim.z'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_dim_z(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BlockIdXOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.id.x'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_id_x(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BlockIdYOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.id.y'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_id_y(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.BlockIdZOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workgroup.id.z'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workgroup_id_z(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtF32Bf8Op(res, srcA, byteSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8-bit bf8 value from the byteSel``th bit of ``srcA to fp32.

OPERATION_NAME = 'rocdl.cvt.f32.bf8'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

byteSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_f32_bf8(res, src_a, byte_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtF32Fp8Op(res, srcA, byteSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8-bit fp8 value from the byteSel``th bit of ``srcA to fp32.

OPERATION_NAME = 'rocdl.cvt.f32.fp8'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

byteSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_f32_fp8(res, src_a, byte_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkBf8F32Op(res, srcA, srcB, old, wordSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert srcA and srcB to bf8 and store into the low/high word of old, preserving the other word.

OPERATION_NAME = 'rocdl.cvt.pk.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

srcB() → _ods_ir¶

old() → _ods_ir¶

wordSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_pk_bf8_f32(res, src_a, src_b, old, word_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkF32Bf8Op(res, src, wordSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert src based on $wordSel to packed fp32,

OPERATION_NAME = 'rocdl.cvt.pk.f32.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

wordSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_pk_f32_bf8(res, src, word_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkF32Fp8Op(res, src, wordSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert src based on $wordSel to packed fp32.

OPERATION_NAME = 'rocdl.cvt.pk.f32.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

wordSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_pk_f32_fp8(res, src, word_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkFp8F32Op(res, srcA, srcB, old, wordSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert srcA and srcB to fp8 and store into the low/high word of old, preserving the other word.

OPERATION_NAME = 'rocdl.cvt.pk.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

srcB() → _ods_ir¶

old() → _ods_ir¶

wordSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_pk_fp8_f32(res, src_a, src_b, old, word_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkRtz(res, srcA, srcB, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two f32 values into a packed vector<2xf16>.

OPERATION_NAME = 'rocdl.cvt.pkrtz'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

srcB() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_pkrtz(res, src_a, src_b, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8Bf16Bf8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.bf16.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_bf16_bf8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8Bf16Fp4Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.bf16.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_bf16_fp4(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8Bf16Fp8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.bf16.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_bf16_fp8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F16Bf8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f16.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f16_bf8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F16Fp4Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f16.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f16_fp4(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F16Fp8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f16.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f16_fp8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F32Bf8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f32.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f32_bf8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F32Fp4Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f32.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f32_fp4(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk8F32Fp8Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk8.f32.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk8_f32_fp8(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16Bf16Bf6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.bf16.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_bf16_bf6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16Bf16Fp6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.bf16.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_bf16_fp6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16F16Bf6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.f16.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_f16_bf6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16F16Fp6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.f16.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_f16_fp6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16F32Bf6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.f32.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_f32_bf6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtPkScalePk16F32Fp6Op(res, src, scale, scaleSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.cvt.scale.pk16.f32.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

scaleSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scale_pk16_f32_fp6(res, src, scale, scale_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32F16Bf8Op(res, oldVdst, src, scale, srcSelIndex, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a bf8 byte from src, selected by srcSelIndex, to f16 while multiplying it by the expontent of scale, and place it into the dstLoHiSel``th bit of ``oldVdst preserving the other element of that vector in the return value.

The bytes are stored as an i32 and not a <4 x i8>.

OPERATION_NAME = 'rocdl.cvt.scalef32.f16.bf8'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_f16_bf8(res, old_vdst, src, scale, src_sel_index, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32F16Fp8Op(res, oldVdst, src, scale, srcSelIndex, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a fp8 byte from src, selected by srcSelIndex, to f16 while multiplying it by the expontent of scale, and place it into the dstLoHiSel``th bit of ``oldVdst preserving the other element of that vector in the return value.

The bytes are stored as an i32 and not a <4 x i8>.

OPERATION_NAME = 'rocdl.cvt.scalef32.f16.fp8'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_f16_fp8(res, old_vdst, src, scale, src_sel_index, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32F32Bf8Op(res, src, scale, srcSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a bf8 byte from src, selected by srcSelIndex, to f32, multiplying it by the exponent of scale.

The bytes are stored in an i32, not a <4 x i8>.

OPERATION_NAME = 'rocdl.cvt.scalef32.f32.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_f32_bf8(res, src, scale, src_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32F32Fp8Op(res, src, scale, srcSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a fp8 byte from src, selected by srcSelIndex, to f32, multiplying it by the exponent of scale.

The bytes are stored in an i32, not a <4 x i8>.

OPERATION_NAME = 'rocdl.cvt.scalef32.f32.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_f32_fp8(res, src, scale, src_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Bf8Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed bf8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.bf8.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_bf8_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Bf8F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed bf8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.bf8.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_bf8_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Bf8F32Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed bf8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_bf8_f32(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp4Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp4, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp4.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp4_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp4F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp4, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp4.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp4_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp4F32Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp4, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp4.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp4_f32(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp8Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp8.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp8_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp8F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp8.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp8_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk8Fp8F32Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp8, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk8.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk8_fp8_f32(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Bf6Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed bf6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.bf6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_bf6_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Bf6F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed bf6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.bf6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_bf6_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Bf6F32Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed bf6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.bf6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_bf6_f32(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Fp6Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.fp6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_fp6_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Fp6F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.fp6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_fp6_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk16Fp6F32Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp6, multiplying by the exponent part of scale before doing so. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk16.fp6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk16_fp6_f32(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Bf6Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf16 values to packed bf6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.bf6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_bf6_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Bf6F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f16 values to packed bf6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.bf6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_bf6_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Bf16Bf6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf6 values to packed bf16, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.bf16.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_bf16_bf6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Bf16Fp6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed fp6 values to packed bf16, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.bf16.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_bf16_fp6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32F16Bf6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf6 values to packed f16, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.f16.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_f16_bf6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32F16Fp6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed fp6 values to packed f16, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.f16.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_f16_fp6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32F32Bf6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf6 values to packed f32, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.f32.bf6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_f32_bf6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32F32Fp6Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed fp6 values to packed f32, multiplying by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.f32.fp6'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_f32_fp6(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Fp6Bf16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf16 values to packed fp6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.fp6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_fp6_bf16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32Pk32Fp6F16Op(res, src, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f16 values to packed fp6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk32.fp6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk32_fp6_f16(res, src, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf8Bf16Op(res, oldVdst, src0, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two bf16 values in src0 to two bf8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf8.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf8_bf16(res, old_vdst, src0, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf8F16Op(res, oldVdst, src0, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two f16 values in src0 to two bf8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf8.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf8_f16(res, old_vdst, src0, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf8F32Op(res, oldVdst, src0, src1, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two f32 values in src0 and src1 to two bf8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

src1() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf8_f32(res, old_vdst, src0, src1, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf16Bf8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed bf8 values in src0 to two bf16 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf16.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf16_bf8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf16Fp4Op(res, src, scale, srcSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer to packed bf16, multiplying by the exponent part of scale before doing so.

The byte to convert is chosen by srcSelIndex.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf16.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf16_fp4(res, src, scale, src_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkBf16Fp8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp8 values in src0 to two bf16 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.bf16.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_bf16_fp8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF16Bf8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed bf8 values in src0 to two f16 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f16.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f16_bf8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF16Fp4Op(res, src, scale, srcSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer to packed f16, multiplying by the exponent part of scale before doing so.

The byte to convert is chosen by srcSelIndex.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f16.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f16_fp4(res, src, scale, src_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF16Fp8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp8 values in src0 to two f16 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f16.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f16_fp8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF32Bf8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed bf8 values in src0 to two f32 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f32.bf8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f32_bf8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF32Fp4Op(res, src, scale, srcSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp4 (f4E2M1) values stored as one byte of a 32-bit integer to packed f32, multiplying by the exponent part of scale before doing so.

The byte to convert is chosen by srcSelIndex.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f32.fp4'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f32_fp4(res, src, scale, src_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkF32Fp8Op(res, src, scale, srcLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed fp8 values in src0 to two f32 values, multiplying by the exponent in scale. The two values to be converted are selected from the low or high half of src (a packed vector represented as an i32) on the basis of srcLoHiSel.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.f32.fp8'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

scale() → _ods_ir¶

srcLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_f32_fp8(res, src, scale, src_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp4Bf16Op(res, oldVdst, src, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed bf16 values to packed fp4, dividing by the exponent part of scale before doing so.

The two scaled values are packed into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp4.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp4_bf16(res, old_vdst, src, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp4F16Op(res, oldVdst, src, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed f16 values to packed fp4, dividing by the exponent part of scale before doing so.

The two scaled values are packed into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp4.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp4_f16(res, old_vdst, src, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp4F32Op(res, oldVdst, src0, src1, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two single-precision float values, passed in src0 and src1 into two fp4 values, dividing them by the expontent part of scale before doing so.

The two scaled values are packed into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp4.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

src1() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp4_f32(res, old_vdst, src0, src1, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp8Bf16Op(res, oldVdst, src0, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two bf16 values in src0 to two fp8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp8.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp8_bf16(res, old_vdst, src0, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp8F16Op(res, oldVdst, src0, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two f16 values in src0 to two fp8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp8.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp8_f16(res, old_vdst, src0, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32PkFp8F32Op(res, oldVdst, src0, src1, scale, dstLoHiSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two f32 values in src0 and src1 to two fp8 bytes, dividing by the exponent in scale. The bytes are packed into a 16-bit value which is inserted into oldVdst at the dstLoHiSel position, with the entire updated vector being returned.

OPERATION_NAME = 'rocdl.cvt.scalef32.pk.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

src1() → _ods_ir¶

scale() → _ods_ir¶

dstLoHiSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_pk_fp8_f32(res, old_vdst, src0, src1, scale, dst_lo_hi_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrBf8BF16Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a bf16 value in src0 to a bf8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.bf8.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_bf8_bf16(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrBf8F16Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a f16 value in src0 to a bf8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.bf8.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_bf8_f16(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrBf8F32Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a f32 value in src0 to a bf8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_bf8_f32(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrFp8BF16Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a bf16 value in src0 to a fp8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.fp8.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_fp8_bf16(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrFp8F16Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a f16 value in src0 to a fp8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.fp8.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_fp8_f16(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrFp8F32Op(res, oldVdst, src0, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert a f32 value in src0 to a fp8 bytes, dividing by the exponent in scale and using seed for stochiastic rounding. Place the resulting byte in the dstSelIndex``th bit of ``oldVdst and return the entire packed vector, which is stored as an i32.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src0() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_fp8_f32(res, old_vdst, src0, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Bf8Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed bf8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.bf8.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_bf8_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Bf8F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed bf8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.bf8.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_bf8_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Bf8F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed bf8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_bf8_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp4Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp4, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp4.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp4_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp4F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp4, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp4.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp4_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp4F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp4, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp4.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp4_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp8Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp8.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp8_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp8F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp8.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp8_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk8Fp8F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp8, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk8.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk8_fp8_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Bf6Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed bf6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.bf6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_bf6_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Bf6F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed bf6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.bf6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_bf6_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Bf6F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed bf6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.bf6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_bf6_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Fp6Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed bf16 values to packed fp6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.fp6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_fp6_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Fp6F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f16 values to packed fp6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.fp6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_fp6_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk16Fp6F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 8 packed f32 values to packed fp6, multiplying by the exponent part of scale before doing so and apply stochastic rounding. This op is for gfx1250+ arch.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk16.fp6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk16_fp6_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Bf6Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf16 values to packed bf6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.bf6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_bf6_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Bf6F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f16 values to packed bf6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.bf6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_bf6_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Bf6F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f32 values to packed bf6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.bf6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_bf6_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Fp6Bf16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed bf16 values to packed fp6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.fp6.bf16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_fp6_bf16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Fp6F16Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f16 values to packed fp6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.fp6.f16'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_fp6_f16(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPk32Fp6F32Op(res, src, seed, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 packed f32 values to packed fp6, dividing by the exponent part of scale before doing so and applying random rounding derived from seed.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk32.fp6.f32'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk32_fp6_f32(res, src, seed, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPkFp4Bf16Op(res, oldVdst, src, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed bf16 values to packed fp4, dividing by the exponent part of scale before doing so and using seed as the random seed for stochiastic rounding.

The two scaled values are packed (little-endian) into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk.fp4.bf16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk_fp4_bf16(res, old_vdst, src, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPkFp4F16Op(res, oldVdst, src, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed f16 values to packed fp4, dividing by the exponent part of scale before doing so and using seed as the random seed for stochiastic rounding.

The two scaled values are packed (little-endian) into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk.fp4.f16'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk_fp4_f16(res, old_vdst, src, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF32SrPkFp4F32Op(res, oldVdst, src, seed, scale, dstSelIndex, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert two packed f32 values to packed fp4, dividing by the exponent part of scale before doing so and using seed as the random seed for stochiastic rounding.

The two scaled values are packed (little-endian) into a byte. That byte is used to update the dstSelIndex``th byte of ``oldVdst, which is returned in its entirity.

OPERATION_NAME = 'rocdl.cvt.scalef32.sr.pk.fp4.f32'¶

_ODS_REGIONS = (0, True)¶

oldVdst() → _ods_ir¶

src() → _ods_ir¶

seed() → _ods_ir¶

scale() → _ods_ir¶

dstSelIndex() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_sr_pk_fp4_f32(res, old_vdst, src, seed, scale, dst_sel_index, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF322xPk16Bf6F32Op(res, src0, src1, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 single-precision float values, packed into two length-16 vectors that will be logically concanenated, to packed bf6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.2xpk16.bf6.f32'¶

_ODS_REGIONS = (0, True)¶

src0() → _ods_ir¶

src1() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_2xpk16_bf6_f32(res, src0, src1, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtScaleF322xPk16Fp6F32Op(res, src0, src1, scale, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert 32 single-precision float values, packed into two length-16 vectors that will be logically concanenated, to packed fp6, dividing by the exponent part of scale before doing so.

OPERATION_NAME = 'rocdl.cvt.scalef32.2xpk16.fp6.f32'¶

_ODS_REGIONS = (0, True)¶

src0() → _ods_ir¶

src1() → _ods_ir¶

scale() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_scalef32_2xpk16_fp6_f32(res, src0, src1, scale, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtSrBf8F32Op(res, srcA, srcB, old, byteSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert srcA to bf8, adding the rounding factor from srcB, and store into the byteSel``th byte of ``old, preserving the others.

OPERATION_NAME = 'rocdl.cvt.sr.bf8.f32'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

srcB() → _ods_ir¶

old() → _ods_ir¶

byteSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_sr_bf8_f32(res, src_a, src_b, old, byte_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.CvtSrFp8F32Op(res, srcA, srcB, old, byteSel, *, loc=None, ip=None)¶

Bases: _ods_ir

Convert srcA to fp8, adding the rounding factor from srcB, and store into the byteSel``th byte of ``old, preserving the others.

OPERATION_NAME = 'rocdl.cvt.sr.fp8.f32'¶

_ODS_REGIONS = (0, True)¶

srcA() → _ods_ir¶

srcB() → _ods_ir¶

old() → _ods_ir¶

byteSel() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.cvt_sr_fp8_f32(res, src_a, src_b, old, byte_sel, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DPPUpdateOp(res, old, src, dppCtrl, rowMask, bankMask, boundCtrl, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.update.dpp'¶

_ODS_REGIONS = (0, True)¶

old() → _ods_ir¶

src() → _ods_ir¶

dppCtrl() → _ods_ir¶

rowMask() → _ods_ir¶

bankMask() → _ods_ir¶

boundCtrl() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.update_dpp(res, old, src, dpp_ctrl, row_mask, bank_mask, bound_ctrl, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsBpermuteOp(res, index, src, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds_bpermute'¶

_ODS_REGIONS = (0, True)¶

index() → _ods_ir¶

src() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_bpermute(res, index, src, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsLoadTr4_B64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 4-bit data from the ds memory, transpose data between row-major and column-major order, and store the result into a 64-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.ds.load.tr4.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_load_tr4_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsLoadTr6_B96(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 6-bit data from the ds memory, transpose data between row-major and column-major order, and store the result into a 96-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.ds.load.tr6.b96'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_load_tr6_b96(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsLoadTr8_B64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 8-bit data from the ds memory, transpose data between row-major and column-major order, and store the result into a 64-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.ds.load.tr8.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_load_tr8_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsLoadTr16_B128(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 16-bit data from the ds memory, transpose data between row-major and column-major order, and store the result into a 128-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.ds.load.tr16.b128'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_load_tr16_b128(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.DsSwizzleOp(res, src, offset, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds_swizzle'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

offset() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_swizzle(res, src, offset, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.FMed3Op(res, src0, src1, src2, *, loc=None, ip=None)¶

Bases: _ods_ir

Computes the median of three floating-point values using the AMDGPU fmed3 intrinsic. This operation is equivalent to max(min(a, b), min(max(a, b), c)) but uses the hardware-accelerated V_MED3_F16/V_MED3_F32 instruction for better performance.

The operation supports both scalar and vector floating-point types (f16, f32).

Example:

// Scalar f32 median
%result = rocdl.fmed3 %a, %b, %c : f32

// Vector f16 median
%result = rocdl.fmed3 %va, %vb, %vc : vector<4xf16>

OPERATION_NAME = 'rocdl.fmed3'¶

_ODS_REGIONS = (0, True)¶

src0() → _ods_ir¶

src1() → _ods_ir¶

src2() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.fmed3(res, src0, src1, src2, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GetBarrierStateOp(res, id, *, loc=None, ip=None)¶

Bases: _ods_ir

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.get.barrier.state'¶

_ODS_REGIONS = (0, True)¶

id() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_get_barrier_state(res, id, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadAsyncToLDSB8Op(globalPtr, ldsPtr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Asynchronously loads 8 bits of data from a global memory pointer to a Local Data Share (LDS) pointer.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.global.load.async.to.lds.b8'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.global_load_async_to_lds_b8(global_ptr, lds_ptr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → GlobalLoadAsyncToLDSB8Op¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadAsyncToLDSB32Op(globalPtr, ldsPtr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Asynchronously loads 32 bits of data from a global memory pointer to a Local Data Share (LDS) pointer.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.global.load.async.to.lds.b32'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.global_load_async_to_lds_b32(global_ptr, lds_ptr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → GlobalLoadAsyncToLDSB32Op¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadAsyncToLDSB64Op(globalPtr, ldsPtr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Asynchronously loads 64 bits of data from a global memory pointer to a Local Data Share (LDS) pointer.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.global.load.async.to.lds.b64'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.global_load_async_to_lds_b64(global_ptr, lds_ptr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → GlobalLoadAsyncToLDSB64Op¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadAsyncToLDSB128Op(globalPtr, ldsPtr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Asynchronously loads 128 bits of data from a global memory pointer to a Local Data Share (LDS) pointer.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.global.load.async.to.lds.b128'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.global_load_async_to_lds_b128(global_ptr, lds_ptr, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → GlobalLoadAsyncToLDSB128Op¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadLDSOp(globalPtr, ldsPtr, size, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.global.load.lds'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

size() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.global_load_lds(global_ptr, lds_ptr, size, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → GlobalLoadLDSOp¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadTr4_B64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 4-bit data from the global memory, transpose data between row-major and column-major order, and store the result into a 64-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.global.load.tr4.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.global_load_tr4_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadTr6_B96(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 6-bit data from the global memory, transpose data between row-major and column-major order, and store the result into a 96-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.global.load.tr6.b96'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.global_load_tr6_b96(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadTr8_B64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 8-bit data from the global memory, transpose data between row-major and column-major order, and store the result into a 64-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.global.load.tr.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.global_load_tr_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GlobalLoadTr8_B128(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Load a matrix of 16-bit data from the global memory, transpose data between row-major and column-major order, and store the result into a 128-bit vector register.

Available in gfx1250+.

OPERATION_NAME = 'rocdl.global.load.tr.b128'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.global_load_tr_b128(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GridDimXOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.grid.dim.x'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.grid_dim_x(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GridDimYOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.grid.dim.y'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.grid_dim_y(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.GridDimZOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.grid.dim.z'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.grid_dim_z(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.IglpOpt(variant, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.iglp.opt'¶

_ODS_REGIONS = (0, True)¶

variant() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.iglp_opt(variant, *, loc=None, ip=None) → IglpOpt¶

class mlir.dialects._rocdl_ops_gen.LoadToLDSOp(globalPtr, ldsPtr, size, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.load.to.lds'¶

_ODS_REGIONS = (0, True)¶

globalPtr() → _ods_ir¶

ldsPtr() → _ods_ir¶

size() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.load_to_lds(global_ptr, lds_ptr, size, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → LoadToLDSOp¶

class mlir.dialects._rocdl_ops_gen.MakeBufferRsrcOp(res, base, stride, numRecords, flags, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.make.buffer.rsrc'¶

_ODS_REGIONS = (0, True)¶

base() → _ods_ir¶

stride() → _ods_ir¶

numRecords() → _ods_ir¶

flags() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.make_buffer_rsrc(res, base, stride, num_records, flags, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.MbcntHiOp(res, in0, in1, *, arg_attrs=None, res_attrs=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mbcnt.hi'¶

_ODS_REGIONS = (0, True)¶

in0() → _ods_ir¶

in1() → _ods_ir¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mbcnt_hi(res, in0, in1, *, arg_attrs=None, res_attrs=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.MbcntLoOp(res, in0, in1, *, arg_attrs=None, res_attrs=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mbcnt.lo'¶

_ODS_REGIONS = (0, True)¶

in0() → _ods_ir¶

in1() → _ods_ir¶

arg_attrs() → _ods_ir | None¶

res_attrs() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mbcnt_lo(res, in0, in1, *, arg_attrs=None, res_attrs=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.Permlane16SwapOp(res, old, src, fi, boundControl, *, loc=None, ip=None)¶

Bases: _ods_ir

Performs a permlane16.swap operation with the given operands, applying the permutation specified by $fi to the provided inputs.

OPERATION_NAME = 'rocdl.permlane16.swap'¶

_ODS_REGIONS = (0, True)¶

old() → _ods_ir¶

src() → _ods_ir¶

fi() → _ods_ir¶

boundControl() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.permlane16_swap(res, old, src, fi, bound_control, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.Permlane32SwapOp(res, old, src, fi, boundControl, *, loc=None, ip=None)¶

Bases: _ods_ir

Performs a permlane32.swap operation with the given operands, applying the permutation specified by $fi to the provided inputs.

OPERATION_NAME = 'rocdl.permlane32.swap'¶

_ODS_REGIONS = (0, True)¶

old() → _ods_ir¶

src() → _ods_ir¶

fi() → _ods_ir¶

boundControl() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.permlane32_swap(res, old, src, fi, bound_control, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.PermlaneX16Op(res, old, src0, src1, src2, fi, boundControl, *, loc=None, ip=None)¶

Bases: _ods_ir

Performs a permlanex16 operation with the given operands, applying the permutation specified by $fi to the provided inputs.

OPERATION_NAME = 'rocdl.permlanex16'¶

_ODS_REGIONS = (0, True)¶

old() → _ods_ir¶

src0() → _ods_ir¶

src1() → _ods_ir¶

src2() → _ods_ir¶

fi() → _ods_ir¶

boundControl() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.permlanex16(res, old, src0, src1, src2, fi, bound_control, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.RawBufferAtomicCmpSwap(res, src, cmp, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.atomic.cmpswap'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

cmp() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_atomic_cmpswap(res, src, cmp, rsrc, offset, soffset, aux, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.RawBufferAtomicFAddOp(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.atomic.fadd'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_atomic_fadd(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None) → RawBufferAtomicFAddOp¶

class mlir.dialects._rocdl_ops_gen.RawBufferAtomicFMaxOp(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.atomic.fmax'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_atomic_fmax(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None) → RawBufferAtomicFMaxOp¶

class mlir.dialects._rocdl_ops_gen.RawBufferAtomicSMaxOp(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.atomic.smax'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_atomic_smax(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None) → RawBufferAtomicSMaxOp¶

class mlir.dialects._rocdl_ops_gen.RawBufferAtomicUMinOp(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.atomic.umin'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_atomic_umin(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None) → RawBufferAtomicUMinOp¶

class mlir.dialects._rocdl_ops_gen.RawBufferLoadOp(res, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.load'¶

_ODS_REGIONS = (0, True)¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_load(res, rsrc, offset, soffset, aux, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.RawBufferStoreOp(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.buffer.store'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_buffer_store(vdata, rsrc, offset, soffset, aux, *, loc=None, ip=None) → RawBufferStoreOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferAtomicCmpSwap(res, src, cmp, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.atomic.cmpswap'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

cmp() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_atomic_cmpswap(res, src, cmp, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferAtomicFaddOp(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.atomic.fadd'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_atomic_fadd(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferAtomicFaddOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferAtomicFmaxOp(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.atomic.fmax'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_atomic_fmax(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferAtomicFmaxOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferAtomicSmaxOp(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.atomic.smax'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_atomic_smax(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferAtomicSmaxOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferAtomicUminOp(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.atomic.umin'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_atomic_umin(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferAtomicUminOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferLoadLdsOp(rsrc, ldsPtr, size, voffset, soffset, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.load.lds'¶

_ODS_REGIONS = (0, True)¶

rsrc() → _ods_ir¶

ldsPtr() → _ods_ir¶

size() → _ods_ir¶

voffset() → _ods_ir¶

soffset() → _ods_ir¶

offset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_load_lds(rsrc, lds_ptr, size, voffset, soffset, offset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferLoadLdsOp¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferLoadOp(res, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.load'¶

_ODS_REGIONS = (0, True)¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_load(res, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.RawPtrBufferStoreOp(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.raw.ptr.buffer.store'¶

_ODS_REGIONS = (0, True)¶

vdata() → _ods_ir¶

rsrc() → _ods_ir¶

offset() → _ods_ir¶

soffset() → _ods_ir¶

aux() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.raw_ptr_buffer_store(vdata, rsrc, offset, soffset, aux, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → RawPtrBufferStoreOp¶

class mlir.dialects._rocdl_ops_gen.ReadfirstlaneOp(res, src, *, loc=None, ip=None)¶

Bases: _ods_ir

Returns the value in the lowest active lane of the input operand.

OPERATION_NAME = 'rocdl.readfirstlane'¶

_ODS_REGIONS = (0, True)¶

src() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.readfirstlane(res, src, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ReadlaneOp(res, src0, src1, *, loc=None, ip=None)¶

Bases: _ods_ir

Get the value in lane src1 from input src0.

OPERATION_NAME = 'rocdl.readlane'¶

_ODS_REGIONS = (0, True)¶

src0() → _ods_ir¶

src1() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.readlane(res, src0, src1, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.SBarrierOp(*, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.barrier'¶

_ODS_REGIONS = (0, True)¶

mlir.dialects._rocdl_ops_gen.s_barrier(*, loc=None, ip=None) → SBarrierOp¶

class mlir.dialects._rocdl_ops_gen.SSleepOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.sleep'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_sleep(count, *, loc=None, ip=None) → SSleepOp¶

class mlir.dialects._rocdl_ops_gen.SWaitcntOp(bitfield, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.waitcnt'¶

_ODS_REGIONS = (0, True)¶

bitfield() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_waitcnt(bitfield, *, loc=None, ip=None) → SWaitcntOp¶

class mlir.dialects._rocdl_ops_gen.SchedBarrier(mask, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.sched.barrier'¶

_ODS_REGIONS = (0, True)¶

mask() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.sched_barrier(mask, *, loc=None, ip=None) → SchedBarrier¶

class mlir.dialects._rocdl_ops_gen.SchedGroupBarrier(mask, size, groupId, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.sched.group.barrier'¶

_ODS_REGIONS = (0, True)¶

mask() → _ods_ir¶

size() → _ods_ir¶

groupId() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.sched_group_barrier(mask, size, group_id, *, loc=None, ip=None) → SchedGroupBarrier¶

class mlir.dialects._rocdl_ops_gen.SetPrioOp(priority, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.s.setprio'¶

_ODS_REGIONS = (0, True)¶

priority() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_setprio(priority, *, loc=None, ip=None) → SetPrioOp¶

class mlir.dialects._rocdl_ops_gen.TensorLoadToLDSD2Op(dgroup0, dgroup1, cachePolicy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Moves tiles of tensor data between global memory and LDS. The tile is described by the $dgroup descriptors. 2 $dgroup descriptors allows for movement of up to 2D tensors. $cachePolicy describes the memory scope and an indicator of expected data re-use.

This op is for gfx1250+ architectures.

OPERATION_NAME = 'rocdl.tensor.load.to.lds.d2'¶

_ODS_REGIONS = (0, True)¶

dgroup0() → _ods_ir¶

dgroup1() → _ods_ir¶

cachePolicy() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.tensor_load_to_lds_d2(dgroup0, dgroup1, cache_policy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → TensorLoadToLDSD2Op¶

class mlir.dialects._rocdl_ops_gen.TensorLoadToLDSOp(dgroup0, dgroup1, dgroup2, dgroup3, cachePolicy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

Moves tiles of tensor data between global memory and LDS. The tile is described by the $dgroup descriptors. 4 $dgroup descriptors allows for movement of up to 5D tensors. $cachePolicy describes the memory scope and an indicator of expected data re-use.

This op is for gfx1250+ architectures.

OPERATION_NAME = 'rocdl.tensor.load.to.lds'¶

_ODS_REGIONS = (0, True)¶

dgroup0() → _ods_ir¶

dgroup1() → _ods_ir¶

dgroup2() → _ods_ir¶

dgroup3() → _ods_ir¶

cachePolicy() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.tensor_load_to_lds(dgroup0, dgroup1, dgroup2, dgroup3, cache_policy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → TensorLoadToLDSOp¶

class mlir.dialects._rocdl_ops_gen.TensorStoreFromLDSD2Op(dgroup0, dgroup1, cachePolicy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

This op is for gfx1250+ architectures.

OPERATION_NAME = 'rocdl.tensor.store.from.lds.d2'¶

_ODS_REGIONS = (0, True)¶

dgroup0() → _ods_ir¶

dgroup1() → _ods_ir¶

cachePolicy() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.tensor_store_from_lds_d2(dgroup0, dgroup1, cache_policy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → TensorStoreFromLDSD2Op¶

class mlir.dialects._rocdl_ops_gen.TensorStoreFromLDSOp(dgroup0, dgroup1, dgroup2, dgroup3, cachePolicy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

This op is for gfx1250+ architectures.

OPERATION_NAME = 'rocdl.tensor.store.from.lds'¶

_ODS_REGIONS = (0, True)¶

dgroup0() → _ods_ir¶

dgroup1() → _ods_ir¶

dgroup2() → _ods_ir¶

dgroup3() → _ods_ir¶

cachePolicy() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

mlir.dialects._rocdl_ops_gen.tensor_store_from_lds(dgroup0, dgroup1, dgroup2, dgroup3, cache_policy, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → TensorStoreFromLDSOp¶

class mlir.dialects._rocdl_ops_gen.ThreadIdXOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workitem.id.x'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workitem_id_x(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ThreadIdYOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workitem.id.y'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workitem_id_y(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ThreadIdZOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.workitem.id.z'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.workitem_id_z(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.WaitAsynccntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.wait.asynccnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_asynccnt(count, *, loc=None, ip=None) → WaitAsynccntOp¶

class mlir.dialects._rocdl_ops_gen.WaitDscntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx12+.

OPERATION_NAME = 'rocdl.s.wait.dscnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_dscnt(count, *, loc=None, ip=None) → WaitDscntOp¶

class mlir.dialects._rocdl_ops_gen.WaitExpcntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx12+.

OPERATION_NAME = 'rocdl.s.wait.expcnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_expcnt(count, *, loc=None, ip=None) → WaitExpcntOp¶

class mlir.dialects._rocdl_ops_gen.WaitLoadcntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx12+.

OPERATION_NAME = 'rocdl.s.wait.loadcnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_loadcnt(count, *, loc=None, ip=None) → WaitLoadcntOp¶

class mlir.dialects._rocdl_ops_gen.WaitStorecntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx12+.

OPERATION_NAME = 'rocdl.s.wait.storecnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_storecnt(count, *, loc=None, ip=None) → WaitStorecntOp¶

class mlir.dialects._rocdl_ops_gen.WaitTensorcntOp(count, *, loc=None, ip=None)¶

Bases: _ods_ir

Wait for the counter specified to be less-than or equal-to the count before continuing.

Available on gfx1250+.

OPERATION_NAME = 'rocdl.s.wait.tensorcnt'¶

_ODS_REGIONS = (0, True)¶

count() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.s_wait_tensorcnt(count, *, loc=None, ip=None) → WaitTensorcntOp¶

class mlir.dialects._rocdl_ops_gen.WavefrontSizeOp(res, *, range=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wavefrontsize'¶

_ODS_REGIONS = (0, True)¶

range() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wavefrontsize(res, *, range=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ds_read_tr4_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds.read.tr4.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_read_tr4_b64_(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ds_read_tr6_b96(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds.read.tr6.b96'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_read_tr6_b96_(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ds_read_tr8_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds.read.tr8.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_read_tr8_b64_(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.ds_read_tr16_b64(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.ds.read.tr16.b64'¶

_ODS_REGIONS = (0, True)¶

ptr() → _ods_ir¶

alias_scopes() → _ods_ir | None¶

noalias_scopes() → _ods_ir | None¶

tbaa() → _ods_ir | None¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.ds_read_tr16_b64_(res, ptr, *, alias_scopes=None, noalias_scopes=None, tbaa=None, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x1f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.4x4x1f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x1f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x2bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.4x4x2bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x2bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x4bf16_1k(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.4x4x4bf16.1k'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x4bf16_1k_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x4f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.4x4x4f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_4x4x4f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x1f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x1f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x1f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x2bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x2bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x2bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4bf16_1k(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x4bf16.1k'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4bf16_1k_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x4f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x4f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x4f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x8_xf32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x8.xf32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x8_xf32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x8bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x8bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x8bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x16bf16_1k(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x16bf16.1k'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x16bf16_1k_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x16f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x16f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x16f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.bf8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.bf8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.fp8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.16x16x32.fp8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_16x16x32_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x1f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x1f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x1f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x2bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x2bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x2bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x2f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x2f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x2f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4_xf32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x4.xf32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4_xf32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x4bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4bf16_1k(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x4bf16.1k'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4bf16_1k_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x4f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x4f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x8bf16_1k(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x8bf16.1k'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x8bf16_1k_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x8f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x8f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x8f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.bf8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.bf8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.fp8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f32.32x32x16.fp8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f32_32x32x16_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f64_4x4x4f64(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f64.4x4x4f64'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f64_4x4x4f64_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_f64_16x16x4f64(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.f64.16x16x4f64'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_f64_16x16x4f64_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_4x4x4i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.4x4x4i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_4x4x4i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x4i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.16x16x4i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x4i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x16i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.16x16x16i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x16i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x32_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.16x16x32.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x32_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x64_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.16x16x64.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_16x16x64_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x4i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.32x32x4i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x4i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x8i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.32x32x8i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x8i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x16_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.32x32x16.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x16_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x32_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.i32.32x32x32.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_i32_32x32x32_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_scale_f32_16x16x128_f8f6f4(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.scale.f32.16x16x128.f8f6f4'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_scale_f32_16x16x128_f8f6f4_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.mfma_scale_f32_32x32x64_f8f6f4(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.mfma.scale.f32.32x32x64.f8f6f4'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.mfma_scale_f32_32x32x64_f8f6f4_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x32_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x32.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x32_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x32_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x32.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x32_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x64.bf8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x64.bf8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x64.fp8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.16x16x64.fp8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_16x16x64_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x16_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x16.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x16_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x16_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x16.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x16_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x32.bf8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x32.bf8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x32.fp8.bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.f32.32x32x32.fp8.fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_f32_32x32x32_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_i32_16x16x64_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.i32.16x16x64.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_i32_16x16x64_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.smfmac_i32_32x32x32_i8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.smfmac.i32.32x32x32.i8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.smfmac_i32_32x32x32_i8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_bf16_16x16x16_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.bf16.16x16x16.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_bf16_16x16x16_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_bf16_16x16x32_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.bf16.16x16x32.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_bf16_16x16x32_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_bf16f32_16x16x32_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.bf16f32.16x16x32.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_bf16f32_16x16x32_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x16_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x16.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x16_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x32_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x32.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x32_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x64.bf8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x64.bf8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x64.fp8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x64.fp8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x64_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x128.bf8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x128.bf8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x128.fp8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f16.16x16x128.fp8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f16_16x16x128_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x4_f32(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x4.f32'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x4_f32_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.bf8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.bf8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.fp8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x16.fp8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x16_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x32_bf16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x32.bf16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x32_bf16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x32_f16(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x32.f16'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x32_f16_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x64.bf8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x64.bf8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x64.fp8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x64.fp8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x64_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_bf8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x128.bf8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_bf8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_bf8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x128.bf8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_bf8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_fp8_bf8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x128.fp8_bf8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_fp8_bf8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_fp8_fp8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.f32.16x16x128.fp8_fp8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_f32_16x16x128_fp8_fp8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x16_iu4(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.i32.16x16x16.iu4'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x16_iu4_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x16_iu8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.i32.16x16x16.iu8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x16_iu8_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x32_iu4(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.i32.16x16x32.iu4'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x32_iu4_(res, args, *, loc=None, ip=None) → _ods_ir¶

class mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x64_iu8(res, args, *, loc=None, ip=None)¶

Bases: _ods_ir

OPERATION_NAME = 'rocdl.wmma.i32.16x16x64.iu8'¶

_ODS_REGIONS = (0, True)¶

args() → _ods_ir¶

res() → _ods_ir¶

mlir.dialects._rocdl_ops_gen.wmma_i32_16x16x64_iu8_(res, args, *, loc=None, ip=None) → _ods_ir¶